Commit graph

31099 commits

Author SHA1 Message Date
Rob Clark
dafc2f1887 freedreno/gmem: fix hw binning hangs with large render targets
On all 3 gens, we have 4 bits for width and height in the VSC pipe
config.  And overflow results in setting width and/or height to zero
which causes hangs.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2017-05-16 16:34:21 -04:00
Rob Clark
da9a1cb8a6 freedreno/ir3: fix crash with atomics
Atomics can have a result value.  And sometimes it is even used.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2017-05-16 16:34:21 -04:00
Rob Clark
12aa1d15d5 ttn: fix dest size for some texture instructions
Some, like lod, don't return 4 components.

Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2017-05-16 16:34:21 -04:00
Rob Clark
2216a95946 ttn: fix txd src sizes
Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2017-05-16 16:34:21 -04:00
Rob Clark
b00fbb7daf ttn: fix txs dest size
Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2017-05-16 16:34:21 -04:00
Rob Clark
1303afdd4f freedreno/a5xx: remove unneeded assert
Signed-off-by: Rob Clark <robdclark@gmail.com>
2017-05-16 16:34:21 -04:00
Rob Clark
9235ab6550 freedreno/a5xx: fallback to slow-clear for z32
We probably *could* do this with blit path, but I think it would involve
clobbering settings from batch->gmem (see emit_zs()).

Signed-off-by: Rob Clark <robdclark@gmail.com>
2017-05-16 16:34:21 -04:00
Philipp Zabel
cb16d91034 etnaviv: increment the resource seqno in resource_changed
Just increment the resource seqno instead of setting the texture
seqno to be lower by one than the resource seqno.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-By: Wladimir J. van der Laan <laanwj@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2017-05-16 21:07:56 +02:00
Lucas Stach
ba0b7de7e3 etnaviv: clean up sampler view reference counting
Use the proper pipe_resource_reference function instead of
rolling our own.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2017-05-16 21:07:51 +02:00
Lucas Stach
f8a3991458 etnaviv: apply feature overrides in one central location
This way we can just test the feature bits and don't need to spread
the debug overrides to all locations touching a feature.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-By: Wladimir J. van der Laan <laanwj@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2017-05-16 21:07:46 +02:00
Lucas Stach
20ce6f1361 etnaviv: allow R/B swapped surfaces to be cleared
Fixes: 7f62ffb68a ("etnaviv: add support for rb swap")
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2017-05-16 21:07:42 +02:00
Lucas Stach
8173d7d9e8 etnaviv: stop oversizing buffer resources
PIPE_BUFFER is a target enum, not a binding. This caused the driver to
up-align the height of buffer resources, leading to largely oversizing
those resources. This is especially bad, as the buffer resources used
by the upload manager are already 1MB in size. Height alignment meant
that those would result in 4 to 8MB big BOs.

Fixes: c9e8b49b88 ("etnaviv: gallium driver for Vivante GPUs")
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-By: Wladimir J. van der Laan <laanwj@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2017-05-16 21:07:37 +02:00
Nicolai Hähnle
c485b47383 radeonsi: extract TGSI memory/texture opcode handling into its own file
It's about time to get the growth of si_shader.c somewhat under control.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-05-16 16:11:55 +02:00
Nicolai Hähnle
cd9504667b radeonsi: make const_array externally accessible
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-05-16 16:11:54 +02:00
Nicolai Hähnle
f0066eb57e radeonsi: make get_bounded_indirect_index externally accessible
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-05-16 16:11:54 +02:00
Nicolai Hähnle
9252638afa radeonsi: make emit_waitcnt externally accessible
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-05-16 16:11:54 +02:00
Nicolai Hähnle
3811730a37 radeonsi: silence a Coverity warning
Coverity doesn't understand that we'll never pass non-NULL for vertex
shaders.

This is a bit lame, actually. A straightforward cross-procedural analysis
limited to this source file should be enough to prove that there's no
NULL-pointer dereference. Oh well.

CID: 1405999
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-05-16 16:11:54 +02:00
Nicolai Hähnle
4ea67c1751 radeonsi: rename tcs_tes_uses_prim_id for clarity
What we care about is whether PrimID is used while tessellation is
enabled; whether it's used in TCS/TES or further down the pipeline is
irrelevant.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-05-16 16:11:54 +02:00
Nicolai Hähnle
f4dbe2efb7 radeonsi: fix gl_PrimitiveIDIn in geometry shader when using tessellation
This builds on commit 0549ea15ec ("radeonsi: fix primitive ID in
fragment shader when using tessellation").

Fixes piglit
arb_tessellation_shader/execution/gs-primitiveid-instanced.shader_test

Cc: 17.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-05-16 16:11:53 +02:00
Marek Olšák
1c8f7d3be6 radeonsi: enable threaded_context
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
2017-05-15 13:01:33 +02:00
Marek Olšák
e24d094d70 gallium/u_threaded: drop and ignore all non-async debug callbacks
This is necessary to comply with OpenGL.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-05-15 13:01:33 +02:00
Marek Olšák
4c98afb241 gallium/radeon: add threaded context counter monitoring for HUD
"tc" will be initialized by the next commit.

v2: rename stuff according to v2 changes in u_threaded_context

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> (v1)
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
2017-05-15 13:01:33 +02:00
Marek Olšák
7166773f90 radeonsi: implement replace_buffer_storage for the threaded context
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
2017-05-15 13:01:33 +02:00
Marek Olšák
04299f7e5d gallium/radeon: subclass and handle threaded_query
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
2017-05-15 13:01:33 +02:00
Marek Olšák
b40d8026fa gallium/radeon: subclass threaded_transfer
v2: use assert on rtransfer->b.staging

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
2017-05-15 13:01:33 +02:00
Marek Olšák
b4fc399c08 gallium/radeon: subclass threaded_resource
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
2017-05-15 13:01:33 +02:00
Marek Olšák
93d549b2af gallium/radeon: handle other map buffer flags from the threaded context
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
2017-05-15 13:01:33 +02:00
Marek Olšák
e11f7e1d59 gallium/radeon: handle TC_TRANSFER_MAP_THREADED_UNSYNC
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
2017-05-15 13:01:33 +02:00
Marek Olšák
8b5485957e gallium/radeon: unwrap a context if we get a wrapped one
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
2017-05-15 13:01:33 +02:00
Marek Olšák
42fe45b451 gallium/radeon: require both WRITE and FLUSH_EXPLICIT in buffer_flush_region
spotted randomly.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
2017-05-15 13:01:33 +02:00
Marek Olšák
b8e552424e gallium/util: add threaded_context as a pipe_context wrapper
v2: - rename num_calls -> num_call_slots (for tc_call)
    - rename num_calls -> num_total_call_slots (for tc_batch)
    - rename num_offloaded/direct_calls -> num_offloaded/direct_slots
    - declare slot[0] instead of slot[1]
    - remove no-op leftover code from tc_draw_vbo
    - use tc_set_resource_reference to fill threaded_transfer
    - fix map flags for sparse buffers
    - cosmetic changes

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
2017-05-15 13:01:33 +02:00
Marek Olšák
dca19b1d42 gallium/u_upload: add u_upload_clone
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
2017-05-15 13:01:33 +02:00
Marek Olšák
8559fa505d gallium: add flag PIPE_CONTEXT_PREFER_THREADED
State trackers can set this to tell the driver when u_threaded_context is
desirable.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
2017-05-15 13:01:33 +02:00
Marek Olšák
7622181cad radeonsi/gfx9: add support for Raven
Cc: 17.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-05-15 13:00:26 +02:00
Eric Anholt
c98f03c6eb renderonly: Initialize fields of struct winsys_handle.
vc4 was rejecting renderonly's import, because the offset field was
nonzero.

Fixes: 848b49b288 ("gallium: add renderonly library")
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2017-05-15 06:38:45 +02:00
Rob Clark
12f9fa564a Revert "freedreno: use bypass if only clears"
Causing issues with stk on a4xx.. still probably a good idea, but seems
some debugging is needed first.

This reverts commit 3ab072d3c8.
2017-05-14 15:10:08 -04:00
Rob Clark
e4ad86952a freedreno: fix crash when flush() but no rendering
If we haven't created a batch, just bail in pipe->flush(), since there
is nothing to do.

Fixes crash in warsow, which creates a whole bunch of contexts used for
nothing but texture uploads.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2017-05-14 15:10:08 -04:00
Rob Clark
06a51fb4e5 freedreno: fix indexbuffer upload
My fault for not having time to test Marek's patches while they were on
list.

Fixes: 330d0607 ("gallium: remove pipe_index_buffer and set_index_buffer")
Signed-off-by: Rob Clark <robdclark@gmail.com>
2017-05-14 15:10:08 -04:00
Rob Clark
8efaae3e19 freedreno/a5xx: hw binning support
Signed-off-by: Rob Clark <robdclark@gmail.com>
2017-05-13 13:25:26 -04:00
Rob Clark
c61417e8be freedreno: update generated headers
Signed-off-by: Rob Clark <robdclark@gmail.com>
2017-05-13 13:12:36 -04:00
Rob Clark
3ab072d3c8 freedreno: use bypass if only clears
Some things trigger batches that only contain a clear (like glmark2
startup).  No point to use GMEM for this.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2017-05-13 13:12:36 -04:00
Pierre Moreau
840f6beb81 nv50/ir: Report wrong prog types using proper var
Coverity caught the use of the uninitialised variable `type`.
However, it was `info->type`, which is initialised, which was meant to
be used.

CID: 1406000
Reported-by: Ilia Mirkin <imirkin@alum.mit.edu>
Fixes: b490ca9a38 ("nv50/ir: Fail if encountering unknown shader type")
Signed-off-by: Pierre Moreau <pierre.morrow@free.fr>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2017-05-13 16:26:09 +02:00
Nicolai Hähnle
a16ae77185 radeonsi: get rid of secondary input/output word
By keeping track of fewer generics, everything can fit into 64 bits.

Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-05-12 10:46:06 +02:00
Nicolai Hähnle
0dd8aa44b3 radeonsi: reduce the number of generics for shader IO unique indices
This is a high as possible while still allowing to merge the bitfields
with the next commit.

For OpenGL, 32 would be sufficient. Nine apparently uses (much!) higher
indices than. Indices that are out of bound don't hurt for VS-PS
pipelines, except that the VS output kill optimization is not applied.

Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-05-12 10:46:06 +02:00
Nicolai Hähnle
90339fabd7 radeonsi: at most 8 sets of texture coordinates are supported
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-05-12 10:46:05 +02:00
Nicolai Hähnle
cfe6e30f1b radeonsi: skip generic out/in indices without a shader IO index
OpenGL uses at most 32 generic outputs/inputs in any stage, and they always
have a shader IO index and therefore fit into the outputs_written/
inputs_read/kill_outputs fields.

However, Nine uses semantic indices more liberally. We support that
in VS-PS pipelines, except that the optimization of killing outputs
must be skipped.

Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-05-12 10:46:05 +02:00
Nicolai Hähnle
7091fe887b radeonsi: use SI_MAX_IO_GENERIC instead of magic values
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-05-12 10:46:04 +02:00
Glenn Kennard
fa105214d3 r600g: Add defines for per-shader engine settings
Acked-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Glenn Kennard <glenn.kennard@gmail.com>
2017-05-12 12:20:04 +10:00
Glenn Kennard
123ae18f29 r600g: Add instruction encoding defines for MEM_RD
Acked-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Glenn Kennard <glenn.kennard@gmail.com>
2017-05-12 12:19:55 +10:00
Glenn Kennard
8260c4648a r600g: Add scratch ring register defines
Acked-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Glenn Kennard <glenn.kennard@gmail.com>
2017-05-12 12:19:46 +10:00