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11511 commits 66 branches 933 tags 1,006 MiB
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Author SHA1 Message Date
Sergio Monteiro Basto
4599683b48 i915: Fix undefined ALIGN symbol from 77e0523fb7. 2007-10-08 11:09:38 -07:00
Zou Nan hai
ac985708f4 Only vertex program fix, bypass tnl vertex program 2007-10-08 15:34:03 +08:00
Jerome Glisse
32699696e3 r300: fragprog tex instruction now take writemask into acount. 2007-10-07 22:49:56 +02:00
Patrice Mandin
d85e8b088b nouveau: move nv10 clear command, for usage by other gpu 2007-10-06 02:30:24 +02:00
Dave Airlie
0ba57d02cd i915: drop complex list handling for now 
If this proves a win later we can add it back but at the moment
I don't think it's required yet
 2007-10-05 14:41:32 +10:00
Dave Airlie
4611b9398e i915: clean up lists on teardown 
also fix a use of uninitialised pointer
 2007-10-05 14:33:18 +10:00
Kristian Høgsberg
b42152061c Add macros to generate CreateNewScreen entrypoint. 2007-10-05 00:12:30 -04:00
Kristian Høgsberg
4a22ae8d44 Remove XIDs from DRI interface (see #5714). 2007-10-05 00:09:32 -04:00
Kristian Høgsberg
4ceefccbfa Pull in the drm hash. 2007-10-05 00:09:23 -04:00
Dave Airlie
4e1c76de0b i915: add copyrights to new files 2007-10-05 12:15:50 +10:00
Dave Airlie
8e21bb516f i915: increase batchbuffer back to 16k 2007-10-05 12:12:33 +10:00
Eric Anholt
77e0523fb7 [965] Replace various alignment code with a shared ALIGN() macro. 
In the process, fix some alignment issues:
- Scratch space allocation was aligned into units of 1KB, while the allocation
  wanted units of bytes, so we never allocated enough space for scratch.
- GRF register count was programmed as ALIGN(val - 1, 16) / 16 instead of
  ALIGN(val, 16) / 16 - 1, which overcounted for val != 16n+1.
 2007-10-04 12:28:49 -07:00
Eric Anholt
0fc9efd8f0 Replace bmBufferOffset usage in batchbuffer setup with OUT_RELOC. 
This is in preparation for 965 TTM.
 2007-10-04 12:28:49 -07:00
Eric Anholt
6bac9478c3 Replace duplicated intel_reg.h with a shared header. 2007-10-04 12:28:49 -07:00
Eric Anholt
1f7378ee46 Replace some structure-based batch preparation with plain OUT_BATCH. 
OUT_BATCH is far more amenable to the upcoming relocations being done for TTM
support.
 2007-10-04 12:28:48 -07:00
Eric Anholt
ffa94e5b1e FreeBSD: more /usr/X11R6->/usr/local 2007-10-04 12:28:48 -07:00
Maarten Maathuis
10cc229dc2 nouveau: Replace removed device classes with their proper labels. 2007-10-04 19:08:37 +02:00
Dave Airlie
c4a9a70888 i915: add superioctl support to the ttm codepaths. 
gears now runs for about 10-15 seconds with some artifacts before falling
over.
 2007-10-04 15:31:47 +10:00
Roland Scheidegger
db0f050582 minor fog calc cleanup 2007-10-03 22:20:44 +02:00
Michel Dänzer
58cdd1dc52 i915: Only align texture pitch to 64 bytes when textures can be render targets. 2007-10-03 11:25:59 +02:00
Michel Dänzer
1bc84102ad i915: Work around texture pitch related performance drops on i915 at least. 2007-10-03 11:06:48 +02:00
Dave Airlie
fa031c8914 i915: add superioctl initial support inside bufmgr ttm 2007-10-03 16:54:59 +10:00
Dave Airlie
4cd3ef58a9 i915/drmbuf: attempt to push relocations into buffer manager 
This moves the relocations into the buffer manager in prepration for
a superioctl move.
 2007-10-03 15:50:46 +10:00
Brian
2dbd905ab0 fix comment: s/branch/kill/ 2007-10-02 16:50:40 -06:00
Brian
de1d725f44 updated glext.h license info (Khronos), plus other clean-ups 2007-10-01 17:57:25 -06:00
Zou Nan hai
3d6c410990 fragment shader function call fix, gl_FragCoord fix 2007-09-30 13:47:05 +08:00
Brian
f8ee72d98f fix VBO-split infinite loop (bug 12164) 2007-09-29 12:01:34 -06:00
Chris Rankin
4f96000e29 r200: Implement SetTexOffset hook. 
Implementation guidance by Michel Dänzer, final testing by Timo Aaltonen.
 2007-09-29 18:14:06 +02:00
Zou Nan hai
b0b48798c7 support continue, fix conditional 2007-09-29 15:00:52 +08:00
Dan Nicholson
2a3e33865d add support for LDFLAGS env var 2007-09-28 18:42:21 -06:00
Brian
e776e7a95a update the DRM/DRI instructions 2007-09-28 18:39:41 -06:00
Brian
6775c1e8cc Remove test for EXT_blend_logic_op in glGetString when determining GL version. 
EXT_blend_logic_op is slightly different from GL 1.1's RGBA logicop mode
and does not have to be supported.  Per conversation with Roland.
 2007-09-28 16:06:43 -06:00
Jesse Barnes
d99f6c4a2a Go back to using old drm_i915_flip_t field name 
This field shouldn't have been renamed in the first place.  Go back to using
the old name so that the tree is backward and forward compatible again.
 2007-09-28 10:11:52 -07:00
Zou Nan hai
e75ae0dc79 fix 2007-09-28 17:04:48 +08:00
Zou Nan hai
4087c90eff support nested function call in pixel shader 2007-09-28 16:37:01 +08:00
Eric Anholt
35331a511f [965] Add batchbuffer dumping under INTEL_DEBUG=bat, like 915. 2007-09-27 15:11:47 -07:00
Eric Anholt
b2c8b1385a FreeBSD: Chase /usr/X11R6 death (replaced by everything in one prefix). 2007-09-27 15:11:45 -07:00
Eric Anholt
e886ae4c58 Revert "WIP 965 conversion to dri_bufmgr." 
This reverts commit b2f1aa2389.

Somehow I ended up with my branch's save-this-while-I-work-on-master commit
actually on master.
 2007-09-27 15:11:39 -07:00
Eric Anholt
b2f1aa2389 WIP 965 conversion to dri_bufmgr. 2007-09-27 11:15:51 -07:00
Eric Anholt
38c30a8184 [965] Remove AUB file support. 
This code existed to dump logs of hardware access to be replayed in simulation.
Since we have real hardware now, it's not really needed.
 2007-09-27 10:16:08 -07:00
Brian
f2d9a07efe for Miniglx, use git sources 2007-09-27 10:39:01 -06:00
Brian
ed6d5ff6f8 Restore old _TriangleCaps code to fix Blender problem (bug 12164) 2007-09-27 10:39:01 -06:00
Brian
4f9d29cd4e tweak point rast to fix conform failure 2007-09-27 10:39:01 -06:00
Zou Nan hai
b1e549d176 handle INT op, still require high level handle of integer to be correct 2007-09-27 16:17:24 +08:00
Xiang, Haihao
3ee6a77e97 i965: handle all unfilled mode in clip stage. fix bug #12453 2007-09-27 16:14:57 +08:00
Xiang, Haihao
6254be9b71 mesa: make sure the gotten value isn't greater than the 
max depth buffer value on 64bit system. fix bug #12095
 2007-09-27 15:52:01 +08:00
Zou Nan hai
35a0634e35 fix issue when only fragment shader or vertex shader is used 2007-09-27 15:47:00 +08:00
Zou Nan hai
aa88d11e7d fix ppracer and bzflag issue with clip optimization 2007-09-27 13:49:35 +08:00
Dave Airlie
67f6449743 i915/i965 merge serer directories along lines for radeon/r200 2007-09-27 11:15:42 +10:00
Xiang, Haihao
175db68db5 i965: The cube map texture coordinates must be devided by the 
component with the largest absolute value before they are
delivered. fix bug #12421
 2007-09-26 16:42:50 +08:00