For both versions of llvm.amdgcn.buffer.load.{format}.*.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
It's better to do that in ac_shader_info.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
According to LLVM, only pre-GFX9 targets do not flush denorms
for fmin/fmax.
All dEQP-VK.glsl.builtin.precision.* still pass.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Previous code is correct but as the first case statement uses
a break, keep it consistent.
CID: 1428579
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
This is ported from radeonsi and fixes:
dEQP-VK.pipeline.multisample_shader_builtin.sample_mask.bit_*
v2: don't call this path for radeonsi, it does it in the epilog.
use the radeonsi code path.
v3: handle NULL pCreateInfo->pMultisampleState properly (Samuel)
v3.1: set ps_iter_samples default to 1 (Bas)
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Fixes: bdcbe7c76 (radv: add sample mask input support)
Signed-off-by: Dave Airlie <airlied@redhat.com>
This did the wrong thing if we had e.g. an array for which only some
of the attributes use the instance index. Tripped up some new CTS
tests.
CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Fixes the following piglit tests:
arb_shader_image_load_store/layer/image3d/layered binding test
arb_shader_image_load_store/max-size/image3d max size test/2048x8x8x1
arb_shader_image_load_store/max-size/image3d max size test/8x2048x8x1
arb_shader_image_load_store/max-size/image3d max size test/8x8x2048x1
arb_shader_image_load_store/semantics/imageload/vertex shader/rgba32f/image3d test
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Fixes the following piglit test on radeonsi:
./bin/arb_enhanced_layouts-gs-stream-location-aliasing
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
When a channel was not set we also did not increase the LDS address,
while that obviously should happen.
The output loading code was inadvertently fixed which resulted in a
mismatch causing the SaschaWillems tessellation demo to result
in corrupt rendering.
Fixes: 7898eb9a60 "ac: rework load_tcs_{inputs,outputs}"
Reviewed-by: Dave Airlie <airlied@redhat.com>
The view index user sgpr wasn't being accounted for properly,
this refactors out the code to decide if it's required and then
uses that info to account for it.
Fixes: 180c1b924e (ac/nir: Add shader support for multiviews.)
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
This shares more code and calls the new shared load_tess_varyings()
abi so that the radeonsi nir path now supports tcs output loads.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
The code to load outputs is essentially the same as load inputs
so we make the interface more generic to maximise code sharing.
We will make use of the new support in the following patch.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
This is an optimisation that is recommended by Matt Arsenault,
and used by RadeonSI, but it's not compatible with Vulkan.
Note that AC_FLOAT_MODE_UNSAFE_FP_MATH includes the no signed
zeros flag in LLVM.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
When that debug option is not used, we use the default float mode
because the no signed zeros optimisation is not Vulkan compatible.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
This also replaces llvm.AMDGPU.kilp by llvm.AMDGPU.kill with
LLVM < 6. Similar to RadeonSI codepath.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
This can't work for two reasons:
- TESSINNER/TESSOUTER are shader input values, so never translated
to the intrinsic ops
- the shader info pass scans the current stage but we want to know
in TCS, if TES reads the tess factors.
This fixes 6 regressions related to
deqp-vk/tessellation/shader_input_output/tess_level_{inner,outer}_XXX_tes
This reverts commit 5ba1a61648.
InstanceID is in VGPR2, not 1.
One more failure that CTS didn't catch up...
Reported-by: Alex Smith <asmith@feralinteractive.com>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
This shouldn't be scanned in the pipeline.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Fixes a number of int64 piglit tests, for example:
generated_tests/spec/arb_gpu_shader_int64/execution/built-in-functions/fs-sign-i64vec2.shader_test
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
V2: just zero-extend the 32-bit value.
Fixes a number of int64 piglet tests, for example:
generated_tests/spec/arb_gpu_shader_int64/execution/conversion/frag-conversion-explicit-bool-int64_t.shader_test
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Running dota2 since the below commit crashes with an llvm assert.
Trim the vector like the other user. This possible could also be
avoided by not padding inside the load vec3->vec4.
Fixes: 41c36c4549 (amd/common: use ac_build_buffer_load() for emitting UBO loads)
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
This creates two new internal dependencies, idep_nir_headers and
idep_nir. The former encapsulates the generation of nir_opcodes.h and
nir_builder_opcodes.h and adding src/compiler/nir as an include path.
This ensures that any target that needs nir headers will have the
includes and that the generated headers will be generated before the
target is build. The second, idep_nir, includes the first and
additionally links to libnir.
This is intended to make it easier to avoid race conditions in the build
when using nir, since the number of consumers for libnir and it's
headers are quite high.
Acked-by: Eric Engestrom <eric.engestrom@imgtec.com>
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Currently the meosn build has a mix of two styles:
arg : [foo, ...
bar],
and
arg : [
foo, ...,
bar,
]
For consistency let's pick one. I've picked the later style, which I
think is more readable, and is more common in the mesa code base.
v2: - fix commit message
Acked-by: Eric Engestrom <eric.engestrom@imgtec.com>
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Without this we end up with the llvm error message:
"Both operands to a binary operator are not of the same type!"
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Without this we end up with the llvm error message:
"Both operands to a binary operator are not of the same type!"
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Without this we end up with the llvm error message:
"Both operands to a binary operator are not of the same type!"
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Fixes the follow test for radeonsi nir:
tests/spec/arb_tessellation_shader/execution/quads.shader_test
Also stops 8 other tests from crashing, they now just fail e.g.
tcs-output-array-float-index-rd-after-barrier.shader_test
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
If they were promoted from inputs/outputs, they could have a
non-zero value left over, which messed with our store handling.
Fixes: 06f05040eb "radv: Link shaders."
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
