Commit graph

5289 commits

Author SHA1 Message Date
Lionel Landwerlin
d699600da1 anv: reduce cache flushing for indirect commands on Gfx12.5+
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27257>
2024-02-09 22:46:07 +00:00
José Roberto de Souza
3579413aed anv: Switch to truly asynchronous VM binding in Xe KMD
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26805>
2024-02-09 20:24:48 +00:00
José Roberto de Souza
f23395e2b9 anv: Start to use intel_bind_timeline
With this patch, VM binds remain synchronous in relation to vm_bind()
KMD backend calls. However, the syscalls required for VM bind is
reduce in 2(in the optimal cases), the syncobj create and destroy
syscall are replaced by he usage a timeline syncobj.

Next step will be make this completely asynchronous.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26805>
2024-02-09 20:24:48 +00:00
Jordan Justen
964042d50c anv/query: Follow MTL code paths on ARL
Ref: 0a52002a1c ("anv: disable reset query pools using blorp opt on MTL")
Ref: b3b12c2c27 ("anv: enable CmdCopyQueryPoolResults to use shader for copies")
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27352>
2024-02-06 21:23:19 +00:00
Jordan Justen
c1ffd0a037 anv/drirc: Extend option to disable FCV optimization to ARL
Ref: 01046cd6ad ("anv/drirc: add option to disable FCV optimization")
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27352>
2024-02-06 21:23:19 +00:00
Eric Engestrom
32800aa1d7 anv: enable VK_EXT_headless_surface on all platforms except Windows
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27448>
2024-02-06 20:32:38 +00:00
Sviatoslav Peleshko
0a44f6319e anv,driconf: Add sampler coordinate precision workaround for AoE 4
AoE4 samples texture on the edge between texels, which can cause
unexpected texel to be returned, and cause misrenderings. This workaround
enables coordinate rounding even in NEAREST mode, which fixes the problem.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9864
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27337>
2024-02-06 10:29:15 +00:00
Tapani Pälli
5178ad761c anv: flush tile cache independent of format with HIZ-CCS flush
Cc: mesa-stable
Fixes: ba87656079 ("anv: implement undocumented tile cache flush requirements")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10420
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10530
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Mark Janes <markjanes@swizzler.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27440>
2024-02-05 21:50:26 +00:00
Tapani Pälli
5ae2b4882a blorp: implement Wa_16014912113 callback for drivers
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26920>
2024-02-05 13:50:58 +00:00
Tapani Pälli
1693d0b857 anv: implement Wa_16014912113
When URB state for DS changes, we need to emit URB setup for VS with
256 handles and 0 for rest, commit this using a HDC flush before
setting real values.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26920>
2024-02-05 13:50:58 +00:00
Tapani Pälli
a1b885b482 intel: refactor urb configuration, add intel_urb_config
Patch adds a structure holding urb configuration. This makes it nicer
to pass it around as example for blorp. We need to be able to sometimes
compare with last urb configuration to be able to implement some
workaround.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26920>
2024-02-05 13:50:58 +00:00
Georg Lehmann
cc7400e49c anv: report rotate subgroup feature bits
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27444>
2024-02-05 11:20:28 +00:00
Yiwei Zhang
4fd4a6109d anv: refactor to use DETECT_OS_ANDROID instead of ANDROID
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27374>
2024-02-01 19:29:49 +00:00
Yiwei Zhang
1e80a426c2 anv: extend implicit fencing support for case requiring implicit write
This change extends the coverage to ANV being the producer while
consumer is hardware encoder backed by iHD. So we'd apply implicit write
to bos backing render target images, which is mostly aligned with
i915_batch_submit tracking of the bos being writtern to.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27398>
2024-02-01 18:53:28 +00:00
Yiwei Zhang
be3af5acf6 anv: optimize the implicit fencing support of external memory
Previously we apply implicit sync to all external memory, which is a bit
redundant since we only need it for the dedicated image scenario (media
image imported into Vulkan). This change optimizes just like that while
also excluding wsi which has its own way of synchronizing with the
compositor.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27398>
2024-02-01 18:53:28 +00:00
Yiwei Zhang
55ac9a08b5 anv: refactor wsi_memory_allocate_info handling
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27398>
2024-02-01 18:53:28 +00:00
Tapani Pälli
a53af34664 anv: use workaround framework for Wa_22018402687
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27384>
2024-01-31 21:24:14 +00:00
Sagar Ghuge
01636ee700 anv: Disable compression if we have concurrent sharing mode
If a resource is created with sharing mode CONCURRENT when multiple
queues are supported, we can't support the compression since we can't do
FULL_RESOLVE/PARTIAL_RESOLVE to construct the main surface data without
barriers.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27349>
2024-01-31 19:28:12 +00:00
Dylan Baker
3d4ef6f983 intel/vulkan: assume() that we don't use "ISL_NUM_FORMATS"
Which coverity thinks will happen, even though we never return
ISL_NUM_FORMATS.

CID: 1559463
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27369>
2024-01-31 18:59:16 +00:00
Hyunjun Ko
d0d2cf549b anv/video: fix out-of-bounds read
Since STD_VIDEO_H265_CHROMA_QP_OFFSET_TILE_COLS_LIST_SIZE is 19.

Fixes: 8d519eb5 ("anv: add initial video decode support for h265")
Closes: mesa/mesa#10529

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27373>
2024-01-31 08:24:22 +00:00
Daniel Schürmann
26c8f13ff5 vulkan: enable VK_KHR_shader_expect_assume
This implementation ignores the hints.

Acked-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27265>
2024-01-30 19:09:42 +00:00
Haihao Xiang
29d18f3ca9 anv: Fix typo in transition_color_buffer
Signed-off-by: Haihao Xiang <haihao.xiang@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27330>
2024-01-30 07:39:01 +00:00
Lionel Landwerlin
3b9466dd51 anv: fix transfer barriers flushes with compute queue
Transfer operation are implemented differently on the compute engine
and require a different kind of cache flush.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27233>
2024-01-26 20:47:18 +00:00
Lionel Landwerlin
9d31680e79 anv: retain ccs image binding address
Memory can be free before images it is bound to. When unmapping the
CCS range in the AUX-TT, we cannot rely on the anv_bo::offset field
because the anv_bo might have been freed.

Just save the mapping address/size and use those values at unmapping
time.

Fixes an assert on CI with :

  dEQP-VK.synchronization.internally_synchronized_objects.pipeline_cache_graphics

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: e519e06f4b ("anv: add missing alignment for AUX-TT mapping")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27304>
2024-01-26 17:29:31 +00:00
Lionel Landwerlin
eead86ad8e anv: rename aux_tt image field
We'll add more to the sub-struct

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27304>
2024-01-26 17:29:31 +00:00
Lionel Landwerlin
fdc2f0a52e anv: factor out aux-tt binding logic for future reuse
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27304>
2024-01-26 17:29:30 +00:00
Lionel Landwerlin
e121d873bd anv/hasvk: don't report error when intel_get_device_info_from_fd fails
A side effect of the previous change is that we started getting
failures from that function but that only says the device is not
supported, so silently fail and return.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 3fd44345c4 ("intel: Skip ioctls for querying device info when hardware is unsupported")
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27294>
2024-01-26 16:30:25 +00:00
Lionel Landwerlin
72dc596aa0 anv: implement VK_EXT_attachment_feedback_loop_dynamic_state
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23523>
2024-01-26 13:39:02 +00:00
Faith Ekstrand
a9d72609d9 anv: Advertise VK_EXT_attachment_feedback_loop_layout
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23523>
2024-01-26 13:39:02 +00:00
Lionel Landwerlin
dda8c2b8be anv: handle image feedback loop usage
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23523>
2024-01-26 13:39:02 +00:00
Faith Ekstrand
bd285a6ad5 anv: Add helpers for getting the surface state from an image view
Gets rid of some duplicated logic.

Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23523>
2024-01-26 13:39:02 +00:00
Lionel Landwerlin
16391645ef anv: add check that in renderpass barriers apply to attachments
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23523>
2024-01-26 13:39:02 +00:00
Lionel Landwerlin
eed788213b anv: ensure consistent layout transitions in render passes
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23523>
2024-01-26 13:39:02 +00:00
Lionel Landwerlin
f92bff9198 intel/ds: track predication of blorp operations
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23523>
2024-01-26 13:39:01 +00:00
Lionel Landwerlin
e519e06f4b anv: add missing alignment for AUX-TT mapping
Buffers that are not dedicated can also be used for CCS mapped images,
so they need to be aligned to the AUX-TT requirements.

GTK+ is running into such case where it creates an image with a CCS
modifier. When requesting the alignment through
vkGetImageMemoryRequirements() the 64KB/1MB alignment is returned, but
the binding fails with an assert because the VkDeviceMemory has not
been aligned to the AUX-TT requirement and we cannot disable CCS since
the modifier requires it.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 4cdd3178fb ("anv: Meet CCS alignment reqs with dedicated allocs")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10433
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27258>
2024-01-26 11:20:17 +00:00
Lionel Landwerlin
d46bbf727d anv: promote EXT_load_store_op_none to KHR
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27274>
2024-01-26 10:38:53 +00:00
Lionel Landwerlin
87acc6b59b anv: promote EXT_line_rasterization to KHR
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27274>
2024-01-26 10:38:53 +00:00
Lionel Landwerlin
976d5b9551 anv: promote EXT_index_type_uint8 to KHR
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27274>
2024-01-26 10:38:53 +00:00
Rohan Garg
b703e0be53 anv: factor out common code for determining surface usage from a VkDescriptorType
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27268>
2024-01-26 09:17:03 +00:00
Lionel Landwerlin
7c2ff46a4f anv: don't prevent L1 untyped cache flush in 3D mode
Required on MTL.

Fixes tests like :

 dEQP-VK.synchronization2.op.single_queue.timeline_semaphore.write_copy_buffer_read_copy_buffer.buffer_16384

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Co-Authored-by: Jordan Justen <jordan.l.justen@intel.com>
Tested-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27172>
2024-01-25 22:10:54 +00:00
Caio Oliveira
5a44d0fd1d anv: Advertise VK_KHR_shader_subgroup_rotate
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27272>
2024-01-25 19:07:42 +00:00
Rohan Garg
3e93ccbc1b anv: untyped data port flush required when a pipeline sets the VK_ACCESS_2_SHADER_STORAGE_READ_BIT
VK_ACCESS_2_SHADER_STORAGE_READ_BIT specifies read access to a
storage buffer, physical storage buffer, storage texel buffer, or
storage image in any shader pipeline stage.

Any storage buffers or images written to must be invalidated and
flushed before the shader can access them.

This fixes the following tests on LNL:
  - dEQP-VK.synchronization2.op.single_queue.barrier.write\*_specialized_access_flag

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27212>
2024-01-25 13:55:24 +01:00
Tranquillity Codes
3fd44345c4 intel: Skip ioctls for querying device info when hardware is unsupported
While enumerating devices on a system with multiple implementations,
unnecessary ioctls will be issued before a driver checks if it supports a
given device.
This patch makes the driver fail early based on a intel_device_info.ver
check with 2 new parameters added to intel_get_device_info_from_fd.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27166>
2024-01-25 09:57:24 +00:00
Kenneth Graunke
5e7f4ff97f intel: Add driver support for hardware generated local invocation IDs
This adds a few new fields in the brw_cs_prog_data struct and then
uses them to fill in the relevant COMPUTE_WALKER fields.

Although the Tile Layout field theoretically has different settings for
32/64/128bpe, it appears that the recommended programming is to always
pick either TileY 32bpe or Linear.  It's not very practical to look at
the surface formats involved, anyway.

Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27167>
2024-01-25 08:43:04 +00:00
Kenneth Graunke
10ed4f1cab intel/nir: Pass devinfo and prog_data to brw_nir_lower_cs_intrinsics
We'll want to check for Alchemist and set various prog_data fields
in the next patch, in order to enable some optimizations.  Passing
NULL for prog_data will remain valid and continue working as before.

Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27167>
2024-01-25 08:43:04 +00:00
José Roberto de Souza
d5ec2fa52f anv: Fix calculation of syncs required in Xe KMD
num_syncs was being incremented by one if 'utrace_submit != NULL' but
a sync was only being set if also
'util_dynarray_num_elements(&utrace_submit->batch_bos) == 0'.

This mismatch could cause application to abort due to
'assert(count == num_syncs)'.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27244>
2024-01-24 20:48:39 +00:00
Rohan Garg
c69650a95e isl,blorp,anv: introduce ISL_TILING_64_XE2 for Xe2+ platforms
Xe2+ changed the msaa mapping for 2D/3D Tile64 surfaces, introduce a
Xe2+ specific enum to handle this change.

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27113>
2024-01-24 17:01:48 +01:00
Lionel Landwerlin
e1b9a6e4f3 anv: initial RMV support
Launch with :

$ MESA_VK_TRACE=rmv MESA_VK_TRACE_TRIGGER=/tmp/trig ./my_app

In another terminal, trigger a capture :

$ touch /tmp/trig

The application with create a snapshot and print out :

RMV capture saved to '/tmp/my_app_2024.01.19_10.56.33.rmv'

Then just open it with RMV :

./RadeonMemoryVisualizer /tmp/my_app_2024.01.19_10.56.33.rmv

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26843>
2024-01-23 17:24:19 +00:00
Lionel Landwerlin
6d53fcd54e anv: track imported ray tracing pipeline groups
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26843>
2024-01-23 17:24:19 +00:00
Lionel Landwerlin
8229ee43ac anv: track total state stream allocated blocks from the pool
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26843>
2024-01-23 17:24:19 +00:00