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68816 commits

Author SHA1 Message Date
Timothy Arceri
cf757f48ea Revert "glsl: replace unreachable code path with assert"
This reverts commit 98270fd20d.

Something went terribly wrong the commit is not what the commit
message says.
2016-01-11 09:20:39 +11:00
Timothy Arceri
98270fd20d glsl: replace unreachable code path with assert
The lower_named_interface_blocks() pass is called before we try
assign locations to varyings so this shouldn't be reachable.

Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2016-01-11 09:18:51 +11:00
Timothy Arceri
e4c5ace6a9 glsl: combine if blocks
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2016-01-11 09:18:45 +11:00
Rhys Kidd
7b4f8c827d mesa: Update todo regarding StencilOp and StencilOpSeparate.
OpenGL 2.0 function StencilOp() is in part internally implemented via
StencilOpSeparate(). This change happened some time ago, however the
accompanying doxygen todo comment was not accordingly updated.

Replace the outdated portion of this doxygen todo comment, leaving the
remainder unchanged.

Also better respect the 80 character suggested line length in this file.

v2: Fully remove comment, following code review by t_arceri@yahoo.com.au

Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
2016-01-11 09:10:17 +11:00
Kenneth Graunke
5e3edd4b28 glsl: Make bitfield_insert/extract and bfi/bfm non-vectorizable.
Currently, opt_vectorize() tries to combine:

    result.x = bitfieldInsert(src0.x, src1.x, src2.x, src3.x);
    result.y = bitfieldInsert(src0.y, src1.y, src2.y, src3.y);
    result.z = bitfieldInsert(src0.z, src1.z, src2.z, src3.z);
    result.w = bitfieldInsert(src0.w, src1.w, src2.w, src3.w);

into a single ir_quadop_bitfield_insert opcode, which operates on
ivec4s.  However, GLSL IR's opcodes currently require the bits and
offset parameters to be scalar integers.  So, this breaks.

We want to be able to vectorize this eventually, but for now, just
chicken out and make opt_vectorize() bail by marking all the bitfield
insert/extract related opcodes as horizontal.  This is a relatively
uncommon case today, so we'll do the simple fix for stable branches,
and fix it properly on master.

Fixes assertion failures when compiling Shadow of Mordor vertex shaders
on i965 in vec4 mode (where OptimizeForAOS enables opt_vectorize()).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
2016-01-09 15:46:37 -08:00
Pierre Moreau
0d3051f75a nv50/ir: Fix scratch allocation size and file
Signed-off-by: Pierre Moreau <pierre.morrow@free.fr>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-01-09 12:58:21 -05:00
Nicolai Hähnle
da5d4583e5 mesa: merge bind_atomic_buffers_{base|range}
Reduced code duplication should make the code more maintainable.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2016-01-08 19:37:38 -05:00
Nicolai Hähnle
5eb104d6ab mesa: merge bind_shader_storage_buffers_{base|range}
Reduced code duplication should make the code more maintainable.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2016-01-08 19:37:38 -05:00
Nicolai Hähnle
e8dd7cc303 mesa: merge bind_uniform_buffers_{base|range}
Reduced code duplication should make the code more maintainable.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2016-01-08 19:37:37 -05:00
Nicolai Hähnle
b3ca26cded mesa: merge bind_xfb_buffers_{base|range}
Reduced code duplication should make the code more maintainable.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2016-01-08 19:37:37 -05:00
Kristian Høgsberg Kristensen
81f7fd3c54 glsl: Don't add nir files to libglsl_la_SOURCES
SCons doesn't understand nir yet and doesn't want to compile the glsl to
nir pass. Move the files to their own variable so we can add it only for
automake.

Tested-by: Brian Paul <brianp@vmware.com>
2016-01-08 16:15:49 -08:00
Ilia Mirkin
e3706a7118 nv50,nvc0: use a face sysval to avoid the useless back-and-forth conversion
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-01-08 17:40:52 -05:00
Kristian Høgsberg Kristensen
82ad571abf glsl: Move _mesa_shader_stage_to_string/abbrev to shader_enums.c
These are used by code that doesn't necessarily link to libglsl.la. Move
them to shader_enums.[ch] where we keep similar helpers.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2016-01-08 14:26:20 -08:00
Kristian Høgsberg Kristensen
1d25ef6ae7 i965: Move GLSL lowering passes out of libi965_compiler.la
The scope of libi965_compiler.la is to be able to take nir shaders and
generate i965 EU code.  As such, we don't want the GLSL IR lowering
passes in the library. With this change, libi965_compiler.la no longer
needs to link to libglsl.la.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2016-01-08 14:26:16 -08:00
Kristian Høgsberg Kristensen
e97caba1f6 glsl: Move glsl_to_nir files to LIBGLSL_FILES
libglsl_la_SOURCES includes both NIR_FILES and LIBGLSL_FILES, so for
libglsl.la consumers, this is a no-op. libnir.la however no longer uses
any GLSL IR infrastructure and can be used without also linking to
libglsl.la.

Acked-by: Matt Turner <mattst88@gmail.com>
2016-01-08 14:26:12 -08:00
Jordan Justen
1d54ac6c9f mesa: Use separate indices for UBO & SSBO during binding
Previously we were treating the binding index for Uniform Buffer
Objects and Shader Storage Buffer Objects as being part of the
combined BufferInterfaceBlocks array.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93322
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2016-01-08 13:11:31 -08:00
Jordan Justen
cf66a8ffb7 mesa: Map program UBOs and SSBOs to Interface Blocks
v2:
 * Fill UboInterfaceBlockIndex and SsboInterfaceBlockIndex in
   split_ubos_and_ssbos (Iago)

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2016-01-08 13:10:28 -08:00
Ilia Mirkin
dff1caccac freedreno: add ir3_compiler to gitignore
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-01-08 15:16:37 -05:00
Ilia Mirkin
90ba06618e gallium: add a RESQ opcode to query info about a resource
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-01-08 15:10:33 -05:00
Ilia Mirkin
ebfb5446c7 gallium: add PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-01-08 15:10:33 -05:00
Ilia Mirkin
266d001261 gallium: add PIPE_SHADER_CAP_MAX_SHADER_BUFFERS
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-01-08 15:10:33 -05:00
Ilia Mirkin
8cb493acc7 tgsi: update atomic op docs
Specify that the operation only applies to the x component, not
per-component as previously specified. This is unnecessary for GL and
creates additional complications for images which need to support these
operations as well.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-01-08 15:10:33 -05:00
Ilia Mirkin
bdef02ff26 tgsi: add a is_store property
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-01-08 15:10:33 -05:00
Ilia Mirkin
50b8488926 tgsi: provide a way to encode memory qualifiers for SSBO
Each load/store on most hardware can specify what caching to do. Since
SSBO allows individual variables to also have separate caching modes,
allow loads/stores to have the qualifiers instead of attempting to
encode them in declarations.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-01-08 15:10:32 -05:00
Ilia Mirkin
888ddd632d ureg: add buffer support to ureg
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-01-08 15:10:32 -05:00
Ilia Mirkin
8cc9a8aa2a tgsi: add ureg support for image decls
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-01-08 15:10:32 -05:00
Jose Fonseca
208bfc493d glsl: Ensure 64bits shift is used.
I believe that `1u << x`, where x >= 32 yields undefined results
according to the C standard.

Particularly MSVC says `warning C4334: '<<' : result of 32-bit shift
implicitly converted to 64 bits (was 64-bit shift intended?)`.

Reviewed-by: Brian Paul <brianp@vmware.com>
2016-01-08 20:06:59 +00:00
Jose Fonseca
e378184d9c mesa/main: Avoid void function returning a value warning.
Trivial.

Reviewed-by: Brian Paul <brianp@vmware.com>
2016-01-08 20:06:59 +00:00
Marek Olšák
1e463d20ba nine: allow fragment shader POSITION and FACE to be system values
Reported-by: Axel Davy <axel.davy@ens.fr>
2016-01-08 20:07:16 +01:00
Marek Olšák
d0cf66d835 vl: allow fragment shader POSITION to be a system value
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com
Reviewed-by: Brian Paul <brianp@vmware.com>
2016-01-08 20:07:16 +01:00
Marek Olšák
69f43c2cc9 util/pstipple: allow fragment shader POSITION to be a system value
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com
Reviewed-by: Brian Paul <brianp@vmware.com>
2016-01-08 20:07:16 +01:00
Marek Olšák
8a13ce14fd st/mesa: add support for POSITION and FACE system values
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com
Reviewed-by: Brian Paul <brianp@vmware.com>
2016-01-08 20:07:15 +01:00
Marek Olšák
c00e534283 tgsi/scan: update for POSITION and FACE sytem values
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com
Reviewed-by: Brian Paul <brianp@vmware.com>
2016-01-08 20:07:15 +01:00
Marek Olšák
34738a92de gallium: add caps for POSITION and FACE system values
v2: document the integer behavior

Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com
Reviewed-by: Brian Paul <brianp@vmware.com>
2016-01-08 20:07:15 +01:00
Marek Olšák
24737f2298 program: add a helper for rewriting FP position input to sysval
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com
Reviewed-by: Brian Paul <brianp@vmware.com>
2016-01-08 20:06:23 +01:00
Marek Olšák
4191c1a57c glsl: optionally declare gl_FragCoord & gl_FrontFacing as system values
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com
Reviewed-by: Brian Paul <brianp@vmware.com>
2016-01-08 20:06:23 +01:00
Marek Olšák
c07cf5f5a9 tgsi/ureg: handle redundant declarations in ureg_DECL_system_value
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2016-01-08 20:06:22 +01:00
Marek Olšák
c886422656 tgsi/ureg: remove index parameter from ureg_DECL_system_value
It can be trivially derived from the number of already declared system
values. This allows ureg users not to worry about which index to choose.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2016-01-08 20:06:22 +01:00
Marek Olšák
91e8f2b0a5 st/mesa: remove dead code from mesa_to_tgsi
These aren't part of ARB_fragment_program.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2016-01-08 20:06:22 +01:00
Edward O'Callaghan
cb513485a0 radeon, si: Use TGSI chan name defines in lp_build_emit_fetch() calls
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-01-08 12:18:36 -05:00
Edward O'Callaghan
b42254eff3 gallium/aux: Use TGSI chan name defines inplace of literals
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-01-08 12:18:24 -05:00
Nicolai Hähnle
d6db7ceedf mesa: check that internalformat of CopyTexImage*D is not 1, 2, 3, 4
The piglit copyteximage check has recently been augmented to test this, but
apparently it hasn't been fixed in Mesa so far.

This language also already appears in the OpenGL 2.1 spec (Ian).

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2016-01-08 10:58:27 -05:00
Jason Ekstrand
040e314143 i965/compiler: Enable more lowering in NIR
We don't need these for GLSL or ARB, but we need them for SPIR-V

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2016-01-07 16:14:42 -08:00
Jason Ekstrand
d00abcc283 nir/algebraic: Add more lowering
This commit adds lowering options for the following opcodes:

 - nir_op_fmod
 - nir_op_bitfield_insert
 - nir_op_uadd_carry
 - nir_op_usub_borrow

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2016-01-07 16:14:38 -08:00
Jason Ekstrand
b0d4ee520e nir/opcodes: Fix up uadd_carry and usub_borrow
Both were defined as returning bool but the gpu_shader5 functions are
defined to return int.  Also, we had the parameters for usub borrwo
backwards in the folding expression.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2016-01-07 16:14:25 -08:00
Ilia Mirkin
67b31b3c59 nvc0: add ARB_indirect_parameters support
I chose to make separate macros for this due to the additional
complexity and extra scratch usage.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-01-07 18:38:46 -05:00
Ilia Mirkin
9a54ccf30a st/mesa: expose ARB_indirect_parameters when the backend driver allows
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-01-07 18:38:46 -05:00
Ilia Mirkin
e1eab5a76f mesa: add support for ARB_indirect_parameters draw functions
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-01-07 18:38:46 -05:00
Ilia Mirkin
9327e2d312 mesa: add parameter buffer, used for ARB_indirect_parameters
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-01-07 18:38:46 -05:00
Ilia Mirkin
b3e2c21fe5 glapi: add ARB_indirect_parameters definitions
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-01-07 18:38:46 -05:00