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Author SHA1 Message Date
Nicolai Hähnle
78f88d8b87 r300/program_pair: Dynamically allocate instructions temporarily 
In preparation of using TGSI, where we cannot easily predict the number
of instructions.

Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com>
 2009-07-27 20:32:02 +02:00
Nicolai Hähnle
e5bed439be r300: Detangle fragment program compiler from driver-specific structure 
This is in preparation of sharing the fragment program compiler with Gallium:
Compiler code is moved into its own directory and modified so that it no
longer depends on driver structures.

Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com>
 2009-07-27 20:32:02 +02:00
Pauli Nieminen
6b142866ab radeon: Add r6xx/r7xx chip family to get_chip_family_name 
This fixes problem that glxinfo was reporting r600+ cards as unknown.

Signed-off-by: Pauli Nieminen <suokkos@gmail.com>
 2009-07-27 11:06:18 -04:00
Patrice Mandin
1ee3bcfff0 nouveau: swizzle a single row or column, doing it one pixel at a time 2009-07-27 10:58:11 +02:00
Alex Deucher
7d3190a85b r600: fix textures 
We weren't allocating enough gprs for the fragment shader
in some cases.  There are likely other issues that still need
to be sorted out for textures, but at least they now work.
 2009-07-27 03:52:37 -04:00
Alex Deucher
7e6819f843 r600: don't draw when num indices is 0 
fixes engine demo
 2009-07-27 02:26:41 -04:00
Alex Deucher
48b2fea142 r600: set VGT NUM_INSTANCES as part of the draw command 
set VGT NUM_INSTANCES as part of the draw command rather
than as state as recommended by the pm4 guide.  Also,
use the NUM_INSTANCES packet.
 2009-07-27 02:26:41 -04:00
Alex Deucher
600a53a32e r600: Use R600_SCRATCH_REG_OFFSET rather than RADEON_SCRATCH_REG_OFFSET 
noticed by vehemens on IRC.
 2009-07-27 02:26:41 -04:00
Alex Deucher
0b3d51ee31 r600: switch vtx resource setup to use SETfield macros 
For consistency
 2009-07-27 02:26:41 -04:00
Alex Deucher
2c5e55d919 r600: switch tex code to use SETfield macros 
for consistency with the rest of the code.
 2009-07-27 02:26:41 -04:00
Corbin Simpson
7a10472f09 r300g: Fix two trivial texture size issues. 
Next thing to fix: progs/tests/mipgen.
 2009-07-26 22:48:20 -07:00
Corbin Simpson
725c1f004c radeon-gallium: If BO allocation fails, return NULL. 2009-07-26 22:35:26 -07:00
Corbin Simpson
2cbd5ecfb6 r300g: Add some debugging, correct little bits of math in texture setup. 
Simple stuff still works, but not sure about some of the more complex things.
 2009-07-26 21:38:24 -07:00
Patrice Mandin
8df35b7b57 nouveau: only swizzle square textures for copy 2009-07-26 22:30:35 +02:00
José Fonseca
5276b049b4 util: fix typo. 2009-07-26 20:31:59 +01:00
Patrice Mandin
2b8a8f75f3 nouveau: Take into account destination position for copy_swizzle, need to split copy a bit more 2009-07-26 16:18:06 +02:00
Patrice Mandin
77a8a650e6 nouveau: Recursively swizzle an NPOT sized copy 2009-07-26 12:30:12 +02:00
Patrice Mandin
8c30292a6e nouveau: use nv04_surface_copy_swizzle only for POT sizes 2009-07-24 23:37:46 +02:00
Joakim Sindholt
12b183d250 radeon-gallium: remove old getparam ioctl 2009-07-24 14:54:00 +02:00
Brian Paul
c57d81ddc9 mesa: include glew headers in MesaDemos tarballs 2009-07-23 20:20:39 -06:00
Alex Deucher
3b4235d4eb r600: fix segfault in morph3d 
These attributes still need work, but it shouldn't hurt to
enable them.
 2009-07-23 18:26:02 -04:00
Keith Whitwell
aa99a765c1 draw: correct address for machine struct in llvm path 
This changed after a recent commit.
 2009-07-23 18:48:04 +01:00
Keith Whitwell
adc6f8cdfc gallivm: updates for TGSI changes 
make linux-llvm succeeds, but doesn't seem to be working, at least with
llvm 2.5
 2009-07-23 17:59:08 +01:00
Corbin Simpson
ca83d5a8db r300g, radeon-gallium: Fix API, cleanup. 
Something called "validate" should return FALSE on failure, not TRUE.
 2009-07-23 07:18:29 -07:00
Nicolai Hähnle
27b3c435ba radeon-gallium: Build fixes wrt changed libdrm_radeon space check API 
Had to be hacked up a bit to apply to master. Sorry 'bout that. :3
 2009-07-23 07:18:29 -07:00
Corbin Simpson
256eacbde4 r300g: PIPE_CAP_BLEND_EQUATION_SEPARATE. 2009-07-23 07:18:29 -07:00
Keith Whitwell
d0d98f3ecf gallium: clean up opcode definitions 
Remove commented-out opcodes.  Remove information about API mappings
to opcodes, but add a reference to tgsi-instruction-set.txt where
that information is better presented.
 2009-07-23 14:39:07 +01:00
Keith Whitwell
78379abcbf gallium: remove deprecated TGSI opcodes 
Various opcodes which can be implemented trivially with other TGSI opcodes,
such as matrix multiplication and negation.  These were not used by any
state tracker or implemented by any of the drivers.
 2009-07-23 14:38:26 +01:00
José Fonseca
8b78294d21 r600: Remove CRLF line endings. 2009-07-23 14:11:10 +01:00
Vinson Lee
af1163cc41 util: Add support for Mac OS. 2009-07-23 14:08:07 +01:00
Corbin Simpson
07961bb05e r300g: Actually mark shaders as translated/untranslated. 
Also trust that Gallium will not give us TGSI that miscounts shader consts.

This creates a 20x speedup on glxgears, from 8 FPS to 160 FPS.
 2009-07-23 00:00:28 -07:00
Brian Paul
895c435def cell: update TGSI_OPCODE_ cases 2009-07-22 21:04:07 -06:00
Michel Dänzer
d602966f89 gallium: Fix PPC build. 2009-07-23 00:47:32 +02:00
Patrice Mandin
b7042399fd nouveau: nv30: wrong variable for format 2009-07-22 22:26:08 +02:00
Maciej Cencora
b129c55f42 r300: fix address register handling in NQSSADCE 
For address register we always use X component
 2009-07-22 22:10:22 +02:00
Patrice Mandin
db40bb0287 nouveau: Take into account sx,sy parameters to read from source surface 2009-07-22 21:10:20 +02:00
Brian Paul
b4ba6a66b7 docs: initial release notes for 7.5.1 2009-07-22 12:49:34 -06:00
Brian Paul
9c4b877519 mesa: bump version to 7.5.1 2009-07-22 12:46:53 -06:00
Brian Paul
b9e2e32daf mesa: include GLEW sources in MesaDemos tarball 2009-07-22 12:34:07 -06:00
Keith Whitwell
ede9f3b52e gallium: remove multiple aliases for TGSI opcodes 
This is a source of ongoing confusion.  TGSI has multiple names for
opcodes where the same semantics originate in multiple shader APIs.

For instance, TGSI includes both Mesa/GLSL and DX/SM30 names for
opcodes with the same semantics, but aliases those names to the same
underlying opcode number.

This makes it very difficult to visually inspect two sets of opcodes
(eg in state tracker & driver) and check if they implement the same
functionality.

This patch arbitarily rips out the versions of the opcodes not currently
favoured by the mesa state tracker and leaves us with a single name
for each distinct operation.
 2009-07-22 12:42:09 +01:00
Keith Whitwell
fd31f92cea gallium: simplify tgsi_full_immediate struct 
Remove the need to have a pointer in this struct by just including
the immediate data inline.  Having a pointer in the struct introduces
complications like needing to alloc/free the data pointed to, uncertainty
about who owns the data, etc.  There doesn't seem to be a need for it,
and it is unlikely to make much difference plus or minus to performance.

Added some asserts as we now will trip up on immediates with more
than four elements.  There were actually already quite a few such asserts,
but the >4 case could be used in the future to specify indexable immediate
ranges, such as lookup tables.
 2009-07-22 12:42:09 +01:00
Richard Li
5e3c62b550 r600: fix dst reg indexing for real 
This fixes segfaults in apps like teapot and tunnel
 2009-07-21 17:56:06 -04:00
Alex Deucher
7edb2a9eef Revert "r600: fix dst reg indexing" 
This reverts commit cc893d9a98.

Richard has the proper fix.
 2009-07-21 17:44:36 -04:00
Alex Deucher
72a3d8845f r600: add stencil support 2009-07-21 17:10:54 -04:00
Alex Deucher
db0160bb9d r600: use state functions to set default state 2009-07-21 17:10:54 -04:00
Alex Deucher
bd62cd735f r600: fill in point functions 2009-07-21 17:10:54 -04:00
Alex Deucher
5a615e7e65 r600: set provoking vertex to last vertex for OGL 2009-07-21 17:10:54 -04:00
Alex Deucher
60787df1e5 r600: fill in r700UpdateViewportOffset 2009-07-21 17:10:53 -04:00
Alex Deucher
549b8e6f1a r600: first pass at polyoffset support 
not working yet
 2009-07-21 17:10:53 -04:00
Jerome Glisse
7247446ba8 radeon: fix colorbuffer pitch emission regarding tiling in KMS/CS case 
We need to emit a relocation for pitch register so that kernel can
check and properly setup tiling on the color buffer.
 2009-07-21 21:14:19 +02:00