Commit graph

206910 commits

Author SHA1 Message Date
Georg Lehmann
cbf3f4220c aco: add rtne pseudo opcodes for fp64 add and fract
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41852>
2026-05-29 15:09:19 +00:00
Georg Lehmann
e0ccd24fb6 aco/gfx6: use shorter lowering for ftrunc
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41852>
2026-05-29 15:09:19 +00:00
Georg Lehmann
843219010f aco/gfx6: fix fceil lowering
The old one wasn't signed zero correct.

Cc: mesa-stable
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41852>
2026-05-29 15:09:19 +00:00
Georg Lehmann
76a68032cb radv: don't lower dfloor in NIR
The aco lowering was fixed in the previous commit.

If v_fract_f64 had precision issues, we would be in bigger trouble.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41852>
2026-05-29 15:09:19 +00:00
Georg Lehmann
bc639abb04 aco/gfx6: fix fp64 floor lowering
The v_min_f64 was broken, because we needs to allow 1.0 as fract result.

Otherwise floor(-DBL_MIN) will not return -1.0.

NaN also doesn't need any special handling, because fadd(NaN, b) is NaN.

Cc: mesa-stable
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41852>
2026-05-29 15:09:18 +00:00
Caio Oliveira
159dbc40e0 jay: Use TGL_PIPE_NONE when RegDist is zero
Avoids simulator complaining about invalid dependency.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41880>
2026-05-29 14:36:45 +00:00
Romaric Jodin
bb15c00343 anv: Declare 00-mesa-defaults.conf as an input to anv_dricrc_gen.py
The `libanv_drirc` custom target passes `00-mesa-defaults.conf` to the
generator script via the `--validate` flag, but it was hardcoded as a
path rather than being declared as an input dependency.

When translating the build to a hermetic build system, this missing
dependency causes the build to fail because the undeclared file is not
provisioned in the sandboxed build environment.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41886>
2026-05-29 14:05:30 +00:00
Konstantin Seurer
bef2148ab7 llvmpipe: Fix sparse binding large areas
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The size needs to be taken into account when tracking residency.

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41327>
2026-05-29 13:32:23 +00:00
Konstantin Seurer
ac27f93e54 llvmpipe: Implement sparse residency feedback for buffers
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41327>
2026-05-29 13:32:23 +00:00
Konstantin Seurer
6b999c4cab llvmpipe: Use i1 for sparce residency and expand as needed
Avoids potential size mismatch.

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41327>
2026-05-29 13:32:23 +00:00
Christian Gmeiner
010678968b lavapipe: Enable extendedDynamicState3ColorBlendAdvanced
Advanced blend with dynamic state is now lowered correctly at draw time, so
advertise the feature. It is required because lavapipe supports VK_EXT_shader_object.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/work_items/15564
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41885>
2026-05-29 11:58:34 +00:00
Christian Gmeiner
d80bf97e5e lavapipe: Lower advanced blend at draw time when its state is dynamic
With VK_DYNAMIC_STATE_COLOR_BLEND_ADVANCED_EXT the advanced blend op and its
parameters are only known at draw time. The static color_blend_op still
carries the pipeline's blend equation op, so lowering advanced blend in the
fragment shader already at pipeline creation used a stale op and, together with
the draw-time lowering, blended the result twice.

Fixes: 0444b5877f ("lavapipe: Implement VK_EXT_blend_operation_advanced")
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41885>
2026-05-29 11:58:34 +00:00
Christian Gmeiner
94299202f9 lavapipe: Skip advanced blend lowering when blending is disabled
When color blending is disabled for an attachment the fragment shader output
is written unmodified, so an advanced blend op on that attachment must have no
effect. lavapipe decided whether to lower advanced blend from the blend op
alone and ignored the blend enable, so the output got blended instead of being
left untouched.

Fixes: 0444b5877f ("lavapipe: Implement VK_EXT_blend_operation_advanced")
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41885>
2026-05-29 11:58:33 +00:00
squidbus
5484e83f4b kk: Handle index robustness for fully bound buffers manually
Some checks are pending
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While Apple GPUs do seem to handle robustness for cases where index count
exceeds the actual `MTLBuffer` size, Metal validation complains about it.

In the interest of valid API usage we can handle this case ourselves for
now, and later Metal 4 encoders will do away with the need to handle index
robustness altogether.

Reviewed-by: Aitor Camacho <aitor@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41873>
2026-05-29 04:28:27 -07:00
squidbus
80091d4c2e kk: Do not use image-to-image copies for 1D compressed textures
Metal validation fails if an image-to-image copy is performed with
dimensions that are not a multiple of the block size, which we hit
for 1D compressed images. According to documentation, it should be
fine to clamp the extent to the edge of the image, but it triggers
anyway, so route these to the buffer path to pass validation.

Reviewed-by: Aitor Camacho <aitor@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41873>
2026-05-29 04:28:24 -07:00
squidbus
7c8de173d2 kk: Sanitize image copy through buffer extents
Use `util_format_get_nblocks(x/y/z)` for safer extent division, and
make sure 1D/2D extensions have extent y/z set to 1 as appropriate.

Reviewed-by: Aitor Camacho <aitor@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41873>
2026-05-29 04:28:20 -07:00
squidbus
aeecafff95 kk: Fix precomp data buffer alignment
Metal wants the buffer to be aligned to 8

Reviewed-by: Aitor Camacho <aitor@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41873>
2026-05-29 04:28:17 -07:00
Konstantin Seurer
2fe85f966e radv: Add and use helpers for managing internal allocations
This is code that is duplicated in a whole bunch of cases.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41044>
2026-05-29 10:59:39 +00:00
Konstantin Seurer
6913c9440e radv: Move radv_find_memory_index to radv_debug.c
It's only used for tooling.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41044>
2026-05-29 10:59:39 +00:00
Konstantin Seurer
0b141ba774 radv/tools: Rename radv_debug to radv_debug_hang
It's only for hang debugging.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41044>
2026-05-29 10:59:38 +00:00
Konstantin Seurer
c9b60cfa4f radv: Move a whole bunch of debug/profiling related into a subdir
For slightly better separation of debug and driver code.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41044>
2026-05-29 10:59:38 +00:00
Konstantin Seurer
23677605f2 radv: Move debug options to radv_instance.h
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41044>
2026-05-29 10:59:38 +00:00
Frank Binns
c501f3b4c9 pvr: re-enable {EXT,KHR}_index_type_uint8
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This was originally disabled by a22ad99bdd ("pvr: set device
features/props/extensions to Vulkan 1.0 minimums (unless implemented)") in order
to concentrate efforts on passing "base" Vulkan conformance before layering on
additional functionality. The driver is now Vulkan 1.2 conformant.

As the functionality is already implemented, simply enable the extension.

Signed-off-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Ella Stanforth <ella@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41859>
2026-05-29 09:56:28 +01:00
Samuel Pitoiset
76fdc606c8 ac/nir,radv: lower task payload to zeroes when the mesh shader has no task
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The Vulkan spec allows this to be used in a mesh shader as long as
it's not accessed, so it can be eliminated.

This fixes dEQP-VK.mesh_shader.ext.misc.payload_not_accessed.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41828>
2026-05-29 07:44:40 +02:00
Faith Ekstrand
932ee0f806 etnaviv: Remove f32_to_f16_fallback() in favor of float16::F16
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41375>
2026-05-29 05:13:24 +00:00
Faith Ekstrand
b60694b91e compiler/rust: Add a float16 wrapper
This adds an F16 struct which provides a 16-bit float type using Mesa's
existing half-precision support internally.  Right now, it only contains
the basics but it could be expanded if needed.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41375>
2026-05-29 05:13:24 +00:00
Faith Ekstrand
7e2f41bd8f nouveau: Don't build NAK tests on Android
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41375>
2026-05-29 05:13:24 +00:00
Caio Oliveira
d6ce874220 anv: Use empty_vs_input for default VERTEX_ELEMENT_STATE
Some checks are pending
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Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41790>
2026-05-29 04:48:20 +00:00
Caio Oliveira
c9dceab876 anv: Fill VERTEX_ELEMENT_STATE before further emissions
genX(batch_emit_vertex_input) reserves 3DSTATE_VERTEX_ELEMENTS and then
writes into that reserved memory.  Any later anv_batch_emit() may
allocate a new batch and finalize the previous one, running the valgrind
defined-memory check over it.

Fill the draw-parameter and dynamic VERTEX_ELEMENT_STATE entries before
emitting 3DSTATE_VF_INSTANCING.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41790>
2026-05-29 04:48:20 +00:00
Timothy Arceri
26280cbc23 mesa: flush bitmap cache when scissor box changes
The glBitmap calls will flush the cache when scissors are enabled
or disabled but doesn't handle a change in the scissor box itself.

Fixes: 33ca53ac79 ("st/mesa: fix the glBitmap cache wrt FS, scissor, and clamp color changes")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/work_items/15505

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41825>
2026-05-29 03:38:55 +00:00
Gurchetan Singh
eb17e7b102 util: rust: minor fixups
* Use little-endian since all hardware is basically little-endian
* Fix dead_code warning on non-Linux platforms

Reviewed-by: David Gilhooley <djgilhooley@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41754>
2026-05-29 03:07:52 +00:00
Gurchetan Singh
5be5cca792 util: rust: sync error handling fixes from downstream
Useful for parse ints and using the ? operator.

Reviewed-by: David Gilhooley <djgilhooley@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41754>
2026-05-29 03:07:52 +00:00
Val Packett
10620bdf21 util: rust: Add a way to create a Tube from an existing OwnedFd
Signed-off-by: Val Packett <val@invisiblethingslab.com>
Signed-off-by: Gurchetan Singh <gurchetan.singh.foss@gmail.com>
Reviewed-by: David Gilhooley <djgilhooley@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41754>
2026-05-29 03:07:52 +00:00
Val Packett
4f13941e44 util: rust: Support detecting socket file descriptors
Useful for Pipewire passthrough.

Signed-off-by: Val Packett <val@invisiblethingslab.com>
Signed-off-by: Gurchetan Singh <gurchetan.singh.foss@gmail.com>
Reviewed-by: David Gilhooley <djgilhooley@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41754>
2026-05-29 03:07:52 +00:00
Val Packett
118e48402c util: rust: align API with real eventfd capabilities
Linux eventfds contain a 64-bit value which can be increased by arbitrary
numbers, and waiting returns a numeric value that consumers might need
to actually read.

Also, reading/waiting does mutate kernel state, so make it &mut self
like reading on std::fs::File is.

Signed-off-by: Val Packett <val@invisiblethingslab.com>
Signed-off-by: Gurchetan Singh <gurchetan.singh.foss@gmail.com>
Reviewed-by: David Gilhooley <djgilhooley@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41754>
2026-05-29 03:07:51 +00:00
Mike Blumenkrantz
1f866164d7 zink: be more conservative about query pool sizing
Some checks are pending
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500 can be pretty big if lots of queries are in flight, especially
if all the queries are TIMESTAMP. instead, start smaller and scale
dynamically up to the previous threshold

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41874>
2026-05-29 02:46:35 +00:00
Danylo Piliaiev
c5fb1c3265 freedreno/a7xx: Don't force enable IJ_LINEAR_PIXEL for FragFace/FragCoord
Apparently GRAS_CL_INTERP_CNTL has two fields FACENESS and CENTERRHW
which allows us to not enable IJ_LINEAR_PIXEL input, which can
improve performance in trivial cases by ~50%.

Mirrors Turnip change.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41848>
2026-05-29 01:15:47 +00:00
Danylo Piliaiev
cbd00c6675 tu/a7xx: Don't force enable IJ_LINEAR_PIXEL for FragFace/FragCoord
Apparently GRAS_CL_INTERP_CNTL has two fields FACENESS and CENTERRHW
which allows us to not enable IJ_LINEAR_PIXEL input, which can
improve performance in trivial cases by ~50%.

Found via gpu-ratemeter bench: vk.pix.noaa.1flat.face

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41848>
2026-05-29 01:15:47 +00:00
Dylan Baker
4381ac9a91 intel/brw: Add assert for error case
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Coverity notices that there is an error case where
`nir_get_io_data_src_number` could return `-1`, and that is then used to
index into an array. Given that that is an exceptional case, we can just
assert here.

CID: 1681480
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40146>
2026-05-28 23:50:39 +00:00
Sid Pranjale
825df24023 nvk: Implement VK_EXT_shader_atomic_float
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41867>
2026-05-28 23:04:32 +00:00
Paulo Zanoni
c5942b4efb brw: evict memory for workgroup scope in Xe2 and newer
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On Xe2 and Xe3, the flushing is necessary due to aliasing of TGM data
in L1 memory (HSD 14020414266). On newer platforms, it is necessary
for proper post-format data conversion handling (HSD 22020984324).

See the Instruction_Fence page (63969) for documentation on the fact
that the threadgroup scope ignores flushes.

Thanks to Francisco Jerez and Kenneth Graunke on their help for this
patch.

v2: restrict the flushing to TGM (Lionel).

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40732>
2026-05-28 22:07:01 +00:00
Dhruv Mark Collins
23f94c692c freedreno: Update A6XX_PC_MODE_CNTL definition and values
This register seems to be fairly critical on A7XX for vertex processing
performance, and was set to an unoptimal value for the A730/A735/A740
which has now been updated to a value that maximizes performance and
aligns with the proprietary driver.

Fixes #15411

Signed-off-by: Dhruv Mark Collins <mark@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41451>
2026-05-28 21:44:42 +00:00
Job Noorman
360650d189 ir3/spill: extract child intervals for live-in reloads
When reloading live-ins, child intervals need to be extracted to ensure
we can add live-in phi nodes for them.

Fixes asserts with spillall for a bunch of ray_query and
ray_tracing_pipeline CTS tests:

src/freedreno/ir3/ir3_spill.c: add_live_in_phi: Assertion `entry' failed.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Fixes: 613eaac7b5 ("ir3: Initial support for spilling non-shared registers")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41756>
2026-05-28 21:19:01 +00:00
Danylo Piliaiev
727a30f4c7 tu: Change of disable_fs state should force depth state recalculation
tu6_build_depth_plane_z_mode depends on state.disable_fs.

Fixes: be481e6615 ("tu: Disable FS in certain cases even if FS is not empty")

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41856>
2026-05-28 20:47:31 +00:00
Danylo Piliaiev
930f7f4a1b tu: Start/End occlusion query should force depth state recalculation
tu6_build_depth_plane_z_mode has a dependency on
occlusion_query_may_be_running.

Fixes: 8f5d433840 ("tu: Occlusion query counting should happen after FS that kills")

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41856>
2026-05-28 20:47:31 +00:00
José Roberto de Souza
9f4358ee77 intel/dev: Add a Xe2+ table of URB min and max entries
Some checks are pending
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Some values were wrong, so here adding the whole table with all fixed values.
Just to make easier to read and compare I have added all shader stages to
XEHP_URB_MIN_MAX_ENTRIES.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41789>
2026-05-28 20:27:23 +00:00
José Roberto de Souza
c1bb5e101e intel/dev: Use URB mesh/task min/max values in intel_device_info
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41789>
2026-05-28 20:27:23 +00:00
José Roberto de Souza
45d9c2c14b intel/dev: Add URB max entries values
Right now this value is not use but it will in the next patch.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41789>
2026-05-28 20:27:23 +00:00
José Roberto de Souza
0cc89ca03a intel/dev: Remove unused intel_get_device_info_for_build() function
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41789>
2026-05-28 20:27:23 +00:00
Eric Engestrom
97391328a3 drirc: move 00-$drv-defaults.conf to each driver's folder
Makes more send to put them there, and it means that modifying them will
only trigger the CI jobs for that driver and not everything.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41866>
2026-05-28 19:55:05 +00:00