Commit graph

207345 commits

Author SHA1 Message Date
Jose Maria Casanova Crespo
cac92fecac broadcom/qpu: support output pack on itof/utof
itof and utof natively support packing the f32 result to f16
(.l/.h), but the encode/decode paths fell through to the default
case and rejected any non-NONE pack, breaking nir_op_i2f16 /
nir_op_u2f16 codegen with "Failed to pack instruction: itof rfN.l".

Assisted-by: Claude Opus 4.7
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41810>
2026-06-04 13:29:38 +00:00
Job Noorman
5943d01e86 tu: add option to override the build ID
Add the tu-build-id meson option to force the build ID to a particular
value. This allows us the share the shader cache between different
builds. This enables, for example, sharing the cache between x86
drm-shim and aarch64 native builds.

Also add tu_override_{graphics,compute}_shader_version driconf options
to force recompilation of shaders even when tu-build-id stays the same.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41954>
2026-06-04 12:44:13 +00:00
Job Noorman
59438fba2a tu: use chip_id instead of gpu_id for the cache UUID
gpu_id has been deprecated for a while. Moreover, drm-shim actually sets
a gpu_id for a7xx devices (while native builds do not) making the cache
UUID inconsistent.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41954>
2026-06-04 12:44:13 +00:00
Job Noorman
920a93170d freedreno/drm-shim: allow chip selection by chip_id
gpu_id has been deprecated for a while, add a new env var (FD_CHIP_ID)
to select a chip by chip_id.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41954>
2026-06-04 12:44:13 +00:00
squidbus
1e08ccf28d kk: Advertise additional tessellation dynamic state
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
These are already supported by the tessellation implementation.

Reviewed-by: Aitor Camacho <aitor@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42016>
2026-06-04 12:29:14 +00:00
squidbus
94295fda67 kk: Support VK_EXT_external_memory_host
Metal does not support importing host memory pointers into MTLHeap,
only MTLBuffer. Buffers can import without issue, and images are
restricted to linear images without flags requiring aliasing.

Reviewed-by: Aitor Camacho <aitor@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41894>
2026-06-04 12:12:09 +00:00
Aitor Camacho
68048759f0 kk: Implement tessellation
Same approach as HK for tessellation. It also handles instance_id lowering.
instance_id_includes_base_index is not taken into account in multiple
other passes that use instance id. These passes expect instance id to
actually be instance id. This change adds a pass to work around this.

Signed-off-by: Aitor Camacho <aitor@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41038>
2026-06-04 11:11:08 +00:00
Aitor Camacho
84929be129 kk: Rework shader compilation to handle more than 2 stages
Integrate poly module and support tessellation stage compilation

Signed-off-by: Aitor Camacho <aitor@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41038>
2026-06-04 11:11:08 +00:00
Aitor Camacho
7317282488 kk: Rework draw dispatch
Tessellation and geometry stages require emulation by launching
pre-graphics compute workloads, modifying the draw index and switching to
indirect. However, since these emulation steps can only take one draw at
a time (multi draw being the issue), we need to accommodate this limitation
by splitting kk_draw_data into 2. A constant structure that maintains the
initial values such as is restart enabled, index buffer, etc. and a second
structure containing the modified values used to dispatch the Metal draw
call.

This change also early returns if any of the emulation steps fail instead
of allowing the draw to continue to avoid potential issues.

Signed-off-by: Aitor Camacho <aitor@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41038>
2026-06-04 11:11:07 +00:00
squidbus
9405760aad kk: Support VK_IMAGE_CREATE_BLOCK_TEXEL_VIEW_COMPATIBLE_BIT
Adds layer size and mip level offset information to image layouts.
With this information, we can calculate the subresource accessed for
block texel view and create an aliased texture in the intended format.

Reviewed-by: Aitor Camacho <aitor@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41900>
2026-06-04 03:29:13 -07:00
squidbus
b93602e16a kk: Fence read-write images after write
Metal does not guarantee that image reads after writes will be coherent,
requiring us to insert fences for read-write textures.

Reviewed-by: Arcady Goldmints-Orlov <arcady@lunarg.com>
Reviewed-by: Aitor Camacho <aitor@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41900>
2026-06-04 03:24:23 -07:00
Jose Maria Casanova Crespo
03dee27f48 v3dv: expose the full simulator memory to applications
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
On real hardware compute_heap_size() reserves a fraction of total_ram for
the rest of the system and compute_memory_budget() reports at most 90% of
the available memory, both because that RAM is shared between the GPU and
the CPU. In simulator mode the memory is instead a dedicated GPU pool
allocated by the simulator, so these reservations just hid memory: although
we allocate 1 GiB for the simulator, only 512 MiB was exposed as the heap
and as the budget.

Expose the full simulator allocation as both the heap size and the budget.
The simulator never allocates more than the 4 GiB the GPU MMU can address,
which we assert.

Before:
  memoryHeaps[0]:
    size   = 536870912 (0x20000000) (512.00 MiB)
    budget = 536870912 (0x20000000) (512.00 MiB)

After:
  memoryHeaps[0]:
    size   = 1073741824 (0x40000000) (1024.00 MiB)
    budget = 1073725536 (0x3fffc060) (1023.98 MiB)

Assisted-by: Claude Opus 4.8
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41898>
2026-06-04 09:35:38 +00:00
Rob Clark
27a8ca79b1 freedreno/perfcntrs: Expose gen8 counters
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41158>
2026-06-04 08:57:56 +00:00
Rob Clark
f7a41c26ff freedreno/a6xx: Program gen8+ slice SEL regs
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41158>
2026-06-04 08:57:56 +00:00
Rob Clark
ca616c2b64 tu/gen8: Program slice selector regs
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41158>
2026-06-04 08:57:56 +00:00
Rob Clark
68163a732e tu: Disable preemption for counters on gen8
Extend the CP_SCOPE_CNTL to gen8 and newer.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41158>
2026-06-04 08:57:56 +00:00
Rob Clark
89b25531cb freedreno: Skip BV perfcntrs
Not useful unless we expose concurrent binning.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41158>
2026-06-04 08:57:56 +00:00
Rob Clark
cde274fc6c freedreno/perfcntrs: Use helper for derived counters
Use helper to assign/reserve counters for derived counters.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41158>
2026-06-04 08:57:56 +00:00
Rob Clark
5f4bf61653 freedreno/perfcntrs: Refactor derived counter setup
Most of what is done here doesn't need to be duplicated per hw gen.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41158>
2026-06-04 08:57:56 +00:00
Rob Clark
71ae168c7a freedreno/a6xx: Use counter allocation helper
If the kernel supports PERFCNTR_CONFIG for counter reservation, we can
expose perfcntrs by default.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41158>
2026-06-04 08:57:56 +00:00
Rob Clark
b6938c4c33 tu: Use counter allocation helper
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41158>
2026-06-04 08:57:56 +00:00
Rob Clark
57ced39635 freedreno/perfcntrs: Add helper to assign counters
Add a helper to allocate a counter for a requested countable, and (if
supported by KMD) do the PERFCNTR_CONFIG ioctl to reserve the counter
for UMD local (inline) usage.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41158>
2026-06-04 08:57:56 +00:00
Rob Clark
4282d1edc9 freedreno/perfcntrs: Add helpers to resolve group and countable
We were duplicating this in a few places.  Add helpers instead.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41158>
2026-06-04 08:57:56 +00:00
Rob Clark
7bbdf0ffb7 freedreno/ds: Add a8xx derived counters
Mostly just some counter renames (slice vs unslice, etc)

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41158>
2026-06-04 08:57:56 +00:00
Rob Clark
b39cb31e66 freedreno/ds: PERFCNTR_CONFIG support
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41158>
2026-06-04 08:57:56 +00:00
Rob Clark
8f7f9c0897 freedreno/fdperf: Add PERFCNTR_CONFIG support
Add support for the new ioctl for KMD global counter collection.  This
avoids needing hacks to parse dtb and mmap the GPU's i/o space.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41158>
2026-06-04 08:57:56 +00:00
Rob Clark
bd5e3a2675 freedreno/fdperf: Prepare for partial-counter usage
With PERFCNTR_CONFIG, some other process may have already reserved some
counters, so not all will be available to fdperf.  Prepare for this by
using num_counters in counter_group.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41158>
2026-06-04 08:57:56 +00:00
Rob Clark
e601474339 freedreno/fdperf: Move where we setup counter groups
Move this earlier so we have the counter config early enough to probe
kernel support for PERFCNTR_CONFIG with a valid config.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41158>
2026-06-04 08:57:56 +00:00
Rob Clark
15669a6981 freedreno/common: Add ioctl ptr helpers
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41158>
2026-06-04 08:57:56 +00:00
Lorenzo Rossi
830cd2dc47 nir/opt_algebraic: Optimize mediump fadd/fmul done in highp
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
When we do f2fmp(fadd(f2f32(a), f2f32(b))) we can always optimize it to
fadd(a, b) and obtain the same result minus an intermediate rounding
step, same for fmul.

I verified this on CPU using a custom script with Berkley SoftFloat
implementation, the results there are bit-for-bit identical except for
NaN representations.

Signed-off-by: Lorenzo Rossi <lorenzo.rossi@collabora.com>
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Reviewed-by: Ashley Smith <ashley.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41419>
2026-06-04 07:33:23 +00:00
Tapani Pälli
fdb9ce6087 anv: skip writing xfb buffer if we get null information
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/work_items/15582
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41930>
2026-06-04 05:30:22 +00:00
Paulo Zanoni
095e4f5f1b brw: control cache_mode through bypass_{l1,l3} variables
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
This change splits the algorithm in two steps: first we have the
logical decision of which caches to bypass based on the needs of the
send operation, and then we have the code that picks the caching modes
based on which caches to bypass.

This should make it significantly easier for us to add new workarounds
without the risk of breaking existing cases.

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41319>
2026-06-04 00:08:44 +00:00
Paulo Zanoni
7fec64063e brw: have a single if-ladder to pick cache_modes
Instead of having an if ladder followed by another if that overwrites
the previous result, have a single if ladder.

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41319>
2026-06-04 00:08:44 +00:00
Paulo Zanoni
6b52263d84 brw: split cache mode selection into atomic, load and store modes
This is the next - but not final - step into making this function more
organized: split cache_mode into atomic, load and store versions, then
pick the version at the end.

v2: Initialize {load,store}_cache_mode (Sagar).

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41319>
2026-06-04 00:08:44 +00:00
Paulo Zanoni
2fcaa19a96 intel/brw: move cache_mode assignment to after send->sfid choice
We have code to choose cache_mode before send->sfid is assigned, but
after it we have more code to choose cache_mode that relies on
send->sfid. Move everything to after the selection of send->sfid so
the code to pick cache_mode is all together. I plan to simplify this
futher in the next commits, the goal of this patch is to make the next
diff easier to read.

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41319>
2026-06-04 00:08:44 +00:00
Christian Gmeiner
75a0cd6e2c mesa: Allow GL_TEXTURE_IMMUTABLE_LEVELS query on GLES3
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
GL_TEXTURE_IMMUTABLE_LEVELS is core state in OpenGL ES 3.0 (it comes with
immutable textures / glTexStorage), queryable through glGetTexParameter. The
getter only allowed it when ARB_texture_view or OES_texture_view is present, so
a GLES3 driver without texture views returns GL_INVALID_ENUM for a valid query.
Its sibling GL_TEXTURE_IMMUTABLE_FORMAT is correctly ungated.

Allow the query on any GLES3 context, matching the spec.

Fixes 8 dEQP-GLES3.functional.state_query.texture.*_immutable_levels_* cases on
etnaviv (which exposes neither texture-view extension).

Fixes: 214fd4e40d ("mesa/main: fix texture view enum checks")
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41910>
2026-06-03 21:53:19 +00:00
Ryan Zhang
072041a809 gfxstream/platform: add missing inc_include to platform_virtgpu build
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
src/gfxstream/guest/platform/VirtGpu.cpp
| In file included from ../sources/mesa-26.0.6.imx/src/util/os_misc.h:42,
|                  from ../sources/mesa-26.0.6.imx/src/gfxstream/guest/platform/VirtGpu.cpp:12:
| ../sources/mesa-26.0.6.imx/src/util/u_math.h:42:10: fatal error: c99_compat.h: No such file or directory
|    42 | #include "c99_compat.h"
|       |          ^~~~~~~~~~~~~~
| compilation terminated.

Fixes: 5826a0a ("gfxstream: meson format -i {all meson files}")

Signed-off-by: Ryan Zhang <ryan.zhang@nxp.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41978>
2026-06-03 21:35:50 +00:00
Jason Macnak
5caeb57bce gfxstream: Override VkDeviceDeviceMemoryReportCreateInfoEXT vk.xml
`VkDeviceDeviceMemoryReportCreateInfoEXT::pUserData` was updated to have
`optional` sometime between v1.4.335 and v1.4.337 which updates codegen
in a backwards incompatible way. VkDeviceDeviceMemoryReportCreateInfoEXT
should not really be sent to the host anyways (as a guest provided callback
can never be called from the host) but older existing guest images are
already sending this struct so we need to preserve compatibility.

Bug: b/519606352
Test: GfxstreamEnd2EndTests
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42007>
2026-06-03 21:19:45 +00:00
Pavel Ondračka
0529608157 r300: clean up some dead draw/TGSI leftovers
Remove the unused tgsi_dump include, the stale nir_to_tgsi comment, the
redundant freshly-allocated null check, and the dead VS/FS delete branches.

Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41925>
2026-06-03 22:41:38 +02:00
Pavel Ondračka
d4d8273688 r300: remove dead first-time build path from r300_pick_vertex_shader
r300_create_vs_state always allocates vs->first and builds the initial shader
variant before the state can be bound, so the !vs->first path in
r300_pick_vertex_shader is unreachable.

Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41925>
2026-06-03 22:41:38 +02:00
Pavel Ondračka
78f49dc25b r300: convert swtcl vertex shader setup to NIR
Replace the TGSI-based r300_draw_init_vertex_shader with a NIR
implementation, removing the nir_to_tgsi call from r300_state.c.

The three transformations previously done via tgsi_transform are now
done directly on a cloned NIR shader:
- Insert missing primary color output if secondary color is present.
- Insert all missing color/bcolor outputs if any back-face color is used.
- Add a WPOS output (copy of gl_Position) in the next available generic
  slot, by duplicating each store_deref to gl_Position to the new output
  at the same point.

The ntr_fixup_varying_slots is applied to the clone before any
transforms, keeping VS outputs aligned with FS inputs.

Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Assisted-by: Claude Sonnet 4.6
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41925>
2026-06-03 22:41:38 +02:00
Pavel Ondračka
1ac1fd6dd3 r300: add NIR pass to add required color outputs
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Assisted-by: Claude Sonnet 4.6
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41925>
2026-06-03 22:41:37 +02:00
Pavel Ondračka
773116b273 r300: add NIR pass to append the wpos output
It just duplicates position write to a generic varying.

Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Assisted-by: Claude Sonnet 4.6
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41925>
2026-06-03 22:41:32 +02:00
Pavel Ondračka
6a29509273 r300: fix vs->first leak in swtcl delete path
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41925>
2026-06-03 22:31:28 +02:00
Faith Ekstrand
711dcde6da compiler/rust/smallvec: Hide the enum
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Even though we use an enum to implement it internally, there's no real
benefit to that enum being exposed to users.  This makes it look more
like any other container type with an opaque implementation.

Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41941>
2026-06-03 18:50:43 +00:00
Faith Ekstrand
f81a494d1d nak: Simplify our SmallVec usage
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41941>
2026-06-03 18:50:43 +00:00
Faith Ekstrand
cb83992970 nak/builder: Use some of the SmallVec improvements
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41941>
2026-06-03 18:50:43 +00:00
Faith Ekstrand
9afad0ad95 nak: Simplify BasicBlock::map_instrs()
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41941>
2026-06-03 18:50:43 +00:00
Faith Ekstrand
d8e586dd3b compiler/rust/smallvec: Implement From<SmallVec<T>> for Vec<T>
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41941>
2026-06-03 18:50:42 +00:00
Faith Ekstrand
5c98f152a3 compiler/rust/smallvec: Implement IntoIterator
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41941>
2026-06-03 18:50:42 +00:00