Commit graph

4732 commits

Author SHA1 Message Date
Jason Ekstrand
ab9220edd6 nir,intel/compiler: Use a fixed subgroup size
The GL_ARB_shader_ballot spec says that gl_SubGroupSizeARB is declared
as a uniform.  This means that it cannot change across an invocation
such as a draw call or a compute dispatch.  For compute shaders, we're
ok because we only ever use one dispatch size.  For fragment, however,
the hardware dynamically chooses between SIMD8 and SIMD16 which violates
the spec.  Instead, let's just pick a subgroup size based on the shader
stage.  The fixed size we choose for compute shaders is a bit higher
than strictly needed but there's no real harm in that.  The advantage is
that, if they do anything interesting with the value, NIR will see it as
an immediate and can optimize better.

Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2017-11-07 10:37:52 -08:00
Jason Ekstrand
a026458020 nir/lower_subgroups: Lower ballot intrinsics to the specified bit size
Ballot intrinsics return a bitfield of subgroups.  In GLSL and some
SPIR-V extensions, they return a uint64_t.  In SPV_KHR_shader_ballot,
they return a uvec4.  Also, some back-ends would rather pass around
32-bit values because it's easier than messing with 64-bit all the time.
To solve this mess, we make nir_lower_subgroups take a new parameter
called ballot_bit_size and it lowers whichever thing it gets in from the
source language (uint64_t or uvec4) to a scalar with the specified
number of bits.  This replaces a chunk of the old lowering code.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2017-11-07 10:37:52 -08:00
Jason Ekstrand
8c2bf020fd nir/builder: Add a nir_imm_intN_t helper
This lets you easily build integer immediates of arbitrary bit size.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2017-11-07 10:37:52 -08:00
Jason Ekstrand
9b35faba42 nir/lower_system_values: Lower SUBGROUP_*_MASK based on type
The SUBGROUP_*_MASK system values are uint64_t when coming in from GLSL
but uvec4 when coming in from SPIR-V.  Lowering based on type allows us
to nicely handle both.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2017-11-07 10:37:52 -08:00
Jason Ekstrand
3ee91ee6ac nir: Make ballot intrinsics variable-size
This way they can return either a uvec4 or a uint64_t.  At the moment,
this is a no-op since we still always return a uint64_t.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2017-11-07 10:37:52 -08:00
Jason Ekstrand
ad127afcfd nir: Add a ssa_dest_init_for_type helper
This would be useful a number of places

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2017-11-07 10:37:52 -08:00
Jason Ekstrand
28da82f978 nir: Add a new subgroups lowering pass
This commit pulls nir_lower_read_invocations_to_scalar along with most
of the guts of nir_opt_intrinsics (which mostly does subgroup lowering)
into a new nir_lower_subgroups pass.  There are various other bits of
subgroup lowering that we're going to want to do so it makes a bit more
sense to keep it all together in one pass.  We also move it in i965 to
happen after nir_lower_system_values to ensure that because we want to
handle the subgroup mask system value intrinsics here.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2017-11-07 10:37:52 -08:00
Jason Ekstrand
295605c930 intel/cs: Push subgroup ID instead of base thread ID
We're going to want subgroup ID for SPIR-V subgroups eventually anyway.
We really only want to push one and calculate the other from it.  It
makes a bit more sense to push the subgroup ID because it's simpler to
calculate and because it's a real API thing.  The only advantage to
pushing the base thread ID is to avoid a single SHL in the shader.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2017-11-07 10:37:52 -08:00
Jason Ekstrand
80ddfab2f5 intel/cs: Rework the way thread local ID is handled
Previously, brw_nir_lower_intrinsics added the param and then emitted a
load_uniform intrinsic to load it directly.  This commit switches things
over to use a specific NIR intrinsic for the thread id.  The one thing I
don't like about this approach is that we have to copy thread_local_id
over to the new visitor in import_uniforms.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2017-11-07 10:37:52 -08:00
Gwan-gyeong Mun
fb87c40a58 nir: fix a typo
Signed-off-by: Mun Gwan-gyeong <elongbug@gmail.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
2017-11-06 18:11:24 -08:00
Dave Airlie
57372c5a42 nir/serialize: fix build with gcc 4.4.7
I had to build on RHEL6 today, and noticed this.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-11-03 15:03:35 +10:00
Timothy Arceri
440d08fe93 nir: skip lowering sampler if there is no dereference
This avoids a crash on the output of nir_lower_bitmap().

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-11-03 14:19:46 +11:00
Timothy Arceri
cf5f8f55c3 nir: add tess patch support to nir_remove_unused_varyings()
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-11-03 08:58:39 +11:00
Jason Ekstrand
54f691311c nir: Add hooks for testing serialization
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2017-10-31 23:36:53 -07:00
Connor Abbott
120da00975 nir: add serialization and deserialization
v2 (Jason Ekstrand):
 - Various whitespace cleanups
 - Add helpers for reading/writing objects
 - Rework derefs
 - [de]serialize nir_shader::num_*
 - Fix uses of blob_reserve_bytes
 - Use a bitfield struct for packing tex_instr data

v3:
 - Zero nir_variable struct on deserialization. (Jordan)
 - Allow nir_serialize.h to be included in C++. (Jordan)
 - Handle NULL info.name. (Jason)
 - Set info.name to NULL when name is NULL. (Jordan)

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
2017-10-31 23:36:53 -07:00
Neil Roberts
b697ece10a nir/opt_intrinsics: Fix values for gl_SubGroupG{e,t}MaskARB
Previously the values were calculated by just shifting ~0 by the
invocation ID. This would end up including bits that are higher than
gl_SubGroupSizeARB. The corresponding CTS test effectively requires that
these high bits be zero so it was failing. There is a Piglit test as
well but this appears to checking the wrong values so it passes.

For the two greater-than bitmasks, this patch adds an extra mask with
(~0>>(64-gl_SubGroupSizeARB)) to force these bits to zero.

Fixes: KHR-GL45.shader_ballot_tests.ShaderBallotBitmasks

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102680#c3
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Neil Roberts <nroberts@igalia.com>
2017-10-31 23:28:00 +01:00
Kenneth Graunke
86c68bb886 nir: Make nir_gather_info collect a uses_fddx_fddy flag.
i965 turns fddx/fddy into their coarse/fine variants based on the
ctx->Hint.FragmentShaderDerivative setting.  It needs to know whether
this can impact a shader in order to better guess NOS settings.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-10-29 20:52:20 -07:00
Jason Ekstrand
e0519294c7 nir/opt_intrinsics: Rework progress
This commit fixes two issues:  First, we were returning false regardless
of whether or not the function made progress.  Second, we were calling
nir_metadata_preserve far more often than needed; we only need to call
it once per impl.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2017-10-25 16:14:09 -07:00
Jason Ekstrand
2cfa3ef438 nir/lower_wpos_ytransform: Support system value intrinsics
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2017-10-25 16:14:09 -07:00
Jordan Justen
78550869a1 nir: Zero nir_load_const_instr::value for valgrind & nir_serialize
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-10-25 12:36:21 -07:00
Jordan Justen
d917f57c2f nir: Zero local_size const struct for valgrind & nir_serialize
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-10-25 12:36:21 -07:00
Jason Ekstrand
c1b84256cc nir/intrinsics: Set the correct num_indices for load_output
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2017-10-25 12:36:20 -07:00
Rob Clark
2207af032b meson: extract out variable for nir_algebraic.py
Also needed in freedreno/ir3.

Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
2017-10-24 15:33:40 -04:00
Eric Anholt
5a0d3e1129 nir: Print the components referenced for split or packed shader in/outs.
Having 4 variables all called "gl_in_TexCoord0@n" isn't very informative,
much better to see:

decl_var shader_in INTERP_MODE_NONE float gl_in_TexCoord0 (VARYING_SLOT_VAR0.x, 1, 0)
decl_var shader_in INTERP_MODE_NONE float gl_in_TexCoord0@0 (VARYING_SLOT_VAR0.y, 1, 0)
decl_var shader_in INTERP_MODE_NONE float gl_in_TexCoord0@1 (VARYING_SLOT_VAR0.z, 1, 0)
decl_var shader_in INTERP_MODE_NONE float gl_in_TexCoord0@2 (VARYING_SLOT_VAR0.w, 1, 0)

v2: Handle arrays and structs better (by Timothy)

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2017-10-20 16:26:46 -07:00
Eric Anholt
d9ce4ac990 nir: Add a safety check that we don't remove dead I/O vars after lowering.
The pass only looks at var load/store intrinsics, not input load/store
intrinsics, so assert that we don't see the other type.

v2: Adjust comment indentation.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2017-10-20 16:26:07 -07:00
Jason Ekstrand
59fb59ad54 nir: Get rid of nir_shader::stage
It's redundant with nir_shader::info::stage.

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2017-10-20 12:49:17 -07:00
Samuel Iglesias Gonsálvez
e382890e25 nir: set default lod to texture opcodes that needed it but don't provide it
v2:
- Use helper to add a new source to the texture instruction.

v3:
- Use nir_tex_instr_src_index() to simplify the patch (Jason).

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-10-20 08:29:09 +02:00
Jason Ekstrand
41c75b5354 nir: Add a helper for adding texture instruction sources
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2017-10-17 07:36:00 -07:00
Timothy Arceri
f1eb5e6399 nir: add component level support to remove_unused_io_vars()
Reviewed-by: Eric Anholt <eric@anholt.net>
2017-10-16 09:06:53 +11:00
Timothy Arceri
6af5e0bec9 nir: add variant of lower_io_to_scalar to be called earlier
This is intended to be called before nir_lower_io() so that we
can do some linking optimisations with the results. It can also
be used with drivers that don't use nir_lower_io() at all such
as RADV.

v2: pass mode mask rather than first and last stage integer.

Reviewed-by: Eric Anholt <eric@anholt.net>
2017-10-16 09:06:53 +11:00
Jason Ekstrand
3442c9fc3e nir: Get rid of the variable on vote intrinsics
This looks like a copy+paste error.  They don't actually write into that
variable as would be implied by putting the return there.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable@lists.freedesktop.org
2017-10-12 22:39:29 -07:00
Jason Ekstrand
a0947921eb nir/opcodes: Fix constant-folding of ufind_msb
We didn't fold correctly in the case of 0x1 because we never let the
loop counter hit 0.  Switching it to bit >= 0 solves this problem.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
2017-10-12 22:39:29 -07:00
Kenneth Graunke
a576c148cd nir: Make nir_shader_gather_info() track texelFetch texture accesses.
For TGSI-based drivers, st_glsl_to_tgsi records this information.
For NIR-based drivers, nir_shader_gather_info() will do so.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-10-12 17:22:42 -07:00
Dave Airlie
2d36efdb7f nir: bump loop unroll limit to 96.
With the ssao demo from Vulkan demos:
radv/rx480: 440->440fps
anv/haswell: 24->34 fps

The demo does a 0->32 loop across a ubo with 32 members.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-10-11 10:11:36 +10:00
Eric Anholt
c34295b1a3 nir: Move vc4's alpha test lowering to core NIR.
I've been doing this inside of vc4, but vc5 wants it as well and it may be
useful for other drivers (Intel has a related path for pre-gen6 with MRT,
and freedreno had a TGSI path for it at one point).

This required defining a common enum for the standard comparison
functions, but other lowering passes are likely to also want that enum.

v2: Add to meson.build as well.

Acked-by: Rob Clark <robdclark@gmail.com>
2017-10-10 11:42:04 -07:00
Dylan Baker
001b65a899 meson: add nir_linking_helpers.c to libnir
This was missed in a rebase, and doesn't affect radv or anv, only i965.

Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2017-10-09 13:42:43 -07:00
Dylan Baker
7a5a986ddd meson: convert gtest to an internal dependency
In truth gtest is an external dependency that upstream expects you to
"vendor" into your own tree. As such, it makes sense to treat it more
like a dependency than an internal library, and collect it's
requirements together in a dependency object.

v2: - include with -isystem instead of setting compiler args (Eric)

Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2017-10-03 10:02:08 -07:00
Dylan Baker
d1992255bb meson: Add build Intel "anv" vulkan driver
This allows building and installing the Intel "anv" Vulkan driver using
meson and ninja, the driver has been tested against the CTS and has
seems to pass the same series of tests (they both segfault when the CTS
tries to run wayland wsi tests).

There are still a mess of TODO, XXX, and FIXME comments in here. Those
are mostly for meson bugs I'm trying to fix, or for additional things to
implement for other drivers/features.

I have configured all intermediate libraries and optional tools to not
build by default, meaning they will only be built if they're pulled in
as a dependency of a target that will actually be installed) this allows
us to avoid massive if chains, while ensuring that only the bits that
need to be built are.

v2: - enable anv, x11, and wayland by default
    - add configure option to disable valgrind
v3: - fix typo in meson_options (Nicholas)
v4: - Remove dead code (Eric)
    - Remove change to generator that was from v0 (Eric)
    - replace if chain with loop (Eric)
    - Fix typos (Eric)
    - define HAVE_DLOPEN for both libdl and builtin dl cases (Eric)
v5: - rebase on util string buffer implementation

Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net> (v4)
2017-09-27 09:12:19 -07:00
Timothy Arceri
45ef10c06a nir: add some helpers for doing linking
The initial helpers add support for removing unused varyings between
stages.

V2:
- Moved the io mask helper function into this file rather than
  nir.h so it's not used elsewhere considering it doesn't handle
  all corner cases.
- Use bitmask rather than hash table to handle tcs outputs (Ken)

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2017-09-26 22:37:02 +10:00
Timothy Arceri
4244bea859 nir: add always_active_io to nir variable
Will be used in nir link pass to decided if we can remove a varying
or not.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
2017-09-26 22:37:02 +10:00
Dave Airlie
42d50c779b nir: put compact into bitfields in nir_variable_data
This being declared bool means it won't get merged with the previous
bitfields, this seems like an oversight rather than deliberate.

Noticed when running pahole.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-09-07 11:00:04 +10:00
Matt Turner
50e4099edf nir: Remove series of unnecessary conversions
Clang warns:

warning: absolute value function 'fabsf' given an argument of type
'const float64_t' (aka 'const double') but has parameter of type 'float'
which may cause truncation of value [-Wabsolute-value]

            float64_t dst = bit_size == 64 ? fabs(src0) : fabsf(src0);

The type of the ternary expression will be the common type of fabs() and
fabsf(): double. So fabsf(src0) will be implicitly converted to double.
We may as well just convert src0 to double before a call to fabs() and
remove the needless complexity, à la

            float64_t dst = fabs(src0);

Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
2017-08-29 15:20:57 -07:00
Jason Ekstrand
63e79a8a77 nir: Fix system_value_from_intrinsic for subgroups
A couple of the cases were backwards

Reviewed-by: Matt Turner <mattst88@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
2017-08-28 08:57:52 -07:00
Jason Ekstrand
79d8d6b022 nir: Fix some whatespace
Somehow tabs got in there...

Reviewed-by: Matt Turner <mattst88@gmail.com>
2017-08-28 08:57:31 -07:00
Connor Abbott
de91461575 nir: fix algebraic optimizations
The optimizations are only valid for 32-bit integers. They were
mistakenly firing for 64-bit integers as well.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Matt Turner <mattst88@gmail.com>
2017-08-01 12:20:49 -07:00
Nicolai Hähnle
e902ac3268 nir: add nir_lower_uniforms_to_ubo pass
This is a further lowering of default-block uniform loads that transforms
load_uniform intrinsics into load_ubo intrinsics. This simplifies the rest
of the backend.

v2: transform from load_uniform instead of straight from variables

Reviewed-by: Eric Anholt <eric@anholt.net>
2017-07-31 14:55:29 +02:00
Nicolai Hähnle
bce6f99875 nir: add nir_lower_samplers_as_deref pass
This pass is a replacement for the nir_lower_samplers pass, which has the
advantage of keeping sampler references as derefs. This allows a unified
treatment of texture instructions and image intrinsics in the backend.
2017-07-31 14:55:29 +02:00
Nicolai Hähnle
f1da97ef7a nir: add load_frag_coord system value intrinsic
Some drivers prefer to treat gl_FragCoord as a system value rather than
a fragment shader input, see Const.GLSLFragCoordIsSysVal.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-07-31 14:55:28 +02:00
Nicolai Hähnle
5011923e09 nir: fix nir_lower_wpos_ytransform when gl_FragCoord is a system value
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-07-31 14:55:28 +02:00
Nicolai Hähnle
b27c2d402e nir: add nir_instr_rewrite_deref
Allows modifying a texture instruction's texture and sampler derefs.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-07-31 14:55:28 +02:00