Commit graph

162190 commits

Author SHA1 Message Date
Mike Blumenkrantz
dbf24c6dca zink: simplify image deref handling
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19327>
2022-10-27 22:01:34 +00:00
Mike Blumenkrantz
49a387720e zink: add a nir pass for CL image typing and sampler tracking
cl images and samplers come through untyped, so they need to be typed
before they can be used

samplers are also not combined into the descriptor, so track a mask which
can be used later for emission

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19327>
2022-10-27 22:01:34 +00:00
Mike Blumenkrantz
c67dc62a4c zink: pass image type to image emission
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19327>
2022-10-27 22:01:34 +00:00
Mike Blumenkrantz
b2fcb34e97 zink: rework sampler emission
this simplifies all the different sampler metadata tracking fields to be
more comprehensible

it also increases some array sizes in case future work increases them outside
the compiler areas

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19327>
2022-10-27 22:01:34 +00:00
Mike Blumenkrantz
037bbabcb9 zink: pass KERNEL shaders through successfully
basically just merging with COMPUTE cases

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19327>
2022-10-27 22:01:34 +00:00
Mike Blumenkrantz
2a08b97330 zink: match bitsizes in bo rewriting
technically this matters

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19327>
2022-10-27 22:01:34 +00:00
Lionel Landwerlin
e59c4a912b intel/fs: use fs implementation of dump_instructions
This specialized version prints out the liveness count as well as the
maximum liveness count. It was eye opening when seeing the max
liveness jump after lowering of packing instructions which should not
have changed the count.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18657>
2022-10-27 21:05:00 +00:00
Lionel Landwerlin
e5dfff0946 intel/fs: reduce liveness of variables in lowering passes
When lowering a single instruction with a destination VGRF to 2 or
more, the VGRF is now considered partially written by each generated
instruction and that increases its liveness especially in loops. Thus
potentially increasing the number of spills/fills due to register
allocation.

Putting an UNDEF instruction in front of the lowered instructions
allows the IR to limit the liveness of the VGRF, reducing register
pressure.

This has a pretty dramatic effect on spills/fills for RT shaders. Here
the stats on Q2RTX shaders on DG2 (wipping out any spills/fills due to
register allocation) :

Instructions in all programs: 26150 -> 24955 (-4.6%)
SENDs in all programs: 1148 -> 1148 (+0.0%)
Loops in all programs: 4 -> 4 (+0.0%)
Cycles in all programs: 392179 -> 332787 (-15.1%)
Spills in all programs: 132 -> 116 (-12.1%)
Fills in all programs: 262 -> 154 (-41.2%)

Shader-db results on TGL :

total instructions in shared programs: 21158140 -> 21158377 (<.01%)
instructions in affected programs: 76629 -> 76866 (0.31%)
helped: 18
HURT: 20
helped stats (abs) min: 1 max: 60 x̄: 18.89 x̃: 12
helped stats (rel) min: 0.21% max: 3.61% x̄: 1.02% x̃: 0.77%
HURT stats (abs)   min: 1 max: 79 x̄: 28.85 x̃: 18
HURT stats (rel)   min: 0.04% max: 2.81% x̄: 1.13% x̃: 0.79%
95% mean confidence interval for instructions value: -4.82 17.30
95% mean confidence interval for instructions %-change: -0.34% 0.57%
Inconclusive result (value mean confidence interval includes 0).

total loops in shared programs: 5753 -> 5753 (0.00%)
loops in affected programs: 0 -> 0
helped: 0
HURT: 0

total cycles in shared programs: 798856834 -> 798870688 (<.01%)
cycles in affected programs: 6208395 -> 6222249 (0.22%)
helped: 22
HURT: 17
helped stats (abs) min: 2 max: 8794 x̄: 1438.18 x̃: 782
helped stats (rel) min: 0.05% max: 2.28% x̄: 0.63% x̃: 0.44%
HURT stats (abs)   min: 2 max: 19178 x̄: 2676.12 x̃: 1358
HURT stats (rel)   min: 0.04% max: 23.49% x̄: 2.25% x̃: 0.71%
95% mean confidence interval for cycles value: -952.19 1662.65
95% mean confidence interval for cycles %-change: -0.64% 1.90%
Inconclusive result (value mean confidence interval includes 0).

total spills in shared programs: 4078 -> 4066 (-0.29%)
spills in affected programs: 40 -> 28 (-30.00%)
helped: 2
HURT: 0

total fills in shared programs: 2856 -> 2832 (-0.84%)
fills in affected programs: 127 -> 103 (-18.90%)
helped: 2
HURT: 0

total sends in shared programs: 998554 -> 998554 (0.00%)
sends in affected programs: 0 -> 0
helped: 0
HURT: 0

LOST:   0
GAINED: 0

Total CPU time (seconds): 2346.06 -> 2304.80 (-1.76%)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18657>
2022-10-27 21:05:00 +00:00
Lionel Landwerlin
dd6d40429b intel/fs: make split_virtual_grfs deal with partial undefs
v2: fix up UNDEFs instructions (Curro)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18657>
2022-10-27 21:05:00 +00:00
Lionel Landwerlin
14b99df7d9 intel/fs: require UNDEFs register offsets to be aligned to REG_SIZE
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18657>
2022-10-27 21:05:00 +00:00
Emma Anholt
59ecbe3fe2 turnip: Fix reservation for indirect compute's IR3_DP_SUBGROUP_ID_SHIFT.
Fixes an assert in GravityMark.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19203>
2022-10-27 20:31:34 +00:00
Alyssa Rosenzweig
78785f3b18 pan/mdg: Don't schedule across memory barrier
Fixes KHR-GLES31.core.shader_image_load_store.basic-glsl-misc-cs

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19238>
2022-10-27 20:13:11 +00:00
Alyssa Rosenzweig
027ee6c9e9 panfrost: Lower MAX_BLOCK_SIZE on Midgard
To match PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK, having it be higher in any
dimension is nonsensical and can confuse apps. Fixes tests in
KHR-GLES31.core.texture_buffer.* on Mali-T860.

Fixes: 9b19104a30 ("pan/mdg: Lower PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK on Midgard")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19238>
2022-10-27 20:13:11 +00:00
Alyssa Rosenzweig
934f9bbae7 panfrost: Avoid a XFB special case
This worked around an issue that doesn't apply to the Valhall XFB lowering.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19238>
2022-10-27 20:13:11 +00:00
Alyssa Rosenzweig
0955fe8fe2 panfrost: Use compute-based XFB on Midgard
Now we're back to a single XFB implementation for all gens. Fixes:

   KHR-GLES31.core.draw_indirect.advanced-twoPasses-transformFeedback-arrays
   KHR-GLES31.core.draw_indirect.advanced-twoPasses-transformFeedback-elements

Cc: mesa-stable
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19238>
2022-10-27 20:13:11 +00:00
Alyssa Rosenzweig
9e2ce225e6 pan/mdg: Fix 64-bit address arithmetic
Cc: mesa-stable
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19238>
2022-10-27 20:13:11 +00:00
Alyssa Rosenzweig
4a626d9829 pan/bi: Clean up sysval handling a bit
Combine some cases.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19238>
2022-10-27 20:13:11 +00:00
Alyssa Rosenzweig
1e208aaef4 panfrost: Don't allow VS side effects on midgard
So we can use the common XFB lowering, and try to reduce the differences between
Midgard and Bifrost (given that Bifrost is conformant and actively maintained,
and Midgard is neither, getting Midgard as close to Bifrost is in the best
interests of Midgard's long term prospects upstream). Piles of KHR-GLES31 tests
from Fail -> Skip.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19238>
2022-10-27 20:13:11 +00:00
Alyssa Rosenzweig
1bb68d9532 panfrost: Zero polygon list for fragment-only
Even with hierarchical tiling. Otherwise if there's garbage leftover (due to BO
caching), a fragment-only batch can raise DATA_INVALID_FAULT. Fixes many tests
in KHR-GLES31.core.compute_shader.* on Mali-T860, including

   KHR-GLES31.core.compute_shader.build-separable

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19238>
2022-10-27 20:13:11 +00:00
Alyssa Rosenzweig
63320c691a nir/lower_idiv: Inline convert_instr_precise
Now that we only have one convert_instr path, this is simpler.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19303>
2022-10-27 19:37:14 +00:00
Alyssa Rosenzweig
941c37c085 nir/lower_idiv: Remove imprecise_32bit_lowering
NIR has two implementations of lower_idiv, keyed on the
imprecise_32bit_lowering flag. This flag is misleading: the results when
setting this flag "imprecise", they're completely wrong for some values.
If a backend has a native implementation of umul_high, the correct path
isn't that much more expensive. If it doesn't, it's substantially slower
for highp integer divison... but in practice, non-constant highp integer
division is pretty rare.

After a painful migration of the tree, this code path has no more users.
Remove it so nobody else gets the bright idea of using it again.

Closes: #6555
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19303>
2022-10-27 19:37:14 +00:00
Alyssa Rosenzweig
37bbcc2e4a etnaviv: Use correct idiv lowering
imprecise_32bit_lowering produces wrong outputs for some inputs. Do not
use it, it is wrong. The correct lowering generates umul_high
instructions, which need to be lowered via lower_alu. That lowering in
turn produces uadd_carry instructions which also need lowering.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19303>
2022-10-27 19:37:14 +00:00
José Roberto de Souza
5bbe3271e6 hasvk: Fix build around intel_measure_state_changed() call
Fixes: 2bc82581ad ("anv: add support for mesh shading in INTEL_MEASURE")
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19355>
2022-10-27 10:31:30 -07:00
Italo Nicola
89b93f7e34 rusticl: fix MemConstant invalid arg size check
As a memory object, the MemConstant check should be the same as
MemGlobal.

Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19352>
2022-10-27 16:34:56 +00:00
Brian Paul
341babb8a7 llvmpipe: asst. clean-ups in lp_state_fs.c
Move var decls to first use.  Add const qualifiers, comments, etc.

Signed-off-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19330>
2022-10-27 16:10:47 +00:00
Brian Paul
4f4aacad19 llvmpipe: fix comment typo
Signed-off-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19330>
2022-10-27 16:10:47 +00:00
Brian Paul
c2cd0e8218 llvmpipe: s/uint/enum pipe_prim_type/ in lp_setup_context.h
Signed-off-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19330>
2022-10-27 16:10:47 +00:00
Marcin Ślusarz
ea7e331fb8 anv: add mesh shading tracepoints
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19344>
2022-10-27 15:03:28 +00:00
Marcin Ślusarz
63ad8aed41 intel/ds: add new category/stage for draw mesh events
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19344>
2022-10-27 15:03:28 +00:00
Marcin Ślusarz
2bc82581ad anv: add support for mesh shading in INTEL_MEASURE
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19344>
2022-10-27 15:03:28 +00:00
Mike Blumenkrantz
b1b2dee30e zink: add docs for zink_surface
zink_surface is an abstraction that is a superset of pipe_surface,
used for all types of images

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19307>
2022-10-27 14:43:50 +00:00
Mike Blumenkrantz
1e63b24f88 zink: add some breadcrumbs for VK_EXT_multisampled_render_to_single_sampled
at some point someone should hook this extension up to simplify/optimize
the existing msrtt handling

see also #7559

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19307>
2022-10-27 14:43:50 +00:00
Mike Blumenkrantz
919cbc190d zink: delete unused zink_surface member
I think this was used before imageless_framebuffer became a requirement?

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19307>
2022-10-27 14:43:50 +00:00
Mike Blumenkrantz
81713956fe zink: use zink_resource_object::views to defer deferred storage view deletion
this is basically the same thing, so reuse the existing mechanism

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19307>
2022-10-27 14:43:50 +00:00
Mike Blumenkrantz
113e477865 zink: simplify conditional for surface rebind no-ops
the question isn't whether the storage imageview has been created,
it's whether the surface is current for the memory binding

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19307>
2022-10-27 14:43:50 +00:00
Mike Blumenkrantz
52efe113f9 zink: delete stale comment for zink_surface
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19307>
2022-10-27 14:43:50 +00:00
Mike Blumenkrantz
34ec611dc6 zink: simplify swapchain imageview handling
the zink_resource_object::views array already handles this, so don't
duplicate its functionality

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19307>
2022-10-27 14:43:50 +00:00
Lucas Stach
2f7a2ffde8 etnaviv: disable PE_COLOR_FORMAT_OVERWRITE with MSAA
This breaks MSAA, even when compression is not activated. The issue is
mostly theoretical, as we always enable color compression with MSAA, but
I ran into some GPU hangs when I disabled compression to run some tests.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19066>
2022-10-27 14:33:15 +00:00
Lucas Stach
1cdcf45ac8 etnaviv: set LOGIC_OP_UNK24 for MSAA rendering on SMALL_MSAA GPUs
Fixes MSAA corruptions on GC3000. 0x4 seems to be enough to fix the
misrendering, but blob seems to always emit 0x5.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19066>
2022-10-27 14:33:15 +00:00
Lucas Stach
2b11838eff etnaviv: properly size TS buffer for MSAA resources
On GPUs with the SMALL_MSAA feature, color tiles of the MSAA resource
are 256B, even if the GPU doesn't have the CACHE128B256BPERLINE feature.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19066>
2022-10-27 14:33:15 +00:00
Lucas Stach
ca96b3a409 etnaviv: rs: try to find exact format match first
For MSAA downsampling to work correctly, the RS engine needs to know
the exact format of the blit source/target. The compatible formats are
fine as long as the RS is only used as a tiler without doing any
conversion.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19066>
2022-10-27 14:33:15 +00:00
Lucas Stach
0ff96aaef3 etnaviv: rs: fix MSAA alignment adjustment
The RS window alignment restrictions apply to the downsampled side of the
blit, so we must increase the blit size alignment by the MSAA scale to
avoid RS hangs. If a multi-pipe resolve is used (when the GPU doesn't have
the singlebuffer feature) then the Y alignment needs to be increased by
the number of pixel pipes.

The resource allocation has already been fixed to take this additional
alignment requirement into account.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19066>
2022-10-27 14:33:15 +00:00
Lucas Stach
6dfae66016 etnaviv: increase alignment for MSAA resources
The RS window aligment restrictions apply to the downsampled size of a
MSAA resource, so in order to be able to do the downsample blit for all
possible sizes, we must make sure to increase the alignment of the
multisampled resource by the MSAA scale.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19066>
2022-10-27 14:33:15 +00:00
Lucas Stach
391ccff250 etnaviv: handle compressed texture formats in etna_layout_multiple
Instead of special casing compressed formats in the caller, handle
them properly when working out the resource alignment. For good measure
add an assert that the layout is linear, as expected.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19066>
2022-10-27 14:33:15 +00:00
Lucas Stach
88d8775f9e etnaviv: compute linear resource Y alignment in etna_layout_multiple
Instead of adjusting the Y alignment in the callers, just do the
right (and consistent) thing in etna_layout_multiple.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19066>
2022-10-27 14:33:15 +00:00
Lucas Stach
7d38c7cc18 etnaviv: assert valid layout in etna_layout_multiple
This function assigns proper values to the padding and halign parameters
for all valid layouts. Using unreachable() in the default path of the
switch statement asserts that we got a valid layout, so we can get rid of
some superfluous variable initializations and asserts in the call sites.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19066>
2022-10-27 14:33:15 +00:00
Lucas Stach
735718ed33 etnaviv: move etna_layout_multiple into etnaviv_resource.c
The call sites of this function make a number of adjustments to the
padding/alignment returned by this function, which are inconsistent
and still don't cover all necessary cases. To be able to extend this
function move it out of the header and make the parameters passed
more useful by providing all necessary information at once.

No functional change, just a preparation for the following changes.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19066>
2022-10-27 14:33:15 +00:00
Rhys Perry
93fb84237f ac/nir: add ac_nir_lower_ngg_options
These signatures were getting ridiculous.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19340>
2022-10-27 13:31:40 +00:00
Rhys Perry
21a319851a ac/nir: micro-optimize boolean expression
Ignoring SCC spilling, the old version is probably faster because this
mixes uniform and divergent booleans.

fossil-db (navi21):
Totals from 61167 (45.10% of 135636) affected shaders:
Instrs: 29961899 -> 29932551 (-0.10%)
CodeSize: 157407028 -> 157289636 (-0.07%)
Latency: 139671953 -> 139625186 (-0.03%); split: -0.03%, +0.00%
InvThroughput: 21221097 -> 21220756 (-0.00%)
SClause: 750438 -> 750439 (+0.00%)
Copies: 2672846 -> 2582332 (-3.39%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19340>
2022-10-27 13:31:40 +00:00
Martin Roukala (né Peres)
03a6eb2547 zink: mark a test as a flake in RADV expectations
Having only-recently hooked monitoring up for zink-on-radv, I am
starting to capture some flakes. So, I am unsure about the reproduction
rate of this failure, but I can say it is not extremely common.

Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19335>
2022-10-27 13:08:07 +00:00