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Author SHA1 Message Date
Mel Henning
ff7f785f09 nvk: Fix maxVariableDescriptorCount with iub
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Otherwise, we would report very high values for inline uniform block
since NVK_MAX_DESCRIPTOR_SET_SIZE is a lot larger than
NVK_MAX_INLINE_UNIFORM_BLOCK_SIZE.

Fixes
dEQP-VK.api.maintenance3_check.support_count_inline_uniform_block_nonzero_binding_offset
on vulkan-cts-1.4.4.0

Fixes: 6a74b3e311 ("nvk: Support VkDescriptorSetVariableDescriptorCountLayoutSupport")
Reviewed-by: Mohamed Ahmed <mohamedahmedegypt2001@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37878>
 2025-10-15 17:02:56 +00:00
Mike Blumenkrantz
db9dbcbec0 zink: defer swapchain updates for interval changes if acquired image is active 
in the case where an app triggers a swap interval change mid-frame, this handling
previously triggered an immediate swapchain retire and then presented the new swapchain
which had yet to be rendered to

instead, defer swapchain updates to immediately after present when things are
safe to ensure that the right image is always presented

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14104

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37894>
 2025-10-15 12:29:05 -04:00
Gert Wollny
673351bbf3 r600: Fix comparison of strides array when emitting vertex buffers 
The comparison was only comparing a number of bytes where we actually
have to compare a number of dwords (Thanks QuadShader for digging into this)

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14067
Fixes: 659b7eb279 ("r600: better tracking for vertex buffer emission")

v2: use element size instead of type size (Vitaly)

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37856>
 2025-10-15 15:25:04 +00:00
Lionel Landwerlin
49226692e5 brw: fix invalid sparse bitfield offset computation
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dest_size is the number of outputs to be provided into the IR, but the
location of the sparse bitfield in the dst temporary SEND destination
might be different (shorter due to masking of unused components
computed above).

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14094
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37876>
 2025-10-15 14:42:51 +00:00
Anna Maniscalco
a7b7ebf08b freedreno/afuc: Add x1e fw-id 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37886>
 2025-10-15 14:18:36 +00:00
José Roberto de Souza
19de4b82f9 intel/brw: Store and set sfid in memory fences 
sfid is another field that is not preserved after brw_transform_inst_to_send()
so we need to store it before transform and retore it to preserve the sfid value.

Fixes: 0fcce2722f ("brw: Add brw_send_inst")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37823>
 2025-10-15 13:38:08 +00:00
José Roberto de Souza
a259f64595 intel/brw: Call lower_hdc_memory_fence_and_interlock() with brw_send_inst 
With that we can avoid some as_send() calls.

Fixes: 0fcce2722f ("brw: Add brw_send_inst")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37823>
 2025-10-15 13:38:08 +00:00
José Roberto de Souza
5b4deb7d2d intel/brw: Fix LSC fence scope and flush type 
Opcodes SHADER_OPCODE_INTERLOCK and SHADER_OPCODE_MEMORY_FENCE are emitted as
brw_send_inst and at nir to brw conversion the desc field is set with scope and
flush type of the instruction.
But when brw_inst is converted to brw_send_inst all special fields of
brw_send_inst are set to 0, causing scope and flush type to always be 0.

So here calling lower_lsc_memory_fence_and_interlock() with brw_send_inst
parameter and storing the desc before brw_transform_inst_to_send().

I still have not figure out why we need do brw_transform_inst_to_send() even
if it is already a brw_send_inst but not doing so causes a segfault in
foreach_block_and_inst_safe(block, brw_inst, inst, s.cfg) of
brw_lower_logical_sends(), also other opcodes of that function does something
similar so I don't think that is wrong.

Fixes: 0fcce2722f ("brw: Add brw_send_inst")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37823>
 2025-10-15 13:38:08 +00:00
Rhys Perry
2985fb0df3 radv: allow WGP mode with task/mesh 
In practice, mesh shaders probably won't use WGP mode because they use
LDS.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37791>
 2025-10-15 13:37:48 +01:00
Rhys Perry
dd2f34c777 radv: use CU mode when LDS is used 
This improves performance of llama.cpp.

fossil-db (navi21):
Totals from 1598 (2.00% of 79825) affected shaders:
MaxWaves: 30182 -> 29278 (-3.00%); split: +0.04%, -3.03%
Instrs: 1013136 -> 1013065 (-0.01%); split: -0.07%, +0.07%
CodeSize: 5275876 -> 5274948 (-0.02%); split: -0.06%, +0.04%
VGPRs: 86176 -> 88016 (+2.14%); split: -0.22%, +2.36%
SpillVGPRs: 0 -> 11 (+inf%)
Scratch: 0 -> 4096 (+inf%)
Latency: 7954289 -> 7824742 (-1.63%); split: -1.64%, +0.01%
InvThroughput: 1511429 -> 1510912 (-0.03%); split: -0.89%, +0.86%
VClause: 26503 -> 26460 (-0.16%); split: -0.23%, +0.07%
SClause: 19032 -> 19039 (+0.04%); split: -0.01%, +0.05%
Copies: 74577 -> 74329 (-0.33%); split: -0.79%, +0.46%
Branches: 20278 -> 20279 (+0.00%)
VALU: 665079 -> 664831 (-0.04%); split: -0.09%, +0.05%
SALU: 124899 -> 124818 (-0.06%); split: -0.08%, +0.01%
VMEM: 46141 -> 46163 (+0.05%)

fossil-db (navi31):
Totals from 1609 (2.02% of 79825) affected shaders:
MaxWaves: 39724 -> 38880 (-2.12%)
Instrs: 1147767 -> 1147595 (-0.01%); split: -0.04%, +0.03%
CodeSize: 5777072 -> 5776376 (-0.01%); split: -0.03%, +0.02%
VGPRs: 91752 -> 93132 (+1.50%); split: -0.03%, +1.53%
Latency: 7526930 -> 7396201 (-1.74%); split: -1.74%, +0.00%
InvThroughput: 1083131 -> 1088328 (+0.48%); split: -0.45%, +0.93%
VClause: 25864 -> 25789 (-0.29%); split: -0.33%, +0.04%
SClause: 19136 -> 19135 (-0.01%); split: -0.02%, +0.01%
Copies: 80797 -> 80501 (-0.37%); split: -0.42%, +0.05%
VALU: 674455 -> 674160 (-0.04%); split: -0.05%, +0.01%
SALU: 123849 -> 123806 (-0.03%)

fossil-db (gfx1201):
Totals from 1614 (2.02% of 79839) affected shaders:
MaxWaves: 40140 -> 39296 (-2.10%)
Instrs: 1183227 -> 1183102 (-0.01%); split: -0.04%, +0.03%
CodeSize: 6091060 -> 6090636 (-0.01%); split: -0.03%, +0.03%
VGPRs: 90708 -> 92040 (+1.47%); split: -0.01%, +1.48%
Latency: 7588683 -> 7425866 (-2.15%); split: -2.15%, +0.00%
InvThroughput: 1070469 -> 1075700 (+0.49%); split: -0.50%, +0.99%
VClause: 25691 -> 25597 (-0.37%); split: -0.37%, +0.00%
SClause: 19095 -> 19086 (-0.05%); split: -0.05%, +0.01%
Copies: 80753 -> 80452 (-0.37%); split: -0.42%, +0.05%
VALU: 665218 -> 664922 (-0.04%); split: -0.05%, +0.01%
SALU: 144059 -> 144011 (-0.03%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37791>
 2025-10-15 13:37:48 +01:00
Rhys Perry
3e9921f52e radv: only call radv_should_use_wgp_mode() once 
This will let the compiler choose between CU and WGP mode.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37791>
 2025-10-15 13:37:48 +01:00
Daniel Schürmann
b2c44e3a65 amd: change radeon_info::lds_size_per_workgroup for GFX10+ to 64KB
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Even though in WGP-mode, there is a total of 128KB LDS, a single workgroup
can access at most 64KB.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37577>
 2025-10-15 11:20:09 +00:00
Daniel Schürmann
eecd1c020d amd: keep ac_shader_config::lds_size unaligned 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37577>
 2025-10-15 11:20:09 +00:00
Daniel Schürmann
fe6ff6d1ef aco: remove DeviceInfo::lds_encoding_granule and DeviceInfo::lds_alloc_granule 
Use utility functions instead.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37577>
 2025-10-15 11:20:08 +00:00
Daniel Schürmann
f99eba729d amd/common: remove radeon_info::lds_alloc_granularity and radeon_info::lds_encode_granularity 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37577>
 2025-10-15 11:20:08 +00:00
Daniel Schürmann
6fd5766620 amd: add and use utility functions for LDS size encoding 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37577>
 2025-10-15 11:20:08 +00:00
Daniel Schürmann
d49dd4d024 radeonsi: pass calculated LDS size to ACO 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37577>
 2025-10-15 11:20:07 +00:00
Daniel Schürmann
11db02d5d9 radv: calculate LDS allocation requirements independently from the compiler 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37577>
 2025-10-15 11:20:07 +00:00
Daniel Schürmann
b651234414 amd: change ac_shader_config::lds_size to bytes 
We still keep it aligned to allocation granularity.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37577>
 2025-10-15 11:20:07 +00:00
Daniel Schürmann
190bab9b77 radv: use lds_alloc_granularity alignment for stats 
Totals from 780 (0.98% of 79839) affected shaders: (Navi48)

LDS: 5544960 -> 5944320 (+7.20%)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37577>
 2025-10-15 11:20:07 +00:00
Daniel Schürmann
c35d53667e radv: fix max_waves calculation for tesselation 
Totals from 337 (0.42% of 79839) affected shaders: (Navi48)

MaxWaves: 8084 -> 4474 (-44.66%)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37577>
 2025-10-15 11:20:07 +00:00
Daniel Schürmann
216d14fb65 radv/rt: fix LDS size calculation with LLVM for inlined stages 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37577>
 2025-10-15 11:20:07 +00:00
David Rosca
282e8285f1 ac/surface: Limit video modifiers to 64K_S also for VCN 2.2 
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14032
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37819>
 2025-10-15 10:24:29 +00:00
Samuel Pitoiset
e7695cc7c7 radv/ci: bump timeout for radv-gfx1201-vkcts to 5 minutes more
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Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37665>
 2025-10-15 09:18:48 +00:00
Samuel Pitoiset
24a95ed3e5 ci: uprev VKCTS main to db48c34bebaf3359453e44ab151a2ff9f9c58eb2 
RADV is the only driver using main.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37665>
 2025-10-15 09:18:48 +00:00
Erico Nunes
48f3bcdd02 pvr: enable KHR_wayland_surface 
Just expose the extension to enable Wayland WSI.
The current use case for this is being able to run Wayland clients on
e.g. an offscreen compositor.

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37721>
 2025-10-15 08:58:03 +00:00
Pierre-Eric Pelloux-Prayer
f367de85dd radeonsi/tests: add a flag to specify a folder with the cts binaries 
Useful for out of tree builds.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36463>
 2025-10-15 08:27:11 +00:00
Pierre-Eric Pelloux-Prayer
93518e5d62 radeonsi/tests: add an argument to specify a folder with the must pass files 
It's useful when running the various test from an out of tree build.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36463>
 2025-10-15 08:27:11 +00:00
Pierre-Eric Pelloux-Prayer
d453045b87 radeonsi/tests: rename glcts_path -> vk_gl_cts_path 
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36463>
 2025-10-15 08:27:10 +00:00
Pierre-Eric Pelloux-Prayer
522d19966a radeonsi/tests: rename --no-xxx arguments 
Use --xxx instead as it makes it easier to control
enablement/disablement of each suite.
vkcts is disabled by default.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36463>
 2025-10-15 08:27:10 +00:00
Pierre-Eric Pelloux-Prayer
6af562d0df radeonsi/tests: add gfx11_5 to the list 
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36463>
 2025-10-15 08:27:09 +00:00
Pierre-Eric Pelloux-Prayer
67c6f80a54 radeonsi/tests: allow to test radv 
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36463>
 2025-10-15 08:27:09 +00:00
Pierre-Eric Pelloux-Prayer
ce97b6cd6f radeonsi/tests: use black to fix style issues 
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36463>
 2025-10-15 08:27:08 +00:00
Pierre-Eric Pelloux-Prayer
c0c95dc845 util: use F_DUPFD_QUERY on Linux
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F_DUPFD_QUERY has been introduced in 6.10 exactly for the purpose
of telling if 2 fd points at the same file description so use it
first.

If it's not supported, we'll get r=-1 and errno=EINVAL, and we can
fallback on KCMP or epoll.

Acked-by: Simona Vetter <simona.vetter@ffwll.ch>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34447>
 2025-10-15 07:58:12 +00:00
Pierre-Eric Pelloux-Prayer
17e286529b util: mimic KCMP_FILE via epoll when KCMP is missing 
On Linux platforms where KCMP isn't allowed epoll can be used
as a fallback mechanism to provide the same feature.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34447>
 2025-10-15 07:58:12 +00:00
Samuel Pitoiset
88f53906d8 amd,radv,radeonsi: add ac_emit_cp_pfp_sync_me() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37813>
 2025-10-15 07:35:25 +00:00
Samuel Pitoiset
7ead034a06 amd,radv,radeonsi: add ac_emit_cp_copy_data() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37813>
 2025-10-15 07:35:25 +00:00
Samuel Pitoiset
af169d7393 radv: use ac_emit_cp_{acquire,release}_mem_pws() when syncing GE rings 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37813>
 2025-10-15 07:35:24 +00:00
Samuel Pitoiset
0e358cec52 amd,radv,radeonsi: add ac_emit_cp_release_mem_pws() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37813>
 2025-10-15 07:35:24 +00:00
Samuel Pitoiset
c45035ceb4 amd,radv,radeonsi: add ac_emit_cp_acquire_mem_pws() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37813>
 2025-10-15 07:35:23 +00:00
Samuel Pitoiset
6329e282b8 amd,radv,radeonsi: add ac_emit_cp_wait_mem() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37813>
 2025-10-15 07:35:23 +00:00
Samuel Pitoiset
82cbfc964a amd,radv: add ac_emit_write_data_imm() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37813>
 2025-10-15 07:35:20 +00:00
Samuel Pitoiset
ac262c351f amd,radv: add ac_emit_cond_exec() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37813>
 2025-10-15 07:35:20 +00:00
Samuel Pitoiset
34e445e1fc radv: use COPY_DATA_DST_MEM when writing timestamps 
Only for consistency.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37813>
 2025-10-15 07:35:19 +00:00
David Rosca
3e458d06b8 radeonsi/vcn: Support BT2020 matrix with EFC 
Acked-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37058>
 2025-10-15 06:06:44 +00:00
David Rosca
8b194cb0ac pipe: Remove pipe_video_vpp_color_standard_type 
Acked-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37058>
 2025-10-15 06:06:44 +00:00
David Rosca
f59e0971b5 pipe: Remove PIPE_VIDEO_CAP_VPP_SUPPORT_HDR_INPUT/OUTPUT 
Acked-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37058>
 2025-10-15 06:06:44 +00:00
David Rosca
a337a97429 gallium/vl: Remove vl_compositor_set_csc_matrix 
Acked-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37058>
 2025-10-15 06:06:44 +00:00
David Rosca
a46aeff216 gallium/vl: Remove luma key support 
This was only used for VDPAU.

Acked-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37058>
 2025-10-15 06:06:44 +00:00
David Rosca
69717c257f vl,frontends/va: Implement gamma and primaries conversion 
This enables basic HDR support.

Acked-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37058>
 2025-10-15 06:06:44 +00:00