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Author SHA1 Message Date
Alyssa Rosenzweig
bf910ce825 asahi: allow compute blitter to handle rgb9e5 blits 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30981>
 2024-09-02 23:27:15 +00:00
Alyssa Rosenzweig
93695ceb48 asahi: factor out agx_usc_shared_non_fragment 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30981>
 2024-09-02 23:27:15 +00:00
Alyssa Rosenzweig
4541688a85 asahi: allow rgb9e5 rendering internally 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30981>
 2024-09-02 23:27:15 +00:00
Alyssa Rosenzweig
bcddf041eb asahi: optimize aligned blits 
we can optimize out a lot of logic in this (common) case.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30981>
 2024-09-02 23:27:15 +00:00
Alyssa Rosenzweig
93785ae2fb asahi: skip unmapped bo in fault dbg 
segfault

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30981>
 2024-09-02 23:27:15 +00:00
Alyssa Rosenzweig
1e2dcae4da asahi,hk: deduplicate txf sampler settings 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30981>
 2024-09-02 23:27:15 +00:00
Alyssa Rosenzweig
1f45aa37e0 asahi,ail: pull texture view logic into ail 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30981>
 2024-09-02 23:27:15 +00:00
Alyssa Rosenzweig
ed08fe94d2 libagx: add in-place decompression kernel 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30981>
 2024-09-02 23:27:15 +00:00
Alyssa Rosenzweig
3497cd2ed2 asahi/clc: add bindless image intrinsics 
for decomp.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30981>
 2024-09-02 23:27:15 +00:00
Alyssa Rosenzweig
b4b4c1908c ail: add enums/queries for AGX compression modes 
r/e'd black box by trying stuff and seeing what dEQP tests pass (:

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30981>
 2024-09-02 23:27:15 +00:00
Alyssa Rosenzweig
942dd5aa66 ail: add metadata width/height in tile helpers 
for decompress kernels

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30981>
 2024-09-02 23:27:14 +00:00
Alyssa Rosenzweig
9f1e2e5053 ail: clarify metadata buffer calculation 
there's a very good reason that the calculation is what it is.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30981>
 2024-09-02 23:27:14 +00:00
Alyssa Rosenzweig
b0a8e623f9 ail: consider format for compressability 
share the query

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30981>
 2024-09-02 23:27:14 +00:00
Alyssa Rosenzweig
f977c52b84 ail: swallow up formats 
ail is a more sensible place for the format tables to live. this does create a
bit of dependency soup but hey.

nfc

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30981>
 2024-09-02 23:27:14 +00:00
Alyssa Rosenzweig
06a48375c8 agx: fix wait_pix scheduling with eMRT 
unclear how this didn't blow up before.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30981>
 2024-09-02 23:27:14 +00:00
Alyssa Rosenzweig
05d535cb87 agx: support bindless block image store 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30981>
 2024-09-02 23:27:14 +00:00
Alyssa Rosenzweig
afc7557cb6 nir,agx: make block image store an image() intrinsic 
so we can do a bindless version

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30981>
 2024-09-02 23:27:14 +00:00
Alyssa Rosenzweig
4941d71846 nir/divergence_analysis: handle load_agx 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30981>
 2024-09-02 23:27:14 +00:00
Robert Mader
ec0c103b32 egl: Add more errors cases during context creation 
In 9cc3e842bb an explicit check whether drivers support
PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR was added to
EGL_CONTEXT_OPENGL_ROBUST_ACCESS_EXT. Add respective checks in similar
places as well.

Signed-off-by: Robert Mader <robert.mader@collabora.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30728>
 2024-09-02 21:59:09 +00:00
Dave Airlie
af425a63f7 vulkan/video: fix vui encoding 
This is a single bit field.

Fixes: d46162981a ("vulkan/video: add h264 headers encode")
Reviewed-by: Hyunjun Ko <zzoon@igalia.com>
Tested-by: Bernhard C. Schrenk <clemy@clemy.org>
Reviewed-by: Bernhard C. Schrenk <clemy@clemy.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30968>
 2024-09-02 21:15:13 +00:00
Georg Lehmann
9bb10b58f3 aco: use v_cvt_pk_u8_f32 for f2u8 
Foz-DB Navi31:
Totals from 42 (0.05% of 79395) affected shaders:
Instrs: 3253747 -> 3248867 (-0.15%); split: -0.15%, +0.00%
CodeSize: 16690136 -> 16661772 (-0.17%); split: -0.17%, +0.00%
VGPRs: 4176 -> 4128 (-1.15%)
Latency: 18485157 -> 18479752 (-0.03%); split: -0.03%, +0.00%
InvThroughput: 3659404 -> 3658222 (-0.03%); split: -0.03%, +0.00%
Copies: 231891 -> 228145 (-1.62%)
VALU: 1785800 -> 1782054 (-0.21%)

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29532>
 2024-09-02 19:49:20 +00:00
Connor Abbott
46ad5a01a8 freedreno: Rename CP_SET_CTXSWITCH_IB to CP_SET_AMBLE 
To match kgsl. Also make KMD_AMBLE_TYPE match the kgsl name, and invent
some names for the other types to be consistent.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30942>
 2024-09-02 18:36:47 +00:00
Caio Oliveira
5be6f3b089 intel/executor: Fix SWSB for sync.nop 
Surfaced after recent improvements on SWSB handling, the previous
assembly code was gracefully lowering the $1 into $1.dst.

Fixes: 37674196221 ("intel: Add executor tool")
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30960>
 2024-09-02 16:07:55 +00:00
Daniel Schürmann
6ada0170c4 aco/ra: use arena allocator for hash maps 
Also change Key types to uint32_t instead of unsigned.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30898>
 2024-09-02 15:31:52 +00:00
Daniel Schürmann
709f60e71d aco/ra: use auto for std container iterators 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30898>
 2024-09-02 15:31:52 +00:00
Daniel Schürmann
534031761a aco/ra: avoid rename map lookups in most cases 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30898>
 2024-09-02 15:31:52 +00:00
Daniel Schürmann
72464e24b4 aco/ra: add add_rename() helper 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30898>
 2024-09-02 15:31:51 +00:00
David Rosca
c447c6fe17 egl/wayland: Fix flush after blit in swap buffers multi-GPU case 
dri2_wl_swap_buffers_with_damage is not used by swrast, so the swrast
condition there is wrong and instead it should always flush.

Fixes: fd17c018e9 ("egl/wayland: replace a couple DRI2_FLUSH checks with non-kms_swrast checks")
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30964>
 2024-09-02 13:22:30 +00:00
Georg Lehmann
8f3bb1fb2e aco/ra: always reuse def register for literal copy 
Foz-DB Vega10:
Totals from 4056 (6.43% of 63053) affected shaders:
Instrs: 5540797 -> 5540760 (-0.00%); split: -0.00%, +0.00%
CodeSize: 29680912 -> 29680812 (-0.00%); split: -0.00%, +0.00%
SGPRs: 307808 -> 307680 (-0.04%)
Latency: 82483179 -> 82484437 (+0.00%); split: -0.00%, +0.00%
InvThroughput: 45546645 -> 45547091 (+0.00%); split: -0.00%, +0.00%
SClause: 185641 -> 185648 (+0.00%); split: -0.00%, +0.01%
Copies: 642229 -> 642214 (-0.00%); split: -0.01%, +0.01%
SALU: 643132 -> 643107 (-0.00%); split: -0.01%, +0.01%

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30932>
 2024-09-02 11:09:55 +00:00
Georg Lehmann
5fb54d1fde aco/ra: fix copying 64bit literal to sgprs 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30932>
 2024-09-02 11:09:55 +00:00
Georg Lehmann
364764356c aco/ra: use parallelcopy to copy literal instead of s_mov 
This can result in smaller code size.

Foz-DB Vega10:
Totals from 4745 (7.53% of 63053) affected shaders:
CodeSize: 33014176 -> 33007088 (-0.02%); split: -0.02%, +0.00%
Copies: 690055 -> 704738 (+2.13%)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30932>
 2024-09-02 11:09:55 +00:00
Georg Lehmann
607cf5a8e9 aco/ra: unconditionally replace literal with sgpr when promoting to VOP3 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30932>
 2024-09-02 11:09:55 +00:00
Samuel Pitoiset
8873382703 radv: fix emitting DGC indirect draws with drawid/base_instance 
This fixes test_execute_indirect_state_vbo_offsets, a new vkd3d-proton
test.

The drawid/base_instance bits were cleared by mistake.

Fixes: e59a16bbb8 ("radv: use an indirect draw when IBO isn't updated as part of DGC")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30971>
 2024-09-02 09:58:32 +00:00
Juan A. Suarez Romero
1536b7e9a8 v3d/v3dv: build simulator references conditionally 
Instead of checking on run time if simulator is available or not, do it
at build time.

Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30900>
 2024-09-02 09:34:10 +00:00
Juan A. Suarez Romero
bf37bd7e26 vc4: build simulator references conditionally 
Instead of checking on run time if simulator is available or not, do it
at build time.

Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30900>
 2024-09-02 09:34:10 +00:00
Samuel Pitoiset
e4e789ce10 radv: allow VK_EXT_legacy_vertex_attributes with DGC 
Dynamic vertex input state is supported with DGC but it wasn't at the
time this extension has been introduced.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30957>
 2024-09-02 09:09:07 +00:00
Collabora's Gfx CI Team
b32b15f0df Uprev Piglit to 93b4bd2e0aaab1c22ae3e1a23f9e057a8f7451b2 
a3826de3c2...93b4bd2e0a

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30863>
 2024-09-02 08:30:51 +00:00
Jose Maria Casanova Crespo
5fed6bee19 v3d: v3d_resource Use LINEAR layout for importing with INVALID modifier 
v3d_resource_from_handle when importing a DRM_FORMAT_MOD_INVALID
considered that if we had a render-only device the resource layout was
linear and if we didn't have render-only the resource layout was tiled.

This change honors the resource creation with the SCANOUT flag
independently of the availability of the render-only for the
DRM_FORMAT_MOD_INVALID modifier.

It also fixes most of the failing piglit text for:

spec@ext_image_dma_buf_import@ext_image_dma_buf_import.*

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11594
Cc: mesa-stable
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30946>
 2024-09-02 10:01:12 +02:00
Pavel Ondračka
9a213b882e r300/ci: add more flakes 
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30966>
 2024-09-01 17:34:43 +02:00
Juan A. Suarez Romero
86c5298cdf vc4/ci: update expected results 
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30965>
 2024-09-01 16:36:34 +02:00
Georg Lehmann
b78a3d4de9 zink: switch to derivative intrinsics 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30941>
 2024-08-31 07:38:23 +00:00
Caio Oliveira
3f6b5ea27a intel/brw: Use linear walk when shader requires DERIVATIVE_GROUP_LINEAR 
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30955>
 2024-08-30 20:24:42 +00:00
Mike Blumenkrantz
898012ba11 egl: use more precise conditional for passing fd through to dri screen create 
kms_swrast is included in the swrast conditional and needs a fd,
and there is a flag which indicates pure swrast which can be used to
ensure this case is detected

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30951>
 2024-08-30 18:42:27 +00:00
Samuel Pitoiset
45319cb253 radv: specialize push constant stages with DGC 
Even if the layout declares using push constant for more stages than
needed, upload_sgpr/inline_sgpr will prevent the DGC prepare shader to
emit them because it's initialized to 0.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30924>
 2024-08-30 18:02:23 +00:00
Samuel Pitoiset
8c5358040d radv: move emitting VBOs with DGC 
Only for graphics.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30924>
 2024-08-30 18:02:22 +00:00
Samuel Pitoiset
2234e6d75a radv: add a helper to store data to the DGC upload space 
The offset is automatically incremented when something is stored.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30924>
 2024-08-30 18:02:22 +00:00
Samuel Pitoiset
330d6e0951 radv: stop passing the upload offset to dgc_emit_bind_pipeline() 
This doesn't do anything.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30924>
 2024-08-30 18:02:22 +00:00
Samuel Pitoiset
e96be348f2 radv: move emitting the compute pipeline with DGC 
Only compute is supported.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30924>
 2024-08-30 18:02:22 +00:00
Mike Blumenkrantz
ecb788624b revert part of 94e470a32d 
accidentally added during rebase

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30949>
 2024-08-30 17:08:33 +00:00
Louis-Francis Ratté-Boulianne
9d981a4c5b panfrost: properly lower DrawID sysval on v9 GPUs 
We only use special DrawID register on v10 GPUs so we still need to
lower to sysval on any earlier generation.

Fixes commit f390835074

Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30933>
 2024-08-30 16:30:40 +00:00