Commit graph

9698 commits

Author SHA1 Message Date
Mike Blumenkrantz
3b99f9bc0e mesa: support OVR_multiview2
this reuses the same pipe cap to indicate that
both extensions are supported

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31128>
2024-09-18 13:07:41 +00:00
Marek Olšák
328c29d600 mesa,glsl,gallium: add GL_OVR_multiview
Co-authored-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31128>
2024-09-18 13:07:41 +00:00
Georg Lehmann
a3d6a770c0 nir/instr_set: fix fp_fast_math
We can't just ignore the flags of the match, we need the union.

Fixes: 666647acae ("nir: track some float controls bits per instruction")

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31195>
2024-09-17 20:00:03 +00:00
Lionel Landwerlin
0f6fa4679d clc: find opencl headers from the installed llvm/clang location
A number of people report the headers not being found when running
intel-clc. I've run into the same issue but only on the most recent
Ubuntu version.

Signed-off-by: Lionel Landwerlin <llandwerlin@gmail.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30711>
2024-09-17 14:29:19 +03:00
Dylan Baker
99f1b7d732 compiler/glsl: explicitly delete copy constructor and copy-assign
Most of our visitors have custom destructors because they wrap C types,
and need to manually call destructors for those types. Because of this,
the implicitly generated copy constructors and copy-assignment operators
are not safe due copying pointers rather than data. Since we don't need
these features just delete them, so any attempt to use them would be a
compilation error. This doesn't fix any existing issue except stopping
coverity from complaining, but it does prevent new issues in the future.

Acked-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29662>
2024-09-16 21:08:04 +00:00
Ian Romanick
6a09d33549 nir: Add a pass to generate BFI instructions from logical operations
Inspired by a commit message in !30934, I set about optimizing the code
generated for nir_copysign. It would be possible to just implement an
opt_algebraic pattern for the specific values used by nir_copysign, but
this casts a slightly larger net.

As noted in a comment in the code, there may be variations of the
pattern that this pass misses. The opt_algebraic pattern would miss them
too.

v2: Use nir_def_replace. Suggested by Alyssa. Allow more "root"
instruction types. Suggested by Georg.

v3: Treat extract_u16(x, 0) as (x & 0x0000ffff), and treat extract_u8(x,
0) as (x & 0x000000ff).

v4: Use nir_scalar. Suggested by Georg.

Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31006>
2024-09-13 00:21:00 +00:00
Ian Romanick
057c7c9f53 nir/algebraic: Recognize open-coded bitfield_reverse in XCOM 2
The XCOM 2 shaders in my shader-db use iadd instead of ior.

No fossil-db changes on any Intel platform.

shader-db:

All Intel platforms had similar results. (Meteor Lake shown)
total instructions in shared programs: 19787210 -> 19787034 (<.01%)
instructions in affected programs: 1187 -> 1011 (-14.83%)
helped: 6 / HURT: 0

total cycles in shared programs: 906024436 -> 906012612 (<.01%)
cycles in affected programs: 72978 -> 61154 (-16.20%)
helped: 6 / HURT: 0

Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31006>
2024-09-13 00:21:00 +00:00
Rhys Perry
97f4250a7c nir: skip opt_loop_peel_initial_break if continue block only has phis
Doing that optimization wouldn't do anything useful in this case.

nir_block_has_non_copy() is used by opt_loop_peel_initial_break().

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31002>
2024-09-12 23:36:58 +00:00
Rhys Perry
8410b4cdd6 nir/tests: add some loop peeling tests
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31002>
2024-09-12 23:36:58 +00:00
Rhys Perry
64ac601049 nir/opt_loop: skip peeling if the loop ends with any kind of jump
Any kind of jump prevents us from moving it to the top of the loop, not
just breaks.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: 6b4b044739 ("nir/opt_loop: add loop peeling optimization")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31002>
2024-09-12 23:36:58 +00:00
Rhys Perry
af3b099e0a nir/opt_loop: skip peeling if the break is non-trivial
If this nir_if contains continues or other breaks, we can't move it
outside the loop.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: 6b4b044739 ("nir/opt_loop: add loop peeling optimization")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31002>
2024-09-12 23:36:57 +00:00
Rhys Perry
4f44a944bb nir/opt_if: fix fighting between split_alu_of_phi and peel_initial_break
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: 6b4b044739 ("nir/opt_loop: add loop peeling optimization")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11822
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31002>
2024-09-12 23:36:57 +00:00
Georg Lehmann
7fa7812219 nir: merge out of loop decision with nir_can_move_instr logic
One place to modify instead of two when adding new intrinsics here.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30906>
2024-09-12 21:49:34 +00:00
Georg Lehmann
91f8e32a85 nir/opt_sink: do not sink inverse_ballot out of loops
Inverse_ballot result is undefined if the input is not dynamically uniform.
And sinking out of loops might make the input divergent.

Fixes: 18a0ff137f ("nir: sink/move inverse_ballot like moves")

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30906>
2024-09-12 21:49:34 +00:00
Georg Lehmann
1ec3cc2aed nir/opt_sink: do not sink load_ubo_vec4 out of loops
Same reason as for load_ubo.

Fixes: d199d65c3a ("nir/nir_opt_move,sink: Include load_ubo_vec4 as a load_ubo instr.")

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30906>
2024-09-12 21:49:34 +00:00
Caio Oliveira
eae637d83c spirv: Allow Mesh/Task to use derivative execution modes
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30956>
2024-09-10 18:22:42 +00:00
Caio Oliveira
1e7f1c2039 nir: Allow Mesh/Task to use implicit LOD when DERIVATIVE_GROUP is set
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30956>
2024-09-10 18:22:42 +00:00
Caio Oliveira
1cece2691f spirv: Prefer symbols from Khronos extension for compute shader derivatives
The extension was promoted, start using the KHR instead of
vendor-specific symbols.

Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30956>
2024-09-10 18:22:42 +00:00
Caio Oliveira
155c614c52 spirv: Update headers and metadata from latest Khronos commit
This corresponds to 2a9b6f951c7d6b04b6c21fe1bf3f475b68b84801
("Add Capability and Execution mode SPV_KHR_compute_shader_derivatives (#446)")
in https://github.com/KhronosGroup/SPIRV-Headers.

Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30956>
2024-09-10 18:22:42 +00:00
David Heidelberg
6bf7b5bcd8 nir_lower_mem_access_bit_sizes: Assert when 0 components or bits are requested
Prevent the accidental passing of 0 components or bits, as it makes no sense.

Cc: mesa-stable
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Suggested-by: Karol Herbst <kherbst@redhat.com>
Signed-off-by: David Heidelberg <david@ixit.cz>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31103>
2024-09-10 11:17:48 +00:00
Erik Faye-Lund
97b8febf3d mesa/main: add gles-compatible check helpers
We need to perform these checks fairly often; let's create helpers for
them.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31039>
2024-09-10 10:10:44 +00:00
Ian Romanick
a780305818 nir/algebraic: Optimize more comparisons with b2f
shader-db:

All Intel platforms had similar results. (Meteor Lake shown)
total instructions in shared programs: 19781108 -> 19772614 (-0.04%)
instructions in affected programs: 372638 -> 364144 (-2.28%)
helped: 2915 / HURT: 0

total cycles in shared programs: 905907644 -> 905822682 (<.01%)
cycles in affected programs: 5573453 -> 5488491 (-1.52%)
helped: 2363 / HURT: 234

LOST:   42
GAINED: 16

fossil-db:

All Intel platforms had similar results. (Meteor Lake shown)
Totals:
Instrs: 152519634 -> 152519610 (-0.00%)
Cycle count: 17122707642 -> 17122710974 (+0.00%); split: -0.00%, +0.00%

Totals from 5 (0.00% of 633222) affected shaders:
Instrs: 2827 -> 2803 (-0.85%)
Cycle count: 83089 -> 86421 (+4.01%); split: -0.12%, +4.13%

Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31068>
2024-09-10 04:15:58 +00:00
Caio Oliveira
c20552678a spirv: Rename vtn_pointer::ptr_type to vtn_pointer::type
Now there's a single vtn_type associated with a vtn_pointer, so
discard the qualifier.

After this and previous changes, here's a summary of where/what types
are:

```
struct vtn_pointer *p;
p->type;           // type of this pointer
p->deref;          // NIR deref of this pointer (unchanged)
p->type->pointed;  // type of the object pointed by this pointer
```

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31069>
2024-09-10 00:46:20 +00:00
Caio Oliveira
e9ba715710 spirv: Remove (pointed) type from vtn_pointer
This can be obtained by the pointer type (currently at ptr_type).  For
the cases where there wasn't an user provided type for that, now create
an internal vtn_type.  This can happen when creating intermediate
vtn_pointer for complex loads/stores/copies.

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31069>
2024-09-10 00:46:20 +00:00
Caio Oliveira
95d08643ed spirv: Rename vtn_type::deref to vtn_type::pointed
To avoid confusion with the vtn_pointer::deref that is a NIR deref.  New
name comes from description of OpTypePointer, where is described as the
"type of the object pointed to".

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31069>
2024-09-10 00:46:19 +00:00
Alyssa Rosenzweig
b7542c4390 nir: CSE comparisons in atan2
Same code generated on AGX but simplified NIR.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30934>
2024-09-07 00:54:35 +00:00
Alyssa Rosenzweig
7546ae96a7 nir: drop NaN fixup for atan
this existed due to the min/max, per the comment. now that we don't do min/max,
the whole routine is NaN correct so the fixup is pointless.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Suggested-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30934>
2024-09-07 00:54:35 +00:00
Alyssa Rosenzweig
ab8547a002 nir: push up abs in atan2 calculation
everybody has abs on fmul, not everyone has abs on bcsel. should help agx and
bifrost.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30934>
2024-09-07 00:54:35 +00:00
Alyssa Rosenzweig
398e1ad46c nir: fuse ffma for atan range fixup
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30934>
2024-09-07 00:54:35 +00:00
Alyssa Rosenzweig
47e7cd268c nir: negate an expression in atan
we're going to fix up the sign immediately anyway.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30934>
2024-09-07 00:54:35 +00:00
Alyssa Rosenzweig
5318b8868b nir: simplify atan range reduction fixup
the original version sure is creative.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30934>
2024-09-07 00:54:35 +00:00
Alyssa Rosenzweig
87b99d5797 nir: use copysign for atan
this does two things:

* ignores sign of negative numbers which let us play fast and loose later in th
  series
* avoids an expensive fsign instruction in favour of a cheap bitwise op

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30934>
2024-09-07 00:54:35 +00:00
Alyssa Rosenzweig
95215a094a nir: extend copysign for no-integer hw
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30934>
2024-09-07 00:54:35 +00:00
Alyssa Rosenzweig
0a4a0df283 nir: push down fabs for atan
worse in terms of NIR instruction count but lets the fabs fold easier. (on agx,
which has fabs on comparisons and fmul but not on bcsel. should be no worse if
ISA has fabs on all 3.)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30934>
2024-09-07 00:54:35 +00:00
Alyssa Rosenzweig
8579375777 nir: simplify atan range reduction
just implement what the comment says, don't be clever. the clever thing is worse
on all architectures i'm familiar with, because the fdiv will turn into
fmul+frcp.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30934>
2024-09-07 00:54:35 +00:00
Alyssa Rosenzweig
a32b1a975d nir: correct comment for atan range reduction
the code did not match the comment, blew a sign.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30934>
2024-09-07 00:54:35 +00:00
Alyssa Rosenzweig
4fc3e34f2f nir: use Horner's method for atan
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30934>
2024-09-07 00:54:35 +00:00
Tapani Pälli
0489df9a51 glsl: set a version to standalone compiler context
Upcoming more strict context vs glsl version checks will fail otherwise.
Since standalone compiler requires ARB_ES3_2_compatibility that requires
GL 4.5 we simply set that as the context version.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31061>
2024-09-06 14:32:33 +00:00
Georg Lehmann
6378bbaa82 nir/opt_algebraic: reassociate constants in ior(iand) chains
Mostly affects one F1_23 shader that packs bitfields bit by bit.

Totals from 3 (0.00% of 79395) affected shaders:
Instrs: 5004 -> 4202 (-16.03%)
CodeSize: 30992 -> 23952 (-22.72%)
Latency: 28894 -> 28464 (-1.49%)
InvThroughput: 4095 -> 3934 (-3.93%)
Copies: 363 -> 376 (+3.58%)
PreVGPRs: 110 -> 109 (-0.91%)
VALU: 3035 -> 2504 (-17.50%)
SALU: 463 -> 459 (-0.86%)

Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31009>
2024-09-05 22:04:05 +00:00
Karol Herbst
14ebecd787 clc: fix compilation error with llvm-20
LLVM commit:
924a7d83b4

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11814
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: David Heidelberg <david@ixit.cz>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30980>
2024-09-05 09:44:03 +00:00
Caio Oliveira
74be809237 compiler: Allow derivative_group to be used for all stages in shader_info
These will now also be used by stages that have workgroups.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30950>
2024-09-03 20:03:18 +00:00
Alyssa Rosenzweig
f977c52b84 ail: swallow up formats
ail is a more sensible place for the format tables to live. this does create a
bit of dependency soup but hey.

nfc

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30981>
2024-09-02 23:27:14 +00:00
Alyssa Rosenzweig
afc7557cb6 nir,agx: make block image store an image() intrinsic
so we can do a bindless version

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30981>
2024-09-02 23:27:14 +00:00
Alyssa Rosenzweig
4941d71846 nir/divergence_analysis: handle load_agx
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30981>
2024-09-02 23:27:14 +00:00
Qiang Yu
d43c5003fc nir: add skip_lower_packing_ops shader compile option
Drivers like radeonsi and radv prefer to not lowering
some packing ops.

Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30885>
2024-08-30 05:46:51 +00:00
Ian Romanick
c160ed212e nir/divergence: resource_intel is less divergent than you thought
When the non_uniform flag is not set, the result is never divergent.

v2: Remove redundant assignment to is_divergent. Suggested by Caio.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30251>
2024-08-30 03:39:30 +00:00
Ian Romanick
f11a414645 nir/algebraic: Remove incorrect bfi of iand pattern
The comment says, "This expands to (b & 3) & ~0xc which is (b & 3) &
3." This is not correct. ~0xc is actually 0xfffffff3.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Closes: #11695
Fixes: 1c7e35d4e0 ("nir/algebraic: Optimize some bit operation nonsense observed in some shaders")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30913>
2024-08-29 22:21:55 +00:00
Timothy Arceri
bb426b7f3c nir/tests: add basic terminator merge test
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30862>
2024-08-29 10:26:30 +00:00
Timothy Arceri
85741c6a15 nir/tests: make add_loop_terminators more flexible
Here we update the helper to have an option to add the break to the else
blocks of the terminators.

Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30862>
2024-08-29 10:26:30 +00:00
Daniel Schürmann
51bb0e68b3 nir/opt_if: merge IFs which have phis between them
The phi-uses are rewritten on each side of the following if-stmt,
so that register pressure is kept the same.

Totals from 719 (0.91% of 79395) affected shaders: (Navi31)
MaxWaves: 18531 -> 18527 (-0.02%); split: +0.02%, -0.04%
Instrs: 4683616 -> 4621920 (-1.32%); split: -1.32%, +0.00%
CodeSize: 24154608 -> 23811472 (-1.42%); split: -1.42%, +0.00%
VGPRs: 46020 -> 46140 (+0.26%); split: -0.05%, +0.31%
SpillSGPRs: 1134 -> 1107 (-2.38%)
SpillVGPRs: 2221 -> 2202 (-0.86%)
Scratch: 603648 -> 602624 (-0.17%)
Latency: 30355976 -> 29516199 (-2.77%); split: -2.77%, +0.01%
InvThroughput: 7017283 -> 6878583 (-1.98%); split: -2.00%, +0.03%
VClause: 119826 -> 113392 (-5.37%); split: -5.37%, +0.00%
SClause: 100380 -> 93516 (-6.84%); split: -6.85%, +0.01%
Copies: 360589 -> 359154 (-0.40%); split: -1.13%, +0.73%
Branches: 146438 -> 138623 (-5.34%); split: -5.37%, +0.03%
PreSGPRs: 38237 -> 38317 (+0.21%); split: -0.52%, +0.72%
PreVGPRs: 37745 -> 37742 (-0.01%); split: -0.05%, +0.04%
VALU: 2594909 -> 2593667 (-0.05%); split: -0.12%, +0.07%
SALU: 572636 -> 554587 (-3.15%); split: -3.19%, +0.04%
VMEM: 203188 -> 201030 (-1.06%)
SMEM: 135731 -> 128683 (-5.19%)
VOPD: 1978 -> 1982 (+0.20%)

Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7710>
2024-08-29 09:42:55 +00:00