Commit graph

166223 commits

Author SHA1 Message Date
Qiang Yu
bc59bbd43b radeonsi: selectively build llvm files
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25632>
2023-10-26 10:27:55 +08:00
Qiang Yu
cc8e4b321b radeonsi: change compiler name for aco
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25632>
2023-10-26 10:27:55 +08:00
Qiang Yu
9db67311cf radeonsi: does not call llvm init when no llvm available
It's still needed when aco asm print.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25632>
2023-10-26 10:27:55 +08:00
Qiang Yu
ed2e2038de radeonsi: disk cache remove llvm dependancy when use aco
This re-enable disk cache when use aco.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25632>
2023-10-26 10:27:55 +08:00
Qiang Yu
bad8fbe7f8 radeonsi: include ac_llvm_util.h when llvm available
Remove unused include.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25632>
2023-10-26 10:27:55 +08:00
Qiang Yu
c2e2a78c72 radeonsi: set use_aco when no llvm available
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25632>
2023-10-26 10:27:55 +08:00
Qiang Yu
18e19a53e9 radeonsi: selectively build llvm compile
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25632>
2023-10-26 10:27:55 +08:00
Qiang Yu
a5fc880495 radeonsi: selectively build si llvm compiler create/destroy
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25632>
2023-10-26 10:27:55 +08:00
Qiang Yu
b511edc0d5 radeonsi: move llvm internal header to si_shader_llvm.h
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25632>
2023-10-26 10:27:55 +08:00
Qiang Yu
032c592619 radeonsi: stop llvm context creation when use aco
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25632>
2023-10-26 10:27:55 +08:00
Qiang Yu
5bae345fb7 radeonsi: move llvm compiler alloc/free into create/destroy funcntion
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25632>
2023-10-26 10:27:55 +08:00
Qiang Yu
79009811a2 radeonsi: move use_aco to si_screen
It's not per shader any more.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25632>
2023-10-26 10:27:55 +08:00
Qiang Yu
18f79f4636 radeonsi: enable aco compilation for merged shader parts
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25632>
2023-10-26 10:27:55 +08:00
Qiang Yu
0f23af5c0a radeonsi: fill aco shader info for part mode merged shader
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25632>
2023-10-26 10:27:55 +08:00
Qiang Yu
8cbd52f001 radeonsi: add vs prolog args needed by aco ls vgpr fix
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25632>
2023-10-26 10:27:55 +08:00
Qiang Yu
23cb6768cb aco: add aco_is_gpu_supported
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25631>
2023-10-26 02:01:49 +00:00
Qiang Yu
9c63138ae3 aco: stop emit s_endpgm for first stage of merged shader
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25631>
2023-10-26 02:01:49 +00:00
Qiang Yu
14022a3a0e aco: move end program handling to select_shader
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25631>
2023-10-26 02:01:49 +00:00
Qiang Yu
f3f2311d69 aco: extend max operands in a instruction to 128
We get more than 64 operands in p_end_with_regs when radeonsi.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25631>
2023-10-26 02:01:49 +00:00
Qiang Yu
e2af0b0b3f aco: add create_end_for_merged_shader
For radeonsi merged shader LS/ES part to pass args to next
stage.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25631>
2023-10-26 02:01:49 +00:00
Qiang Yu
71fd3c2a35 aco: do not fix_exports when separately compiled ngg vs or es
For radeonsi not abort when this case, as it does not jump at
last.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25631>
2023-10-26 02:01:49 +00:00
Mike Blumenkrantz
895c85ca8f vulkan/wsi: unify all the image usage flag caps
these should be the same for all wsi backends, so make a single
entrypoint to return the flags so it can be modified in a single place

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25291>
2023-10-26 00:08:57 +00:00
Mike Blumenkrantz
ac6139ad73 zink: don't block large vram allocations
I think this was masking some other problem that has long since been fixed

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25893>
2023-10-25 23:47:29 +00:00
Neha Bhende
8cfb46e27d ntt: lower indirect tesslevels in ntt
Tessellation shader which are using indirect
addressing for tesslevels e.g
  gl_TessLevelOuter[gl_InvocationID] = tessLevelOuter;
are crashing because gl_TessLevelOuter is now a
compact array variable and nir expects a constant
array index into the compact array variable.

This patch handles such cases.

This fixes MR 21940
Fixes: 84006587d7 ("glsl: Delete the lower_tess_level pass.")

Tested with glretrace

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25773>
2023-10-25 22:42:38 +00:00
Martin Roukala (né Peres)
2a65bb292d zink/ci: drop the concurrency of the zink-radv-vangogh-valve job
We seem to be hitting the BAR0 size limit which triggers an amdgpu bug.
Let's drop the concurrency from 8 to 6 to alleviate pressure on BAR0,
and hopefully work around this kernel bug.

Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25883>
2023-10-25 21:46:45 +00:00
Lionel Landwerlin
439b0e8688 intel/fs: fix dynamic interpolation mode selection
We can end up in situation where we are dispatched with a multisample
framebuffer but not at per-sample. In this case we would request the
at_sample value with the wrong message configuration.

Relying on the BRW_WM_MSAA_FLAG_MULTISAMPLE_FBO flag superseeds
BRW_WM_MSAA_FLAG_PERSAMPLE_DISPATCH.

Fixes piglit tests :

spec@arb_gpu_shader5@arb_gpu_shader5-interpolateatsample*

With Zink on Anv

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 68027bd38e ("intel/fs: implement dynamic interpolation mode for dynamic persample shaders")
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25854>
2023-10-25 21:15:48 +00:00
Lionel Landwerlin
a97065adab anv: fix uninitialized use of compute initialization batch
We sometimes fail initialization.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 09d12e6727 ("anv: Add support for I915_ENGINE_CLASS_COMPUTE in init_device_state()")
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25891>
2023-10-25 19:27:23 +00:00
Iago Toral Quiroga
84001ea425 v3dv: fix confusing nomenclature about DRM nodes
We have been using drm_render_device to refer to the render device and
drm_primary_device to refer to the display device, but that is confusing
because the render device also has a primary node (for legacy reasons),
so don't use primary to refer to the display device.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Acked-by: Erico Nunes <nunes.erico@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25748>
2023-10-25 19:11:37 +00:00
Mike Blumenkrantz
d0f775e54d ci: skip implicit modifier piglits for zink
these may work coincidentally but not uniformly

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25299>
2023-10-25 18:23:17 +00:00
Mike Blumenkrantz
99ff88cb5e zink: delete some dead modifier handling
this is no longer hit

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25299>
2023-10-25 18:23:16 +00:00
Mike Blumenkrantz
1c3db3e39a zink: blow up broken xservers more reliably
only certain drivers can successfully run an xserver with implicit modifier
handling, and the rest will have broken rendering

until such time that a vk extension emerges to handle this more widely,
break this interop for drivers where it's already broken

fixes #9819

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25299>
2023-10-25 18:23:16 +00:00
Mike Blumenkrantz
ff093f522a zink: use weston for anv ci
gotta get those juicy modifiers

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25299>
2023-10-25 18:23:16 +00:00
Rhys Perry
477b310dfd util: skip zero-sized SHA1Update
Fixes UBSan error:
src/util/sha1/sha1.c:140:8: runtime error: null pointer passed as argument 2, which is declared to never be null

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25853>
2023-10-25 17:27:47 +00:00
Rhys Perry
1afd0878e9 nir/lower_shader_calls: skip zero-sized qsort
Fixes UBSan:
src/compiler/nir/nir_lower_shader_calls.c:1681:7: runtime error: null pointer passed as argument 1, which is declared to never be null

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25853>
2023-10-25 17:27:47 +00:00
Rhys Perry
f9289dfd02 nir/serialize: fix signed integer overflow
Fixes UBSan error:
src/compiler/nir/nir_serialize.c:1277:70: runtime error: left shift of 524287 by 13 places cannot be represented in type 'int'

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25853>
2023-10-25 17:27:47 +00:00
Alyssa Rosenzweig
9a6c20e64f nir/trivialize_registers: Handle obscure load hazard
Somebody less tired than me would add a unit test for this. Offending snippet:

        32    %58 = @load_reg (%55) (base=0, legacy_fabs=0, legacy_fneg=0)
        32    %57 = @load_reg (%55) (base=0, legacy_fabs=0, legacy_fneg=0)
        32    %21 = iadd %57, %15 (0x1)
                    @store_reg (%21, %55) (base=0, wrmask=x, legacy_fsat=0)
        32    %56 = @load_reg (%55) (base=0, legacy_fabs=0, legacy_fneg=0)
        32    %22 = i2f32 %56
        32    %23 = load_const (0x41000000 = 8.000000)
        32    %24 = fdiv %22, %23 (8.000000)
        32    %90 = mov %24
                    @store_reg_indirect (%90, %78, %58) (base=0, wrmask=x, legacy_fsat=0)

Closes: #10031
Fixes: d313eba94e ("nir: Add pass for trivializing register access")
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reported-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25865>
2023-10-25 16:34:47 +00:00
Samuel Pitoiset
1febb6f762 radv: report the last GPUVM fault when a device lost is detected
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23238>
2023-10-25 15:29:23 +00:00
Samuel Pitoiset
5a6208ad72 radv: query and report the last GPUVM fault with RADV_DEBUG=hang
Tested with a small use-after-free Vulkan test. It's pretty basic
for now but I think I will add status decoding support to report
more useful information.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23238>
2023-10-25 15:29:22 +00:00
Samuel Pitoiset
5eb8b3e9b1 radv/amdgpu: add support quering the last GPUVM fault
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23238>
2023-10-25 15:29:22 +00:00
Samuel Pitoiset
bdc62108be amd: add has_gpuvm_fault_query
Whether the kernel allows to query the last GPUVM fault.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23238>
2023-10-25 15:29:22 +00:00
Samuel Pitoiset
1b0fbcbe1c radv: remove outdated RADV_DEBUG=vmfaults support
It's been a very long time since this was useless because dmesg
required sudo access for a while.

This will be replaced by the new GPUVM fault interface which allows
to query from the kernel directly instead of trying to parse dmesg.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23238>
2023-10-25 15:29:22 +00:00
Seppo Yli-Olli
6bbbdd5ceb zink: Fix SyntaxWarning in zink_extensions script
Fix regex pattern in zink_extensions to use proper escaping. While the original
code works, it relies on Python ignoring incorrect syntax and fallbacking to
passing through the escape. Current behaviour results in SyntaxWarning
whenever the code is used.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25881>
2023-10-25 15:03:43 +00:00
Louis-Francis Ratté-Boulianne
5a928f7563 panfrost: Add env variable for max AFBC packing ratio
Add `PAN_MAX_AFBC_PACKING_RATIO` variable. If the ratio (size of the
packed resource) / (size of the sparse resource) * 100 is above that
value, we don't care about packing it.

Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25012>
2023-10-25 14:25:31 +00:00
Louis-Francis Ratté-Boulianne
888d7c8ee6 panfrost: Add some debug utility methods for resources
Add a method to dump a specific superblock given its index (header
and few first bytes from the body) and a method to dump a resource
to a ppm file.

Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25012>
2023-10-25 14:25:31 +00:00
Louis-Francis Ratté-Boulianne
33b48a5585 panfrost: Add debug flag to force packing of AFBC textures on upload
Add `forcepack` flag that will force conversion to AFBC-packed right
after a texture is uploaded when possible. We only pack 2D resources
larger than 32x32 as of now.

Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25012>
2023-10-25 14:25:31 +00:00
Louis-Francis Ratté-Boulianne
bc91af8021 panfrost: Don't force constant modifier after converting
After converting a texture from one modifier to another, there is
no reason to force the modifier to stay constant afterwards. Set
back `modifier_constant` to false because it is changed by
`resource_setup` as it is causing issues when implementing AFBC
packing.

Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25012>
2023-10-25 14:25:31 +00:00
Louis-Francis Ratté-Boulianne
e9d523bb92 panfrost: Legalize resource when attaching to a batch
Make sure we don't convert the texture for nothing by only
legalizing when creating a batch instead of on surface creation.
Also, to avoid recursive blit, we need to legalize the destination
resource before blitting.

Finally, make sure the resource has a sparse memory layout if
AFBC compressed. The GPU doesn't support rendering to a AFBC-packed
texture.

Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25012>
2023-10-25 14:25:31 +00:00
Louis-Francis Ratté-Boulianne
bc55d150a9 panfrost: Add support for AFBC packing
When the GPU is converting a texture from linear/tiled to compressed
AFBC, it uses a sparse memory layout. That means that the
superblocks are stored starting at intervals equal to the size of an
uncompressed superblock. When memory usage needs to be optimized, it
is possible to pack the resource by trimming each superblock as much
as possible. The GPU will still be able to read from these packed
textures, but won't be able to write directly to them. If the
layout is AFBC-tiled, the packing process will also de-tile as
tiled+packed is not supported by Mali GPUs.

No new modifier flag has been added as the absence of the
`AFBC_FORMAT_MOD_SPARSE` flag means the resource will be packed.

Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25012>
2023-10-25 14:25:31 +00:00
Louis-Francis Ratté-Boulianne
32fbd38889 panfrost: Add method to get size of AFBC superblocks valid data
The compute shader is going through all the AFBC header blocks and
calculating the size of valid data by summing up the subblock
sizes (and taking into account solid color, uncompressed mode and
copy blocks). The result is written into the given buffer (array
of `pan_afbc_block_info`).

The size is rounded up to the alignment parameter directly in the
shader.

Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25012>
2023-10-25 14:25:31 +00:00
Louis-Francis Ratté-Boulianne
ae3fb3089f panfrost: Add infrastructure for internal AFBC compute shaders
A few compute shaders are needed to support AFBC-packing. Here is
just the boilerplate to create, compile and retrieve the shaders.

Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25012>
2023-10-25 14:25:31 +00:00