Commit graph

17 commits

Author SHA1 Message Date
Felix DeGrood
ed94528711 intel: add L3 Bypass Disable to gen xml
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10217>
2021-04-15 04:54:40 +00:00
Anuj Phogat
e7e55af4d6 intel: Rename GENx keyword to GFXx
Commands used to do the changes:
export SEARCH_PATH="src/intel src/gallium/drivers/iris src/mesa/drivers/dri/i965"
grep -E "GEN[[:digit:]]+" -rIl $SEARCH_PATH | xargs sed -ie "s/GEN\([[:digit:]]\+\)/GFX\1/g"

Exclude the changes to modifiers:
grep -E "I915_.*GFX" -rIl $SEARCH_PATH | xargs sed -ie "s/\(I915_.*\)GFX/\1GEN/g"

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9936>
2021-04-02 18:33:07 +00:00
Anuj Phogat
1d296484b4 intel: Rename Genx keyword to Gfxx
Commands used to do the changes:
export SEARCH_PATH="src/intel src/gallium/drivers/iris src/mesa/drivers/dri/i965"
grep -E "Gen[[:digit:]]+" -rIl $SEARCH_PATH | xargs sed -ie "s/Gen\([[:digit:]]\+\)/Gfx\1/g"

Exclude changes in src/intel/perf/oa-*.xml:
find src/intel/perf -type f \( -name "*.xml" \) | xargs sed -ie "s/Gfx/Gen/g"

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9936>
2021-04-02 18:33:07 +00:00
Jason Ekstrand
79d9c914ae intel/genxml: Make BindingTablePoolEnable a bool
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9729>
2021-03-20 12:46:50 -05:00
Jason Ekstrand
65077cdf57 intel/genxml: Binding table pointers are 15 bits on GFX version 12.5+
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9729>
2021-03-20 12:33:16 -05:00
Jordan Justen
16d453da7f genxml/gen12: 3D_MODE bits 31:16 are no longer must-be-one
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9505>
2021-03-19 09:07:37 +00:00
Jason Ekstrand
6721925220 genxml: Clean up MI_SET_PREDICATE
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9445>
2021-03-08 10:47:19 -06:00
Jason Ekstrand
c7c524337a intel/mi_builder: Add load/store_offest on GFX 12.5+
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9445>
2021-03-08 10:47:18 -06:00
Sagar Ghuge
04d0d4e849 intel/mi_builder: Added support for command streamer shift operations
Add logical shift left and right operations support to mi_builder.

v1:
- Add GEN_GEN > 12 check (Jordan Justen)
- Add gen_mi_has_shift function (Jordan Justen)
- Fix commit title (Jordan Justen)

v2 (Jason Ekstrand):
- Add _imm versions of all of them
- Better handle corner-cases in _imm helpers
- Handle the power-of-two limitation for _imm versions
- Add tests

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9445>
2021-03-08 10:45:42 -06:00
Jordan Justen
36dd7c44f6 intel: Use GEN_VERSIONx10 in more places
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9329>
2021-03-01 22:00:08 -08:00
Francisco Jerez
ab076e19ed intel/genxml: Define 3DSTATE_SUBSLICE_HASH_TABLE command for Gen12 and Gen12.5.
This command allows programming custom pixel hashing tables
controlling the balancing of load across pixel pipes.  Rather
confusingly 3DSTATE_SLICE_TABLE_STATE_POINTERS was serving the same
purpose on Gen11: A pixel is mapped to the pixel pipe with index
specified by the entry in the table corresponding to the LSBs of the
pixel coordinates [Yes you read right the entries are neither subslice
nor slice indices!].  Either a 2-way or a 3-way table can be
programmed based on whether the platform has two or three pixel pipes
per slice.  In addition the 16x8 tables defined below can hold two
separate 8x8 tables when in DUAL_TABLE mode (which AFAIA is only
useful for platforms with multiple asymmetric slices -- I.e. no
production platforms as of today to my knowledge).

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8749>
2021-02-23 21:14:57 -08:00
Francisco Jerez
a2a17bf25e intel/genxml: Fix pixel hashing 3DSTATE_3D_MODE field definitions for Gen12 and Gen12.5.
The former "Subslice Hashing Mode" field is no longer used by the
hardware, Gen12 parts always do 16x16 subslice pixel hashing -- Remove
it since it's no longer useful.  In addition add a couple of bits that
will be useful in order to make some adjustments to the default pixel
pipe hashing behavior.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8749>
2021-02-23 21:14:42 -08:00
Lionel Landwerlin
e484478727 genxml: Add PIPE_CONTROL protected memory bits
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9127>
2021-02-18 11:20:55 +02:00
Lionel Landwerlin
1b43528ade genxml: add MI_SET_APPID on Gen12+
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9127>
2021-02-18 11:20:51 +02:00
Jason Ekstrand
f4902bb189 intel/genxml,anv,iris: Drop the legacy compute path from gen125.xml
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8342>
2021-01-13 13:10:28 -08:00
Jordan Justen
cdc9e22a3a intel/genxml/gen125: Add CFE_STATE and COMPUTE_WALKER
Reworks:
 * Jason: Captalize COMPUTE_WALKER::BTD mode
 * Jason: Make COMPUTE_WALKER::InlineData an array
 * Jason: Remove stale fields, uint=>bool, add missing enum values.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8342>
2021-01-13 13:10:27 -08:00
Jordan Justen
569afd37f1 intel/genxml: Copy gen12.xml to gen125.xml
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7757>
2020-12-01 19:06:22 +00:00