Bit 27 is the "ASTC Format" bit in the PRMs but we just extended the
Surface Format field by one bit and made sure all the ASTC formats have
that bit set. Since Gfx12.5 doesn't support ASTC, we can drop that bit
from the field and this will cause GenXML packing functions to assert if
it's ever set.
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13206>
We do, however, leave a nice tombstone comment in case anyone comes
looking. Given the age and scarcity of Cherry View hardware and ASTC
apps that run on desktop Linux, it's unlikely we'll ever bother to
implement it.
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13206>
For compressed formats, filtering and sampling has always gone together.
This lets us avoid duplicating all those nasty special cases between the
two functions.
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13206>
these were duplicated all over the place, and it's annoying to have to keep
duplicating them any time a new component includes the vulkan header
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13141>
Support creating exportable memory. Use memfd file
descriptors and import/export them as opaque fd handles.
Reviewed-by: Dave Airlie <airlied@redhat.com>
Tested-by: Heinrich Fink <hfink@snap.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12345>
Enable the import of memory via opaque fd handles, which
are based upon memory-fds. The extension is necessary for sharing
images and buffers from Vulkan.
Reviewed-by: Dave Airlie <airlied@redhat.com>
Tested-by: Heinrich Fink <hfink@snap.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12345>
Add utility functions to allocate aligned memory backed by
mem_fd objects. Add interface to Gallium for same allocation.
It will be used in later commits for external memory support
in Vulkan/OpenGL.
Reviewed-by: Dave Airlie <airlied@redhat.com>
Tested-by: Heinrich Fink <hfink@snap.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12345>
During building Android-12, the following error appears:
meson.build:21:0: ERROR: New value 31 is more than maximum value 30.
Signed-off-by: Roman Stratiienko <r.stratiienko@gmail.com>
Acked-by: Emil Velikov <emil.l.velikov@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13216>
Otherwise we read garbage for bindings with value above
vertexBindingDescriptionCount.
Fixes vkd3d test "test_append_aligned_element"
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13195>
This commit fixes two issues:
* On CreateInstance, we are freeing the instance, and then trying to
use it when calling vk_error. This could be problematic, so let's
just use NULL.
* On CreateDevice, we are getting a unsupported feature error, and
then trying to call vk_error using the instance. That's is not
really a instance error, and will assert when the ongoing common
vk_error lands mesa. Let's use NULL instead, as the object it
applies, the device, was not created.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13219>
Fences with VK_FENCE_CREATE_SIGNALED_BIT are created with
signalled=true and timeline=0, waiting on them without
submitting first returned VK_TIMEOUT instead of VK_SUCCESS.
Signed-off-by: Pavel Asyutchenko <sventeam@yandex.ru>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13128>
This is overkill, but hey 4-bits per channel is hardly something to
care about.
(Suggestions welcome for a better version).
Fixes:
dEQP-GLES2.functional.fbo.render.*rgba4*
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12001>
This will let me incrementally fix nir-to-tgsi against virgl without
having to carry around the whole "remove TGSI from mesa/st" MR.
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12800>
virgl makes one array of UBOs starting from the first non-CB0 UBO used,
and does dynamic indexing off of that. It requires that the dynamic
indexing be CONST[ADDR[0]+base], rather than having the base be loaded in
addr0.
If we had a nir_intrinsic_base() on load_ubo, this would be easy. As we
don't, emit a subtract at address deref time.
Acked-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12800>
This is used for var->data.sample inputs, which are already declared to be
TGSI_INTERPOLATE_LOC_SAMPLE, so we can just use the interpolated inputs.
Acked-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12800>
Just like outputs, virglrenderer needs its inputs sorted. Should be
harmless for other TGSI producers, and makes the declarations more
readable.
Acked-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12800>
There's no need to reserve the bottom 9 VARYING_SLOT_PATCH*, since
VARYING_SLOT_TEXCOORD won't be mapped there. This helps us match up with
nir_to_tgsi, which wasn't shifting down by 9 for patch.
Acked-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12800>
Recent ncnn benchmarks showed a slowdown, and this change seemed
more likely.
The batching into threads for the main workloads is fine, however
the remainder stuff doesn't get spread out and can bottleneck in
one thread.
Switch to a model where the initial work is batched, but the
remainder is iterated over one by one.
Brings ncnn benchmarks back in line with previously.
Fixes: 69109e0b19 ("llvmpipe/cs: rework thread pool for avoid mtx locking")
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13210>
v2 (Jason Ekstrand):
- Switch the order of arguments to be device, image, other stuff
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13199>
This is similar to a patch from Lionel except works in terms of aspects
rather than bindings. This makes it easy to use from the Android code.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13199>
No shader-db changes on any Intel platform.
Fossil-db results:
All Intel platforms had similar results. (Ice Lake shown)
Instructions in all programs: 144380118 -> 143692823 (-0.5%)
SENDs in all programs: 6920822 -> 6920822 (+0.0%)
Loops in all programs: 38299 -> 38299 (+0.0%)
Cycles in all programs: 8434782176 -> 8423078994 (-0.1%)
Spills in all programs: 206830 -> 204469 (-1.1%)
Fills in all programs: 318737 -> 313660 (-1.6%)
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12320>
No shader-db or fossil-db changes on any Intel platform.
v2: Keep the flt <-> fge switcharoo local to the SpvOpFUnordLessThan,
etc. handling. Add a comment explaining why the suboptimal
SpvOpFUnordEqual implementation is used here. Suggested by Caio.
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12320>
