Commit graph

8 commits

Author SHA1 Message Date
Alyssa Rosenzweig
7cccc89f80 panfrost/decode: Add flags for tilebuffer readback
These flags are set when reading back the tilebuffer from a fragment
shader via various mechanisms (including ARM_shader_framebuffer_fetch
and EXT_pixel_local_storage).

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
2019-04-07 15:58:19 +00:00
Alyssa Rosenzweig
4fcd3189ae panfrost/decode: Print negative_start
This property slipped through..

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
2019-03-31 04:41:06 +00:00
Alyssa Rosenzweig
3197b30c6e panfrost/decode: Decode all cubemap faces
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
2019-03-31 02:36:38 +00:00
Alyssa Rosenzweig
5e6d33a7b6 panfrost: Replay more varying buffers
This is required for gl_PointCoord to show up on decodes.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
2019-03-19 03:53:56 +00:00
Alyssa Rosenzweig
b517e36842 panfrost/decode: Respect primitive size pointers
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
2019-03-19 03:53:48 +00:00
Alyssa Rosenzweig
587ad37e72 panfrost: Identify fragment_extra flags
The fragment_extra structure contains additional fields extending the
MRT framebuffer descriptor, snuck in between the main framebuffer
descriptor and the render targets. Its fields include those related to
transaction elimination and depth/stencil buffers. This patch identifies
the flags field (previously just "unk" with some magic values) as well
as identifying some (but not all) flags set by the driver.

The process of identifying flags brought a bug to light where
transaction elimination (checksumming) could not be enabled unless AFBC
was in-use. This issue is now resolved.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
2019-03-12 02:37:42 +00:00
Alyssa Rosenzweig
f943047e48 panfrost: Decode render target swizzle/channels
On MRT-capable systems, the framebuffer format is encoded as a 64-bit
word in the render target descriptor. Previously, the two 32-bit
words were exposed as opaque hex values. This commit identifies a 12-bit
Mali swizzle and a 2-bit channel counter, removing some of the magic. It
also adds decoding support for the AFBC and MSAA enable bits, which were
already known but otherwise ignored in pandecode.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
2019-02-25 04:49:50 +00:00
Alyssa Rosenzweig
f611782045 panfrost: Add pandecode (command stream debugger)
The `panwrap` utility can be LD_PRELOAD'd into a GLES app, intercepting
communication between the driver and the kernel. Modern panwrap versions
do no processing of their own; instead, they create a trace directory.
This directory contains the following files:

 - control.log: a line-by-line plain text file, denoting important
   syscalls (mmaps and job submits) along with their arguments

 - memory_*.bin, shader_*.bin: binary dumps of mapped memory

Together, these files contain enough information to reconstruct the
command stream and shaders of (at minimum) a single frame.

The `pandecode` utility takes this directory structure as input,
reconstructing the mapped memory and using the job submit command as an
entrypoint. It then walks the descriptors as the hardware would, parsing
and pretty-printing. Its final output is the pretty-printed command
stream interleaved with the disassembled shaders, suitable for driver
debugging. For instance, the behaviour of two driver versions (one
working, one broken) can be compared by diff'ing their decoded logs.

pandecode/decode.c was originally a part of `panwrap`; it is the oldest
living code in the project. Its history is generally not worth
preserving.

panwrap itself will continue to live downstream for the foreseeable
future, as it is specifically written for the vendor kernel. It is
possible, however, to produce equivalent traces directly from Panfrost,
bypassing the intermediate wrapping layer for well-behaved drivers.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
2019-02-21 07:01:48 +00:00