Commit graph

84618 commits

Author SHA1 Message Date
Eric Anholt
ac6966360f mesa: Use a temporary set to track whether we've added a resource yet.
Saves another .1s on servo.trace.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
2016-08-10 12:27:22 -07:00
Eric Anholt
ee02a5e330 prog_hash_table: Convert to using util/hash_table.h.
Improves glretrace -b servo.trace (a trace of Mozilla's servo rendering
engine booting, rendering a page, and exiting) from 1.8s to 1.1s.  It uses
a large uniform array of structs, making a huge number of separate program
resources, and the fixed-size hash table was killing it.  Given how many
times we've improved performance by swapping the hash table to
util/hash_table.h, just do it once and for all.

This just rebases the old hash table API on top of util/, for minimal
diff.  Cleaning things up is left for later, particularly because I want
to fix up the new hash table API a little bit.

v2: Add UNUSED to the now-unused parameter.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
2016-08-10 12:27:22 -07:00
Eric Anholt
91945f9e91 prog_hash_table: Convert compare funcs to match util/hash_table.h.
I'm going to replace this hash table with util/hash_table.h, and the first
step is to compare things the same way.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
2016-08-10 12:27:22 -07:00
Eric Anholt
60f1b436b9 nir: Drop an unused program/hash_table.h include.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
2016-08-10 12:27:22 -07:00
Tim Rowley
6198160250 swr: [rasterizer core] unused variable warning fixes
Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
2016-08-10 11:09:48 -05:00
Tim Rowley
9aa75e5d46 swr: [rasterizer jitter] add core string to JitManager
Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
2016-08-10 11:09:42 -05:00
Tim Rowley
b311bdf92d swr: [rasterizer core] fix OOB check of viewport indices
Use correct comparison intrinsic for OOB check of viewport indices.

Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
2016-08-10 11:09:36 -05:00
Tim Rowley
2eae02f77c swr: [rasterizer common] add linux definition for InterlockedAdd64
Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
2016-08-10 11:09:22 -05:00
Tim Rowley
e8b35a2321 swr: [rasterizer jitter] add VMASKSTOREPS intrinsic
Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
2016-08-10 11:09:16 -05:00
Tim Rowley
3393279fc9 swr: [rasterizer jitter] add mask support for odd format fetch
Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
2016-08-10 11:09:10 -05:00
Tim Rowley
92621ac5d5 swr: [rasterizer core] routing of viewport indexes through frontend
Viewport transform performed based on per-prim viewport index if available.

Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
2016-08-10 11:09:00 -05:00
Tim Rowley
4e8763cb09 swr: [rasterizer core] split FE and BE stats
Separated FE stats out into its own structure.  There are 17 FE vs 3 BE
stat fields.  Since there is only one FE thread per DC then we don't have
to loop over all threads and sum up FE stats over all the worker threads.
This also reduces size of DC since we only need to store one copy of the
FE stats and not one per worker.  Finally, we can use the new FE callback
mechanism to update these.

Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
2016-08-10 11:08:51 -05:00
Tim Rowley
f833b694cd swr: [rasterizer core] remove all old stats code
Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
2016-08-10 11:08:45 -05:00
Tim Rowley
ad153189ec swr: [rasterizer core] viewport array support
Change viewport matrix storage from AOS to SOA to support viewport arrays.

Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
2016-08-10 11:08:40 -05:00
Tim Rowley
d86e2487a0 swr: [rasterizer jitter] fetch support for offsetting VertexID
Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
2016-08-10 11:08:33 -05:00
Tim Rowley
6625fd08db swr: [rasterizer core] fundamentally change how stats work
Add a per draw stats callback to update driver stats.

Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
2016-08-10 11:08:23 -05:00
Tim Rowley
047493c198 swr: [rasterizer core] add rasterizerSampleCount to PS context
Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
2016-08-10 11:08:17 -05:00
Tim Rowley
a83beb936e swr: [rasterizer core] remove cygwin threads.cpp stubs
Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
2016-08-10 11:08:11 -05:00
Tim Rowley
29e1c4a8a9 swr: [rasterizer core] allow override of KNOB thread settings
- Remove HYPERTHREADED_FE support
- Add threading info as optional data passed to SwrCreateContext.
  If supplied this data will override any KNOB thread settings.

Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
2016-08-10 11:08:05 -05:00
Tim Rowley
e0c10306f5 swr: [rasterizer core] add SwrWaitForIdleFE
This is a blocking call that waits until all FE work is complete.
This is useful for waiting for FE work to complete such as for streamout.

Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
2016-08-10 11:07:59 -05:00
Tim Rowley
8dfaf249cc swr: [rasterizer core] change threadsDone to be a 32-bit value.
Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
2016-08-10 11:07:53 -05:00
Tim Rowley
6624e01114 swr: [rasterizer core] update trivial accept test conditions
enable/disable raster tile trivial accept test based on scissor enable trait.
Can be optimized further.

Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
2016-08-10 11:07:47 -05:00
Tim Rowley
7cf187d08a swr: [rasterizer core] improve implementation for SoWriteOffset
1. SoWriteOffset is no longer treated as a stat
2. Added callback from core to update streamout write offset

Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
2016-08-10 11:07:40 -05:00
Tim Rowley
8d3b20135e swr: [rasterizer common] make disabled asserts always print (but not break)
Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
2016-08-10 11:07:00 -05:00
Leo Liu
6575ebdc45 vl/rbsp: add a check for emulation prevention three byte
This is the case when the "00 00 03" is very close to the beginning of
nal unit header

v2: move the check to rbsp init

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2016-08-10 09:52:44 -04:00
Ilia Mirkin
bc5df3b321 Re-apply "glsl: don't try to lower non-gl builtins as if they were gl_FragData"
If a shader has an output array, it will get treated as though it were
gl_FragData and rewritten into gl_out_FragData instances. We only want
this to happen on the actual gl_FragData and not everything else.

This is a small part of the problem pointed out by the below bug.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96765
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-08-10 15:43:36 +02:00
Marek Olšák
9c63fd9056 radeonsi: set CB_COLORn_INFO.ROUND_MODE
just do what the register spec says

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
2016-08-10 15:43:36 +02:00
Marek Olšák
667ad9fa3e radeonsi: set CB_COLORn_INFO.SIMPLE_FLOAT
This can help enable some blend optimizations (see the register spec).
Vulkan always sets this.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
2016-08-10 15:43:36 +02:00
Marek Olšák
36057ff12a radeonsi: disallow MIN/MAX blend equations for dual source blending
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
2016-08-10 15:43:36 +02:00
Marek Olšák
947e0614d0 radeonsi: only set dual source blending for MRT0
This is the proper fix for Overlord and Witcher 2 hangs.

The hang condition is that 1 app must write to MRT0 and MRT1 from a pixel
shader while MRT1 is disabled in CB_TARGET_MASK (does this generate
unflushable pixel quads? I don't know), and another app (e.g. Glamor)
must enable dual source blending in both MRT0 and MRT1. The hw gets
confused, which leads to corruption and hangs.

Cc: 12.0 11.2 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
2016-08-10 15:43:36 +02:00
Miklós Máté
88c2fc6b2d st/mesa: in ATI fs don't assume TEMP0=REG0
The temporaries are allocated dynamically.

Signed-off-by: Miklós Máté <mtmkls@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2016-08-10 15:03:58 +02:00
Trevor Davenport
9a4d5db4d2 st/nine: Fix invalid attempt to use indirect draws.
Since commit 6d7177f01b, radeonsi
would take a different path if info->indirect_params was not
initialized properly.  Nine was not initializating this field.

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2016-08-10 15:02:20 +02:00
Mathias Fröhlich
0ce5ec8ece util: Use win32 intrinsics for util_last_bit if present.
v2: Split into two patches.
v3: Fix off by one problem.

Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Reviewed-by: Brian Paul <brianp@vmware.com>
Tested-by: Brian Paul <brianp@vmware.com>
2016-08-10 09:30:07 +02:00
Marek Olšák
3f100b77f9 gallium/radeon: use unflushed fences for deferred flushes (v2)
+23% Bioshock Infinite performance.

v2: - use the new fence_finish interface
    - allow deferred fences with multiple contexts
    - clear the ctx pointer after a deferred flush

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-08-10 01:11:10 +02:00
Marek Olšák
1cc95a1255 st/mesa: set the ctx parameter of fence_finish
for deferred flushes

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-08-10 01:11:10 +02:00
Marek Olšák
54272e18a6 gallium: add a pipe_context parameter to fence_finish
required by glClientWaitSync (GL 4.5 Core spec) that can optionally flush
the context

Reviewed-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-08-10 01:11:10 +02:00
Marek Olšák
c6043e7d54 st/mesa: use PIPE_USAGE_STREAM for GL_CLIENT_STORAGE_BIT without READ_BIT (v2)
v2: keep STAGING for GL_MAP_READ_BIT

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2016-08-10 01:11:10 +02:00
Marek Olšák
33a9b4e8a1 gallium/radeon: add HUD queries for mapped VRAM/GTT
mainly for monitoring visible VRAM congestion

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-08-10 01:11:10 +02:00
Marek Olšák
645d395d9a winsys/radeon: track the amount of mapped memory
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-08-10 01:11:10 +02:00
Marek Olšák
1e04483c22 winsys/amdgpu: track the amount of mapped memory
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-08-10 01:11:10 +02:00
Marek Olšák
8276776e64 winsys/amdgpu: don't try to unmap userptr buffers
no app calls this AFAIK

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-08-10 01:11:10 +02:00
Marek Olšák
ef836c0d04 gallium/radeon: increase the size of the renderer string
Mine is longer than 64 bytes.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-08-10 01:11:10 +02:00
Marek Olšák
739d526b07 gallium/radeon: implement ARB_clear_texture (v3)
Some ideas copied from Jakob Sinclair's implementation, but the color
clearing is completely different.

v2: remove leftover code, disable conditional rendering
    disable render condition cleanly

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-08-10 01:11:10 +02:00
Marek Olšák
7df15389af gallium/radeon: handle render_condition_enable for clear_rt/ds
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-08-10 01:10:21 +02:00
Marek Olšák
a909210131 gallium: add render_condition_enable param to clear_render_target/depth_stencil
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-08-10 01:10:21 +02:00
Haixia Shi
a7c6993a33 egl: android: query native window default width and height (v2)
On android platform, the width and height of a native window surface may
be updated after initialization. It is therefore necessary to query android
framework for the current width and height.

v2: remove Android specific #ifdef's and just implement the fallback directly
if the platform query_surface() callback is not provided.

TEST=dEQP-EGL.functional.resize.surface_size#* on cyan-cheets

Reviewed-by: Kristian H. Kristensen <hoegsberg@chromium.org> (v1)
Reviewed-by: Tomasz Figa <tfiga@chromium.org>
Reviewed-by: Chad Versace <chad@kiwitree.net>
Change-Id: I673f7d2f1d90c3bf572b30f63da537f2cae1496e
2016-08-09 15:49:28 -07:00
Anuj Phogat
c4cd0e8ecd anv/device: Enable sample shading on gen7+
Passes all 30 min_sample_shading tests in vulkan cts.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-08-09 14:45:25 -07:00
Anuj Phogat
f16295a198 anv/gen7_pipeline: Set multisample state using shared function
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-08-09 14:45:25 -07:00
Anuj Phogat
2ef5063ad7 anv/pipeline: Add sample locations for gen7-7.5
V1: Add multisample positions (Nanley)
V2: Fix 8x sample positions to match OpenGL (Anuj)
V3: Vulkan has standard sample locations. They need not be same as
    in OpenGL. (Anuj)

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-08-09 14:45:25 -07:00
Anuj Phogat
dc49dd7f10 anv/pipeline: Move emit_ms_state() to genX_pipeline_util.h
This will help sharing multisample state setting code.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-08-09 14:45:25 -07:00