Commit graph

30722 commits

Author SHA1 Message Date
Samuel Pitoiset
5bcfe90501 gallium/radeon: add HUD queries for GPU temperature and clocks
Only the Radeon kernel driver exposed the GPU temperature and
the shader/memory clocks, this implements the same functionality
for the AMDGPU kernel driver.

These queries will return 0 if the DRM version is less than 3.10,
I don't explicitely check the version here because the query
codepath is already a bit messy.

v2: - rebase on top of master

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-04-10 23:06:19 +02:00
Samuel Pitoiset
def02007cd radeonsi: add new si_check_render_feedback_texture() helper
For bindless.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-04-10 23:05:41 +02:00
Samuel Pitoiset
fbcc8664fd radeonsi: add new si_decompress_color_texture() helper
For bindless.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-04-10 23:05:38 +02:00
Samuel Pitoiset
6646212de0 radeonsi: add new depth_needs_decompression() helper
v2: - rename to depth_needs_decompression() instead

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-04-10 23:05:32 +02:00
Samuel Pitoiset
9cc91ba6d5 radeonsi: add a 'break' in si_check_render_feedback_*()
No need to check all color buffers.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-04-10 23:05:29 +02:00
Samuel Pitoiset
51d6641700 radeonsi: re-use 'desc' in si_set_shader_image()
No need to compute the offset in the descriptor twice.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-04-10 23:05:27 +02:00
Constantine Kharlamov
61e47d92c5 r600g: get rid of dummy pixel shader
The idea is taken from radeonsi. The code mostly was already checking for null
pixel shader, so little checks had to be added.

Interestingly, acc. to testing with GTAⅣ, though binding of null shader happens
a lot at the start (then just stops), but draw_vbo() never actually sees null
ps.

v2: added a check I missed because of a macros using a prefix to choose
a shader.

Signed-off-by: Constantine Kharlamov <Hi-Angel@yandex.ru>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2017-04-10 22:45:22 +02:00
Constantine Kharlamov
544b40089b r600g: add draw_vbo check for a NULL pixel shader
Taken from radeonsi, required to remove dummy pixel shader in the next patch

Signed-off-by: Constantine Kharlamov <Hi-Angel@yandex.ru>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2017-04-10 22:45:22 +02:00
Constantine Kharlamov
22de96680c r600g: skip repeating vs, gs, and tes shader binds
The idea is taken from radeonsi. The code lacks some checks for null vs,
and I'm unsure about some changes against that, so I left it in place.

Some statistics for GTAⅣ:
Average tesselation bind skip per frame: ≈350
Average geometric shaders bind skip per frame: ≈260
Skip of binding vertex ones occurs rarely enough to not get into per-frame
counter at all, so I just gonna say: it happens.

v2: I've occasionally removed an empty line, don't do this.
v3: return a check for null tes and gs back, while I haven't figured out
the way to move stride assignment to r600_update_derived_state() (as it
is in radeonsi).

Signed-off-by: Constantine Kharlamov <Hi-Angel@yandex.ru>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2017-04-10 22:45:22 +02:00
Ilia Mirkin
89253d5c67 nv50/ir: remove unused swizzle field in ValueRef
The nv50 ir is scalar. Perhaps this was from some early attempts to
integrate the simd aspects of nv30. However at this point it's entirely
unused.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2017-04-09 14:59:42 -04:00
Boyan Ding
b1b189a0ab nouveau: enable ARB_shader_clock on nv50 and nvc0
v2: Also enable support on nv50

Signed-off-by: Boyan Ding <boyan.j.ding@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2017-04-09 13:03:13 -04:00
Boyan Ding
6c3dd8f0ed nv50/ir: Handle TGSI_OPCODE_CLOCK
Signed-off-by: Boyan Ding <boyan.j.ding@gmail.com>
[imirkin: make zero mov non-fixed]
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2017-04-09 13:03:13 -04:00
Boyan Ding
e2e2c69927 gm107/ir: Emit SV_CLOCK system value
Signed-off-by: Boyan Ding <boyan.j.ding@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2017-04-09 13:03:13 -04:00
Ilia Mirkin
57a744025a nvc0/ir: fix overwriting of offset register with interpolateAtOffset
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
2017-04-07 23:31:01 -04:00
Ilia Mirkin
5dd490f134 gallium: fix some math formulas to display better
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-04-07 20:20:17 -04:00
Ilia Mirkin
60f5766db4 nvc0/ir: fix LSB/BFE/BFI implementations
Overwriting the src register is a very bad idea - it logically maps onto
the TGSI registers, and so is effectively overwriting the source values.

Reported-by: Boyan Ding <boyan.j.ding@gmail.com>
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
2017-04-07 20:20:16 -04:00
Nicolai Hähnle
c05cf9cf1b util: fix swizzle of INSTANCEID system value
radeonsi added stricter checking for correct swizzles in debug builds.

Reported-by: Michel Dänzer <michel.daenzer@amd.com>
Fixes: 4cf2942777 ("radeonsi: support 64-bit system values")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-04-08 00:44:52 +02:00
Bruce Cherniak
07b5b5cfd4 st/glx: Add awareness for multisample pixel formats to st/glx-xlib.
In preparation for enabling MSAA in OpenSWR, the state trackers need to
be aware of multisample pixel formats for software renderers.  This patch
allows glx-xlib to query the renderer for support of pixel
formats with multisample, and create multisample resources.

This change is benign to softpipe and llvmpipe, as is_format_supported
returns FALSE for any sample_count > 1.  OpenSWR does the same at the
moment, but that will change soon.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2017-04-07 16:50:58 -05:00
Tim Rowley
7bd5057fd1 swr: fix unused variable warnings
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-04-07 16:50:41 -05:00
Brian Paul
c77c381fae gallivm: init vars to silence gcc warnings
Silence warnings about using possibly uninitialized values.

Signed-off-by: Brian Paul <brianp@vmware.com>
2017-04-07 13:46:44 -06:00
Charmaine Lee
16bd2c6d04 svga: add context pointer to the invalidate surface interface
With this patch, we will specify the current context
when we invalidate the surface before the surface is
put back to the recycled surface pool. This allows the
winsys layer to use the specified context to do the
invalidation rather than using the last context that
referenced the surface. This prevents race condition if
the last referenced context is now made current in another thread.

Tested with MTT glretrace, NobelClinicianViewer.

Reviewed-by: Sinclair Yeh <syeh@vmware.com>
2017-04-07 13:46:44 -06:00
Brian Paul
e000b17f87 winsys/svga: use c11 thread types/functions
Gallium no longer has wrappers for mutexes and condition variables.

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
2017-04-07 13:46:44 -06:00
Thomas Hellstrom
0864f9c77a winsys/svga: Resolve command submission buffer contention v3
If two contexts wanted to access the same buffer at the same time, it would
end up on two validation lists simultaneously, which might cause a
PIPE_ERROR_RETRY when trying to validate it from one context while the other
context already had it validated but not yet fenced.

In that situation we could spin until the error goes away, or apply various
more or less expensive locking schemes to save cpu.
Here we use a scheme that briefly locks after fencing but avoids locking on
validation in the non-contended case.

v2:
Make sure we broadcast not only on releasing buffers after fencing, but also
after releasing buffers in the pb_validate_validate error path.
v3:
Don't broadcast on PIPE_ERROR_RETRY because that would increase the chance
of starvation.

Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
2017-04-07 13:46:44 -06:00
Brian Paul
0baa372b6f svga: remove pre-SVGA3D_HWVERSION_WS8_B1 code
3D wasn't officially supported before virtual HW version 8 so we can
remove this old code.

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2017-04-07 13:46:44 -06:00
Brian Paul
690fe77835 st/wgl: sort strings in stw_extension_string[] array
Trivial.
2017-04-07 13:46:44 -06:00
Charmaine Lee
b1c964447a svga: remove redundant surface propagation
Currently, surface propagation for colliding render target resource is
done at framebuffer emit time for vgpu10. This patch
adds the surface propagation for non-vgpu10 path to emit_fb_vgpu9()
and removes the redundant surface copy at set time.

Tested with MTT glretrace, piglit, NobelClinicianViewer, Turbine, Cinebench.

Reviewed-by: Neha Bhende <bhenden@vmware.com>
2017-04-07 13:46:44 -06:00
Charmaine Lee
35a748e79c svga: Fix zslice index to svga_texture_copy_handle_resource()
The zslice index to svga_texture_copy_handle_resource() is not adjusted
and should be a signed integer.

This patch fixes piglit tests for non-vgpu10 including
   spec@arb_framebuffer_object@fbo-generatemipmap-3d
   spec@glsl-1.20@execution@tex-miplevel-selection gl2:texture* 3d

Tested with MTT piglit and glretrace
2017-04-07 13:46:44 -06:00
Brian Paul
5637a497a3 svga: specify include path for git_sha1.h for out-of-src builds
If we're doing an out-of-src build, we need to specify the #include
patch to find git_sha1.h

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
2017-04-07 13:46:44 -06:00
Brian Paul
c78fc70e8c st/wgl: pseudo-implementation of WGL_EXT_swap_control
This implementation is based on querying the time just before swap/present
and doing a Sleep() if needed.  There is no sync to vblank or actual
coordination with the GPU.  This isn't perfect, but basically works.

We've had some request for this functionality, and it sounds like there
are some Windows GL apps that refuse to start if the driver doesn't
advertise this extension.

Note: NVIDIA's Windows OpenGL driver advertises the WGL_EXT_swap_control
string both with wglGetExtensionsStringEXT() and with
glGetString(GL_EXTENSIONS).  We're only advertising it with the former at
this time.

Tested with asst. Mesa demos, Google Earth, Lightsmark, etc.

VMware bug 1591534.

Reviewed-by: José Fonseca <jfonseca@vmware.com>
2017-04-07 13:46:43 -06:00
Charmaine Lee
ab96d1baf4 svga: Fix out-of-sync backing surface
When a backing surface is reused, it is possible that
the original surface has been changed. So before the backing surface
is bound again, we need to sync up the surface.
This patch creates a new helper function svga_texture_copy_handle_resource()
to sync up the backing surface resource.

This patch, together with the backing surface dirty bit fix, fixes
the rendering corruption in NobelClinicianViewer when rotating the model.

Also tested with MTT glretrace, piglit, Cinebench, Turbine.

Reviewed-by: Brian Paul <brianp@vmware.com>
2017-04-07 13:46:43 -06:00
Charmaine Lee
a08e3b88ab svga: add a reset flag to svga_propagate_surface()
The reset flag specifies if the dirty bit needs to be reset
after the surface is propagated to the texture. This is used
to make sure that the dirty bit is not reset and stay unset
before the surface is unbound.

Reviewed-by: Brian Paul <brianp@vmware.com>
2017-04-07 13:46:43 -06:00
Charmaine Lee
02c9bf2d54 svga: add the has_backed_views flag
The new has_backed_views flag specifies if any of the render target
views or depth stencil view is a backing surface view.
The flag is used in svga_propagate_rendertargets() so it can return early
if there is no surface to propagate.

Reviewed-by: Brian Paul <brianp@vmware.com>
2017-04-07 13:46:43 -06:00
Charmaine Lee
a421d45e61 svga: only destroy render target view from a context that created it
A texture can be destroyed from a different context from which it is
created, but destroying the render target view from a different context
will cause svga device errors. Similar to shader resource view,
this patch skips destroying render target view or depth stencil view
from a non-parent context.

Fixes driver errors running NobelClinician Viewer application.

Tested with NobelClinician Viewer, MTT piglit, glretrace.

Reviewed-by: Brian Paul <brianp@vmware.com>
2017-04-07 13:46:43 -06:00
Charmaine Lee
b4c4ee0762 svga: disable rasterization if rasterizer_discard is set or FS undefined
With this patch, rasterization will be disabled if the
rasterizer_discard flag is set or the fragment shader
is undefined due to missing position output from the
vertex/geometry shader.

Tested with piglit test glsl-1.50-geometry-primitive-id-restart.
Also tested with full MTT glretrace and piglit.

v2: As suggested by Roland, to properly disable rasterization, besides
    setting FS to NULL, we will also need to disable depth and stencil test.

v3: As suggested by Brian, set SVGA_NEW_DEPTH_STENCIL_ALPHA dirty bit
    in svga_bind_rasterizer_state() if the rasterizer_discard flag is
    changed.

Reviewed-by: Brian Paul <brianp@vmware.com>
2017-04-07 13:46:43 -06:00
Charmaine Lee
fed72ff6cb svga: do not emulate wide points in GS when doing transform feedback
Emulating wide points in geometry shader when doing transform feedback
is problematic. This patch disables the emulation.

Tested with piglit test ext_transform_feedback-points.
Also tested with MTT glretrace, mesa demos pointblast and spriteblast.

Reviewed-by: Brian Paul <brianp@vmware.com>
2017-04-07 13:46:43 -06:00
Rob Clark
3b32ec3ba6 gallium/util: tweak backtrace format with libunwind
To work with addr2line.sh we also need the relative offset within the
DSO.  And addr2line.sh gets confused by the leading stackframe number.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2017-04-07 08:23:02 -04:00
Rob Clark
91dfa02125 gallium/util: cache symbol lookup with libunwind
Signed-off-by: Rob Clark <robdclark@gmail.com>
2017-04-07 08:23:02 -04:00
Rob Clark
7c69ea553b gallium/util: fix missing limit check in libunwind backtrace
Fixes: 70c272004f ("gallium/util: libunwind support")
Signed-off-by: Rob Clark <robdclark@gmail.com>
2017-04-07 08:23:02 -04:00
Samuel Pitoiset
bedd89429f gallium/radeon: fix typo in radeon_winsys.h
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-04-07 00:48:19 +02:00
Tim Rowley
d5157ddca4 swr: [rasterizer core] SIMD16 Frontend WIP
Implement widened binner for SIMD16

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-04-05 18:20:45 -05:00
Tim Rowley
b8515d5c0f swr: [rasterizer core] Enable 8x2 backend
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-04-05 18:20:45 -05:00
Tim Rowley
c1b7a5780d swr: [rasterizer codegen] remove copy of mako
mako is already a mesa build requirement, extra copy not needed.

Tested building against mesa build baseline (mako-0.8.0).

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-04-05 18:20:45 -05:00
Tim Rowley
97dab87a22 swr: [rasterizer core/memory] Move intrinics to _simd functions
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-04-05 18:20:19 -05:00
Tim Rowley
117fc582f8 swr: [rasterizer core] Programmable sample position support
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-04-05 18:19:25 -05:00
Tim Rowley
3c52a7316a swr: [configure.ac/scons] require c++14
New C++ features used by upcoming swr changes.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-04-05 18:19:16 -05:00
Tim Rowley
e5fdfcf836 swr: [rasterizer core] Fix center sample pattern
Fix long hidden bug in rasterizer handling of center sample pattern.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-04-05 18:19:10 -05:00
Tim Rowley
c12b61d158 swr: [rasterizer core/memory] Fix missing avx512 storetile
Fix pre-processor macro handing to eliminate silently missing
implementation for AVX512.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-04-05 18:19:04 -05:00
Tim Rowley
cd6c200223 swr: [rasterizer core] SIMD16 Frontend WIP
Implement widened VS output for SIMD16

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-04-05 18:18:36 -05:00
Christian Gmeiner
e75001811e Revert "etnaviv: Cannot render to rb-swapped formats"
This reverts commit 658568941d.

With the help of shader variants we can render to rb-swapped
formats now. Fixes about 60 piglits.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2017-04-05 19:58:25 +02:00
Christian Gmeiner
7f62ffb68a etnaviv: add support for rb swap
If we render to rb swapped format we will create a shader variant doing
the involved swizzing in the pixel shader.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2017-04-05 19:58:22 +02:00