Commit graph

133048 commits

Author SHA1 Message Date
Timur Kristóf
9fd36bbacd radv: Calculate workgroup sizes in radv_pipeline.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12321>
2021-08-26 09:46:18 +00:00
Timur Kristóf
395c0c52c7 ac: Calculate workgroup sizes of HW stages that operate in workgroups.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12321>
2021-08-26 09:46:18 +00:00
Samuel Pitoiset
66b5f05727 ci: update the list of skipped tests for Fiji/RADV
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12553>
2021-08-26 09:09:47 +00:00
Tomeu Vizoso
203f9da167 panvk: Initialize timestamp for disk cache
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12552>
2021-08-26 08:53:45 +00:00
Boris Brezillon
587046ed25 panfrost: Make pan_blit() return the tiler job pointer
The Vulkan driver needs to patch job headers when re-issueing a command
buffer. Return the tiler job pointer to allow that.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12552>
2021-08-26 08:53:45 +00:00
Boris Brezillon
e466e0ecd2 panfrost: Fix pan_blit_ctx_init() when start > end
This can happen when one wants to obtain a mirrored view. We need
to make sure the min <= max before emitting the viewport.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12552>
2021-08-26 08:53:45 +00:00
Boris Brezillon
1c953ba212 panfrost: Prepare indirect draw helpers to per-gen XML
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12551>
2021-08-26 10:35:17 +02:00
Boris Brezillon
1447db0d51 panfrost: Prepare indirect dispatch helpers to per-gen XML
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12551>
2021-08-26 10:35:17 +02:00
Boris Brezillon
792a0ab0b1 panvk: Prepare per-gen split
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12551>
2021-08-26 10:35:17 +02:00
Boris Brezillon
c14c246439 panfrost: Only emit special attribute buffer entries on pre-v6 hardware
There's no special attributes on Bifrost.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12551>
2021-08-26 10:35:17 +02:00
Boris Brezillon
56a4aa9332 panfrost: Move panfrost_modifier_to_layout() to pan_texture.c
This function is not used outside pan_texture.c.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12551>
2021-08-26 10:35:17 +02:00
Boris Brezillon
5ca93f3599 panfrost: Get rid of all _packed structs in pan_context.h
Such that pan_context.h remains generic even after the per-gen XML
switch.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12551>
2021-08-26 10:35:17 +02:00
Boris Brezillon
0400c4ca1b pan/gen_pack: Add parens around packed1/2 vars in pan_merge()
This way we can pass *desc instead of (*desc).

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12551>
2021-08-26 10:35:17 +02:00
Boris Brezillon
fe1d33daaf panfrost: Add generic mappings for the gen-specific tiler descriptor macros
This way the transition to per-gen XML files gets simpler.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12551>
2021-08-26 10:35:17 +02:00
Boris Brezillon
5f3910a343 panfrost: Get rid of the mali_xxx enum redefinitions
The gen_macros.h header should include the common header file when
PAN_ARCH is undefined, thus making those redefinitions useless.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12551>
2021-08-26 10:35:17 +02:00
Boris Brezillon
13c13efcac panfrost: s/[idep_]midgard_pack/[idep_]pan_packers/
We will soon have per-gen pack headers. Let's rename the meson variables
to reflect that.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12551>
2021-08-26 10:35:17 +02:00
Boris Brezillon
908dde360a panfrost: Stop including midgard_pack.h directly
Include gen_macros.h instead so we can smoothly transition to per-gen
XMLs.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12551>
2021-08-26 10:35:17 +02:00
Boris Brezillon
f96a30cea5 pan/gen_macros: Include midgard_pack.h from gen_macros.h
This way we will only have a single entry point, thus making the
transition to per-gen XML files easier.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12551>
2021-08-26 10:35:17 +02:00
Boris Brezillon
f29b45f934 pan/gen_macros: Map {TEXTURE,SAMPLER} to the arch-specific descriptor
This will ease the transition to per-arch XML files. While at it, patch
pan_cmdstream.c to use this new macro and avoid an #if section.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12551>
2021-08-26 10:35:17 +02:00
Boris Brezillon
2092f60ec1 pan/gen_macros: Move the TEXTURE definition to gen_macros.h
So we can use the same trick in panvk.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12551>
2021-08-26 10:35:17 +02:00
Boris Brezillon
8a058a9190 panfrost: Move the polygon list init logic to pan_cmdstream.c
This logic is Midgard specific and we need move the
panfrost_scoreboard_initialize_tiler() call to a per-arch file so
we can make panfrost_scoreboard_initialize_tiler a per-arch function.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12551>
2021-08-26 10:35:17 +02:00
Boris Brezillon
423f67c1bd pan/gen_pack: Add pan_size() and pan_align() macros
And replace all references to MALI_xxx_{LENGTH,ALIGN} by
pan_{size,alignment}(xxx) calls so we can give generic alias to
midgard/bifrost specific descriptors.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12551>
2021-08-26 10:35:16 +02:00
Boris Brezillon
d7ff3973e9 panvk: Add missing midgard_pack dependency
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12551>
2021-08-26 10:35:16 +02:00
Boris Brezillon
188a2d3691 pan/gen_pack: Generalize the PREFIX() trick
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12551>
2021-08-26 10:35:16 +02:00
Marcin Ślusarz
e0533ebf16 intel/compiler: INT DIV function does not support source modifiers
BSpec says that for all generations.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5281
CC: mesa-stable

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12518>
2021-08-26 07:51:44 +00:00
Timur Kristóf
346eb08a3d radeonsi: Change GS vertex offset arguments to use gs_vtx_offset array.
This makes RadeonSI behave like RADV, and hence makes it possible to
use the NIR based ESGS I/O lowering and NGG lowering.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12511>
2021-08-26 05:20:15 +00:00
Timur Kristóf
5b7446d74c radv, ac, aco: Use indices 0-2 of gs_vtx_offset argument array on GFX9+.
Previously, indices 0, 2, 4 were used.
This worked, but it was somewhat unintuitive.
This commit changes it to use indices 0, 1, 2 instead, which
makes the code easier to understand.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12511>
2021-08-26 05:20:15 +00:00
Ilia Mirkin
18962b94d3 glsl: fix explicit-location ifc matching in presence of array types
We were treating each field as if it took up a single slot. However
that's not the case. And with strict matching (GLSL 4.20+ / ES 3.1+) we
would end up not matching identical interfaces.

Fixes: c4545676d7 ("glsl/linker: fix location aliasing checks for interface variables")
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12479>
2021-08-26 04:07:29 +00:00
Simon Zeni
973e9e25bd util/u_debug_symbol: remove debug_symbol_name_glibc and execinfo dependency
Signed-off-by: Simon Zeni <simon@bl4ckb0ne.ca>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12108>
2021-08-26 01:47:30 +00:00
Simon Zeni
90be0d7963 glapi/gl_gentable.py: drop call to backtrace on no op
The function uses glibc specific functions

Signed-off-by: Simon Zeni <simon@bl4ckb0ne.ca>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12108>
2021-08-26 01:47:30 +00:00
Simon Zeni
0bbb9001c2 i915: remove use of backtrace and backtrace_symbols
The function `debug_backtrace` relied on glibc specific functions, and is
unused unless someone manually patches the source to set DEBUG_BACKTRACE_SIZE

Signed-off-by: Simon Zeni <simon@bl4ckb0ne.ca>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12108>
2021-08-26 01:47:30 +00:00
Nanley Chery
565f9105b7 anv/image: Don't assert that HiZ can be added
HiZ isn't yet enabled for Tile4/64.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12132>
2021-08-25 22:39:30 +00:00
Nanley Chery
0022a11ff4 iris: Disable tiled memcpy for Tile4
ISL's tiled memcpy functions don't support it yet.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12132>
2021-08-25 22:39:30 +00:00
Jordan Justen
fd509ef59d iris: Disable the Y-tiled modifiers on XeHP+
I915_FORMAT_MOD_Y_TILED_CCS was already disabled for Xe+ due to a change
in the CCS layout. Disable the remaining Y-tiled modifiers since XeHP
lacks support for Y-tiling.

Rework:
* Nanley: Include Anuj's fix for the non-CCS modifiers.
* Nanley: Split out Anuj's fix into a separate if statement.
* Nanley: Rewrite commit message.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12132>
2021-08-25 22:39:30 +00:00
Nanley Chery
bd516c6581 intel/isl: Disable I915_FORMAT_MOD_Y_TILED on XeHP+
XeHP lacks support for Y-tiling.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12132>
2021-08-25 22:39:30 +00:00
Nanley Chery
af40104e7d intel: Add underscores to HALIGN and VALIGN enums
The HALIGN enums for XeHP already have underscores. Make the other
HALIGN and VALIGN enums conform.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12132>
2021-08-25 22:39:30 +00:00
Nanley Chery
3d1f6342c0 intel: Update surface states for XeHP alignments
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12132>
2021-08-25 22:39:30 +00:00
Nanley Chery
fbde743b07 intel/isl: Use a switch for HALIGN/VALIGN encoding
Avoid using a sparse and relatively large array for HALIGN encoding.
Additionally, this provides validation of the input alignment values.

Suggested-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12132>
2021-08-25 22:39:30 +00:00
Nanley Chery
2e464e69b9 intel/isl: Fix halign/valign of uncompressed views
We're going to start asserting for valid halign/valign values during
surface state emission. Pre-SKL, isl_surf_get_uncompressed_surf creates
uncompressed surfaces with invalid halign/valign values - 1x1. Fix this
by replacing the call to isl_surf_get_image_surf with isl_surf_init,
passing in the uncompressed format up-front.

As we're no longer using isl_surf_get_image_surf, we also need to get
the x and y offset of the image ourselves. Instead of getting a
sample-based offset, then converting to elements later on, we use
isl_surf_get_image_offset_B_tile_el to get the offset in elements
up-front.

With the above two changes, the generic code after the else-block is no
longer needed for the single-layer-view code path. We move it and
specialize it to the if-block (which is executed SKL+ and handles
multi-layer views).

Cc: mesa-stable
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12132>
2021-08-25 22:39:30 +00:00
Nanley Chery
c7bcbc950c intel/blorp: Fix Gfx7 stencil surface state valign
Stencil on Gfx7 has a vertical alignment element of 8, but the largest
its surface state can express is 4. Apply the Gfx6 solution of changing
the alignment in blorp_surf_retile_w_to_y.

Cc: mesa-stable
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12132>
2021-08-25 22:39:30 +00:00
Nanley Chery
1f62cddaf5 intel/blorp: Fix faked RGB image alignment on XeHP
On XeHP, NPOT and POT formatted surfaces will use different image
alignment units when emitting surface states. When BLORP fakes an RGB
image as RED, update the image alignment to prevent assert failures when
emitting surface states.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12132>
2021-08-25 22:39:30 +00:00
Nanley Chery
79ad9cda48 intel: Support Tile4/64 in surface states
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12132>
2021-08-25 22:39:30 +00:00
Nanley Chery
dd9ae2dc7b intel: Support Tile4/64 in depth/stencil state
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12132>
2021-08-25 22:39:30 +00:00
Nanley Chery
f54de77c3a intel/isl: Update tiling filter functions for XeHP
Enable the XeHP-specific tilings and restrict them to that platform.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12132>
2021-08-25 22:39:30 +00:00
Nanley Chery
0ab2fa18e4 intel/isl: Use an allow-list in gfx6_filter_tiling
Try to avoid having to update isl_gfx6_filter_tiling when new tilings
are added for new platforms. Note that the allow-list uses
ISL_TILING_ANY_Y_MASK and thus assumes that no new Y-tilings will be
added in the future.

Suggested-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12132>
2021-08-25 22:39:30 +00:00
Nanley Chery
602f597bc1 intel/isl: Drop ISL_SURF_USAGE_DISPLAY_*_BIT
We haven't used these since their introduction.

Suggested-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12132>
2021-08-25 22:39:30 +00:00
Nanley Chery
ac37d7801c intel/isl: Drop extra assert on array_pitch_el_rows
ISL already asserts that the variable is a multiple of the tile height
via isl_assert_div.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12132>
2021-08-25 22:39:30 +00:00
Nanley Chery
4309012774 intel/isl: Size Tile64 surfaces with 4 dimensions
In order to size Tile64 surfaces correctly, make sure that the total
physical extent is arrayed. The code should handle 3D surfaces as well,
but is untested for now.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12132>
2021-08-25 22:39:30 +00:00
Nanley Chery
8fd7678241 intel/isl: Update image alignments on XeHP
Implement the new XeHP alignment rules for surface layout.
RENDER_SURFACE_STATE objects still need updating, but that's left for a
separate commit.

Rework:
* Nanley: Include Sagar's VALIGN fix for D16_UNORM.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12132>
2021-08-25 22:39:30 +00:00
Nanley Chery
0bcfa2d8fb intel/isl: Define ISL_TILING_4/64 for XeHP
XeHP defines new tiling formats, Tile4 and Tile64. They are needed in
order to support depth/stencil surfaces and multisampling. Create new
ISL enums and define some initial tiling information in order to enable
them later on.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12132>
2021-08-25 22:39:30 +00:00