Commit graph

8977 commits

Author SHA1 Message Date
Samuel Pitoiset
8fcfadf28e radv: store a pointer to the logical device in dgc_cmdbuf
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29725>
2024-06-17 06:45:44 +00:00
Samuel Pitoiset
7fb401c7b2 radv: add a helper to load the pipeline VA for DGC
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29725>
2024-06-17 06:45:44 +00:00
Samuel Pitoiset
57206eb888 radv: remove redundant nir_builder param in some DGC helpers
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29725>
2024-06-17 06:45:44 +00:00
Samuel Pitoiset
7ff6f492d5 radv: add new macros for emiting packets in DGC
This is way cleaner.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29725>
2024-06-17 06:45:44 +00:00
Samuel Pitoiset
85d79376d8 radv: do not use nir_pkt3() when the packet len is constant with DGC
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29725>
2024-06-17 06:45:44 +00:00
Samuel Pitoiset
dd66e43bd9 radv: remove dynamic uniform/storage buffers support with DGC
vkd3d-proton is the only user of NV DGC and it doesn't need that.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29726>
2024-06-17 06:13:57 +00:00
Samuel Pitoiset
3f9fe2dbe1 radv: use BDA in the DGC prepare shader
Only for buffers that are managed by the application (ie. preprocess,
stream and sequence buffers). For future work.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29605>
2024-06-14 06:35:18 +00:00
Samuel Pitoiset
730ba8322f radv: fix incorrect buffer_list advance for multi-planar descriptors
If we have an array of multi-planar descriptors, buffer_list was
incorrectly incremented and this could have overwritten some BO entries.

In practice, this situation should be very rare because most of the
applications enable the global BO list.

Cc: mesa-stable
Closes: #10559
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28816>
2024-06-14 06:14:30 +00:00
Samuel Pitoiset
fa634503ce radv: emit SPI_GS_THROTTLE_CNTL1 when the attr ring is emitted
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29640>
2024-06-13 10:24:11 +00:00
Samuel Pitoiset
028d573d37 radv: do not set registers set by CLEAR_STATE in the preamble on GFX10-11.5
Based on RadeonSI 7baeb54c2a ("radeonsi: don't set registers set by
CLEAR_STATE in the preamble for gfx10-11").

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29640>
2024-06-13 10:24:11 +00:00
Samuel Pitoiset
a95d7e46b6 radv: update VGT_TESS_DISTRIBUTION.ACCUM_ISOLINE value
Based on PAL/RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29640>
2024-06-13 10:24:11 +00:00
David Rosca
b754ad8f15 radv/video: Add missing VCN 3.0.2 to decoder init switch
Fixes video decode on Steam Deck.

Fixes: d599391ac9 ("radv/video: use vcn ip version in more places.")
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29688>
2024-06-13 07:45:40 +00:00
Samuel Pitoiset
51d1e005e8 radv: use the common SQTT implementation
I have verified the generated command stream using PM4 is similar to
the previous one on POLARIS10, VEGA10, NAVI21 and NAVI31.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29499>
2024-06-11 06:46:55 +00:00
Samuel Pitoiset
ea8f29b4a7 radv: emit more consecutive registers for SQTT on GFX8-9
This change is only useful to compare the command stream generated by
PM4 in the next commit.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29499>
2024-06-11 06:46:55 +00:00
Samuel Pitoiset
b82e5c8da8 ac,radv,radeonsi: add more parameters to ac_sqtt
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29499>
2024-06-11 06:46:55 +00:00
Samuel Pitoiset
155399d03b ac,radv: add a helper for SQTT control register
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29499>
2024-06-11 06:46:55 +00:00
Pierre-Eric Pelloux-Prayer
a7880f3edb radv/sqtt: use radeon_check_space before emit_spm_*
This fixes the following error on a rdna2:

   radeon_set_uconfig_reg_seq: Assertion `cs->cdw + 2 + num <= cs->reserved_dw' failed.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29499>
2024-06-11 06:46:55 +00:00
Samuel Pitoiset
a80a1c9838 radv: don't assume that TC_ACTION_ENA invalidates L1 cache on gfx9
Ported from RadeonSI 279315fd73 ("radeonsi: don't assume that
TC_ACTION_ENA invalidates L1 cache on gfx9")

Thanks to Rhys for noticing this by inspection.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29644>
2024-06-11 06:15:12 +00:00
Samuel Pitoiset
128cca21c0 radv: pass a radv_shader to radv_get_compute_pipeline_metadata()
And rename to radv_get_compute_shader_metadata().

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29652>
2024-06-10 17:31:12 +00:00
Samuel Pitoiset
d4ccae739b radv: fix creating unlinked shaders with ESO when nextStage is 0
When nextStage is 0, the driver needs to assume that a stage might be
used with any valid next stages.

Fixes new dEQP-VK.shader_object.binding.*_no_next_stage.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29567>
2024-06-07 12:21:38 +00:00
Friedrich Vock
f1742d36f3 radv/rt: Fix memory leak when compiling libraries
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29579>
2024-06-06 21:56:11 +00:00
Samuel Pitoiset
afa2070c99 radv: initialize compute preambles with the common helper
The PM4 mechanism can emit paired packets on GFX11+ when possible.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29452>
2024-06-06 20:26:47 +00:00
Samuel Pitoiset
15fe733703 radv: add a helper to get image VA
Similar to buffer, and less error prone.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29428>
2024-06-06 18:21:33 +00:00
Rhys Perry
41c5f71343 radv: lower sub-dword push constants
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29480>
2024-06-06 17:52:05 +00:00
Samuel Pitoiset
5b6207b282 radv: only set valid bitfields for CB/DS surfaces address on GFX12
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29566>
2024-06-06 15:42:35 +00:00
Samuel Pitoiset
fe78ad2690 radv: fix emitting VGT_PRIMITIVEID_RESET in the GFX preamble on GFX12
It's a uconfig register.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29566>
2024-06-06 15:42:35 +00:00
Samuel Pitoiset
be3c837c04 radv: update configuring COVERAGE_TO_SHADER_SELECT on GFX12
This bit has been moved to SPI_PS_INPUT_ENA.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29566>
2024-06-06 15:42:35 +00:00
Samuel Pitoiset
27496928e4 radv: update configuring depth clamp enable on GFX12
DISABLE_VIEWPORT_CLAMP has been moved to a new register.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29566>
2024-06-06 15:42:35 +00:00
Samuel Pitoiset
8cb2cad434 ac,radv,radeonsi: add a function to build texture descriptors
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29321>
2024-06-06 10:15:10 +00:00
Samuel Pitoiset
4bb308d403 radv: use pipe_format when building image view descriptors
This simplifies things before adding a common helper for building
texture descriptors.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29321>
2024-06-06 10:15:10 +00:00
Samuel Pitoiset
57d0d63d01 radv: only emit CB_COLOR0_DCC_CONTROL on GFX8
This register doesn't exist on GFX6-7 (no DCC at all).

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29545>
2024-06-06 07:58:19 +02:00
Samuel Pitoiset
07b0096011 radv: only emit SPI_SHADER_PGM_SRC3_GS on GFX7+
This register doesn't exist on GFX6.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29545>
2024-06-06 07:58:00 +02:00
Samuel Pitoiset
4a7150b469 radv: do not set VGT_SHADER_STAGES_EN.DYNAMIC_HS on GFX9
This bit doesn't exist.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29545>
2024-06-06 07:58:00 +02:00
Samuel Pitoiset
4a75b50eb8 radv: only emit SQ_PERFCOUNTER_MASK on GFX7-9
This register doesn't exist on GFX10-10.3.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29545>
2024-06-06 07:58:00 +02:00
Samuel Pitoiset
96e7ac027c radv: only emit VGT_GS_MAX_PRIMS_PER_SUBGROUP on GFX9
This register doesn't exist on GFX10+.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29545>
2024-06-06 07:58:00 +02:00
Samuel Pitoiset
f62a8f888f radv: only set valid bitfields for CB/DS surfaces address
This isn't a problem in practice but better to mask them out.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29545>
2024-06-06 07:57:59 +02:00
Samuel Pitoiset
f7e6609390 radv: assert that GDS/GDS OA buffers can't be created on GFX12
No GDS on GFX12 and this will be annoying for some queries that
currently rely on atomic GDS.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29525>
2024-06-05 14:47:27 +00:00
Samuel Pitoiset
8e9e877eb2 radv: cleanup radv_precompute_registers_hw_{ngg,fs}
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29525>
2024-06-05 14:47:27 +00:00
Samuel Pitoiset
d5074228ab radv: do not set VGT_PRIMITIVEID_EN.PRIMITIVEID_EN on GFX12
This bitfield doesn't exist.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29525>
2024-06-05 14:47:27 +00:00
Samuel Pitoiset
87c1b981d9 radv: fix configuring NGG registers on GFX12
ac_compute_late_alloc() shouldn't be called on GFX12.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29525>
2024-06-05 14:47:27 +00:00
Samuel Pitoiset
052655b65d radv: do not emit SPI_SHADER_PGM_RSRC3_GS on GFX12
This register shouldn't be emitted according to RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29525>
2024-06-05 14:47:27 +00:00
Samuel Pitoiset
e6609fa004 radv: update configuring PA_SC_WINDOW_SCISSOR on GFX12
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29525>
2024-06-05 14:47:27 +00:00
Samuel Pitoiset
f6aeb86f35 radv: update configuring depth stencil buffers on GFX12
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29525>
2024-06-05 14:47:27 +00:00
Samuel Pitoiset
d9650fef24 radv: update configuring color buffers on GFX12
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29525>
2024-06-05 14:47:27 +00:00
Samuel Pitoiset
a06aaef704 radv: update number of input VGPRs for VS on GFX12
InstanceID is in VGPR1.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29525>
2024-06-05 14:47:27 +00:00
Samuel Pitoiset
b912d2f899 radv: configure PA_SC_SAMPLE_PROPERTIES on GFX12
MAX_SAMPLE_DIST has been moved from PA_SC_AA_CONFIG.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29525>
2024-06-05 14:47:27 +00:00
Samuel Pitoiset
964f2b8140 radv: fix VRS subpass attachments with mipmaps
On GFX10.3, the driver should use the VRS image view provided by the
rendering state because it sets the base level correctly. On GFX11+,
using the image view dimension is enough.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29531>
2024-06-05 06:14:10 +00:00
Faith Ekstrand
bf9038b3b8 radv: Advertise VK_EXT_shader_replicated_composites
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29509>
2024-06-04 16:34:48 +00:00
Turo Lamminen
6796396257 radv: Optimize memcpy in write_image_descriptor
The size parameter can only take certain values. Make this visible to
the compiler to encourage it to inline the memcpy.

This improves descriptor_16combined_sampler from vkoverhead
considerably.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27191>
2024-05-31 11:50:46 +00:00
Samuel Pitoiset
d4b37eca5f radv: do not set DX10_CLAMP on GFX12
This bit doesn't exist.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29482>
2024-05-31 08:02:33 +00:00