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Author SHA1 Message Date
Rhys Perry
8dcfce3587 aco/ra: refactor update_renames slightly 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38811>
 2026-01-16 10:05:39 +00:00
Samuel Pitoiset
cb7e1859d7 radv/sqtt: fail if GPU clocks can't be sampled 
All timing would be wrong otherwise, this should be considered a real
error.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39311>
 2026-01-16 08:30:32 +00:00
Samuel Pitoiset
feed5fbc71 radv/sqtt: delay VMID reservation at capture time 
If two devices/instances are created, the VMID reservation will just
fail. It seems fine as long as it's reserved before SPM is used.

Fixes: a7a4abc8d8 ("radv: Move VMID reservation to vkCreateDevice")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39311>
 2026-01-16 08:30:32 +00:00
Emma Anholt
ed8676dc28 nir: Rename the unit_test_*_amd intrinics to be un-vendored. 
We'll reuse these from the nir_opt_algebraic_pattern_test.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39076>
 2026-01-15 19:09:37 +00:00
Emma Anholt
b375da7f2a nir: Let nir_eval_const_opcode() return a poison mask in case of UB. 
This is unused by any callers currently, but will be useful for nir
algebraic pattern testing, and as a way to turn our comments in
nir_opcodes.py into actual C code.  For now, always returns false.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39076>
 2026-01-15 19:09:32 +00:00
Samuel Pitoiset
ae34627e54 ac/cmdbuf: disable ENABLE_PING_PONG_BIN_ORDER on GFX11.5
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Might be a hardware bug.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14240
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39315>
 2026-01-15 17:55:26 +00:00
Benjamin Cheng
371656de90 radv/video_enc: Remove CTS WA 
This has been fixed in CTS since ebe05a88f36e3be8e232bfce97812353c396674a.

Reviewed-by: David Rosca <david.rosca@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39242>
 2026-01-15 11:45:33 +00:00
Marek Olšák
fa88c65bb8 radv,radeonsi: don't set LINE_STIPPLE_TEX_ENA on gfx12 
Fixes: 3c5c96fedb - radv: double pixel throughput in certain cases of PS without interpolated inputs
Fixes: 5acabdd1f8 - radeonsi: double pixel throughput in certain cases of PS without inputs
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14646

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39316>
 2026-01-15 09:12:13 +00:00
Samuel Pitoiset
c559042a2a radv/dgc: adjust task+mesh SQTT markers 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39178>
 2026-01-15 09:43:00 +01:00
Samuel Pitoiset
82d00a4963 radv: fix missing SQTT markers for task+mesh draws 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39178>
 2026-01-15 09:43:00 +01:00
Samuel Pitoiset
aee006efcd radv/sqtt: emit userdata in the gang CS when needed 
For task shaders.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39178>
 2026-01-15 09:43:00 +01:00
Samuel Pitoiset
4da2e971e6 radv/sqtt: rework radv_emit_sqtt_userdata() to support gang CS 
For task shaders.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39178>
 2026-01-15 09:42:59 +01:00
Samuel Pitoiset
1917750baf ci: uprev VKCTS main to 4d3bedc74e2258c483cf968753207cff84d9e4fc 
RADV is the only driver using VKCTS main.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39229>
 2026-01-15 06:43:34 +00:00
Natalie Vock
6f076cdfda radv: Use wave32 for RT on gfx11+ 
ACO got a lot better at forming VOPD instructions, and testing
feedback seems to point in a slightly positive direction for this.

gfx12 will also start requiring wave32 for dynamic VGPR allocation at
some point.

Measurements on navi31:

Cyberpunk 2077:
Difference at 95.0% confidence
        1.12333 +/- 0.42876
        1.88216% +/- 0.718391%
        (Student's t, pooled s = 0.189165)

Black Myth Wukong benchmark:
Difference at 95.0% confidence
        4 +/- 1.30862
        13.9535% +/- 4.56495%
        (Student's t, pooled s = 0.57735)

Portal with RTX:
66.2ms->61.5ms (~7.64% improvement)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39275>
 2026-01-14 23:39:24 +00:00
Aitor Camacho
fcf53988c4 nir/opt_varyings: Support implementations that cannot compact 16-bits
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Add nir_io_compact_to_higher_16 flag so that the pass knows if it can
compact 16-bit varyings into the higher 16 bits of a 32-bit varying.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Aitor Camacho <aitor@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38994>
 2026-01-14 20:44:41 +00:00
Natalie Vock
cc81c7de23 nir,aco: Clean up useless lowering of sbt_base_amd 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29580>
 2026-01-14 14:19:07 +00:00
Natalie Vock
27c0326391 radv: Re-enable RT pipelines 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29580>
 2026-01-14 14:19:07 +00:00
Natalie Vock
0a1911b220 radv,aco: Use function call structure for RT programs 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29580>
 2026-01-14 14:19:07 +00:00
Natalie Vock
c5d796c902 radv/rt: Use function call structure in NIR lowering 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29580>
 2026-01-14 14:19:06 +00:00
Natalie Vock
d3cb8b4046 radv: Refactor RT lowering decisions and add RADV_PERFTEST CPS override 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29580>
 2026-01-14 14:19:06 +00:00
Natalie Vock
63c019f5be radv: Temporarily disable RT pipelines 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29580>
 2026-01-14 14:19:05 +00:00
Natalie Vock
06c2e90e35 aco: Note if a parameter needs to be explicitly preserved 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29580>
 2026-01-14 14:19:05 +00:00
Natalie Vock
2bf403ccec aco: Remove bypass_reg_preservation 
Not needed anymore

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29580>
 2026-01-14 14:19:05 +00:00
Natalie Vock
8525993d02 aco/ra: Move register preservation logic in last block to p_return 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29580>
 2026-01-14 14:19:05 +00:00
Natalie Vock
eb86ae3b8c aco/spill_preserved: Fix spilled VGPR overflow handling 
We modified the spill offset inside the function, which made subsequent
calls to emit_vgpr_spills_reloads reload from the wrong offset.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29580>
 2026-01-14 14:19:05 +00:00
Natalie Vock
d563415100 radv: Add traversal stack size to cache 
We just... didn't do this at all??? I have no idea how this didn't blow
up before, given that plenty of apps should generate a traversal shader
that spills (and thus has a large stack size), but it did finally blow
up in function-call related work.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29580>
 2026-01-14 14:19:05 +00:00
Rhys Perry
7a09e4a740 aco: use correct addition opcodes in gfx6-8 RT prolog
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Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Fixes: 60dd9d797e ("aco: Swizzle ray launch IDs in the RT prolog")
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39232>
 2026-01-14 11:23:42 +00:00
Rhys Perry
da728d5a1a aco: micro-optimize ray launch ID swizzling 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39232>
 2026-01-14 11:23:42 +00:00
Alyssa Rosenzweig
e98728de3c radv: cleanup texture builder 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39271>
 2026-01-14 08:18:15 +00:00
Samuel Pitoiset
76e7a1cde4 ac/sdma: fix stencil only copies on GFX9
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Use the correct pitch per elements for stencil only surfaces.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39281>
 2026-01-14 07:39:02 +00:00
Samuel Pitoiset
14deea2633 radv: enable SPM for GFX11.5 
This adds support for performance counters with RGP on GFX11.5.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39270>
 2026-01-13 22:16:40 +00:00
Samuel Pitoiset
adfb1ddebf ac/perfcounter: use GFX11 definition for GFX11.5 
Pretty much everything seems similar.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39270>
 2026-01-13 22:16:40 +00:00
Konstantin Seurer
58a35647e1 radv: Fix crash if proceed comes before initialize
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"initialize" can be NULL if the rq_proceed was visited before
rq_initialize.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14626
cc: mesa-stable

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39251>
 2026-01-12 22:34:32 +00:00
Natalie Vock
473cf6046a aco/spill_preserved: Preserve linear VGPRs even if they aren't p_spill operands 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39157>
 2026-01-12 21:46:50 +00:00
Natalie Vock
1ef2691221 aco/spill: Fix preserved reload operand update 
p_logical_end is actually after p_reload_preserved, so this didn't do
anything.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39157>
 2026-01-12 21:46:50 +00:00
Natalie Vock
548062f10e aco/insert_waitcnt: Don't determine linearity by reg number 
VGPRs can be linear too, and RT function calls will add VMEM
instructions acting on linear VGPRs. Using the linear VGPR in a block
with only linear preds will cause the pass to incorrectly skip inserting
s_waitcnt.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39157>
 2026-01-12 21:46:50 +00:00
Natalie Vock
7c12603933 aco/lower_to_hw_instr: Preserve linearity of lowered linear VGPRs 
So subsequent passes like waitcnt insertion can know these are linear.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39157>
 2026-01-12 21:46:50 +00:00
Natalie Vock
0d93e8ce54 aco: Don't insert p_reload_preserved in loops 
This can't work.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39157>
 2026-01-12 21:46:50 +00:00
Natalie Vock
c816f699b2 aco/spill_preserved: Only reload linear VGPRs at end 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39157>
 2026-01-12 21:46:50 +00:00
Natalie Vock
897c95c37e aco: Include arbitrarily fixed registers in max_reg_demand 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39157>
 2026-01-12 21:46:50 +00:00
Georg Lehmann
daf235c607 aco/tests: don't destroy vk_device if it was never created 
Happens if you only run one test that doesn't need a vk_device.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39268>
 2026-01-12 16:16:54 +00:00
Georg Lehmann
fad95030a7 aco/tests: test VALUMaskWriteHazard with v_cmpx 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39252>
 2026-01-12 15:48:39 +00:00
Georg Lehmann
1d85552745 aco/tests: test VALUReadSGPRHazard with v_cmpx 
To avoid regressing this in a future rework.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39252>
 2026-01-12 15:48:39 +00:00
Georg Lehmann
3e10ab34e1 aco/insert_NOPs: explicitly wait for sa_sdst to resolve SALU -> VALU hazards 
The assumption that these waits are not required has been proven incorrect
in at least some cases.

Totals from 190 (0.24% of 79825) affected shaders: (Navi31)
Instrs: 499718 -> 500491 (+0.15%)
CodeSize: 2658228 -> 2661916 (+0.14%)
Latency: 5964632 -> 5965453 (+0.01%); split: -0.00%, +0.01%
InvThroughput: 794221 -> 794289 (+0.01%)

Totals from 17093 (21.41% of 79839) affected shaders: (Navi48)
Instrs: 22805214 -> 22854313 (+0.22%)
CodeSize: 121240428 -> 121432904 (+0.16%); split: -0.00%, +0.16%
Latency: 166500300 -> 166530529 (+0.02%); split: -0.00%, +0.02%
InvThroughput: 28770053 -> 28772870 (+0.01%); split: -0.00%, +0.01%

Fixes: 018f45f981 ("aco/insert_NOPs: remove redundant VALUReadSGPRHazard waits")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14516

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39252>
 2026-01-12 15:48:38 +00:00
Samuel Pitoiset
b65cc9d587 ac,radv: sample and set correct shader/memory clocks for RGP 
These clocks need to be the clocks at trace time. This shouldn't fix
anything given that RADV sets profile_peak when SQTT is enabled but
better to report it correctly anyways.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39208>
 2026-01-12 11:58:43 +00:00
David Rosca
0518784b62 radv/amdgpu: Only wait on queue syncobj when needed 
This would always wait on the queue syncobj if there was any other
wait syncobj, but it should only wait after zero submit.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39193>
 2026-01-12 10:59:03 +00:00
Dave Airlie
ab9e904f24 radv/coopmat: fix deref stride
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This at least fixes the nir debug output to have correct values.

Fixes: 48fc8c8d1c ("radv/nir/lower_cmat: set optimal load/store alignment")
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39256>
 2026-01-12 10:39:05 +00:00
David Rosca
df4220d500 radv/video: Use different dpb swizzle mode for 10 bit encode 
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Benjamin Cheng <benjamin.cheng@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39189>
 2026-01-12 10:18:18 +00:00
David Rosca
587a7aa510 radv: Enable DCC modifiers for multi plane formats on GFX12 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39190>
 2026-01-12 09:57:56 +00:00
Samuel Pitoiset
5bcca4a832 radv/spm: use a staging buffer for faster reads on dGPUS 
This allows us to move the SPM buffer to VRAM because I think it must
be in VRAM too.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39195>
 2026-01-12 09:35:37 +00:00