Commit graph

115447 commits

Author SHA1 Message Date
Alyssa Rosenzweig
95732cc9ef pan/midgard: Obey fragment writeout criteria
Rather than always emitting an extra move for fragments, check the
actual criteria and emit accordingly. (This was lost during the RA
improvements at the end of May).

total bundles in shared programs: 2210 -> 2176 (-1.54%)
bundles in affected programs: 501 -> 467 (-6.79%)
helped: 34
HURT: 0
helped stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1
helped stats (rel) min: 1.59% max: 33.33% x̄: 13.13% x̃: 12.50%
95% mean confidence interval for bundles value: -1.00 -1.00
95% mean confidence interval for bundles %-change: -16.06% -10.21%
Bundles are helped.

total quadwords in shared programs: 3639 -> 3605 (-0.93%)
quadwords in affected programs: 795 -> 761 (-4.28%)
helped: 34
HURT: 0
helped stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1
helped stats (rel) min: 0.96% max: 33.33% x̄: 11.22% x̃: 8.33%
95% mean confidence interval for quadwords value: -1.00 -1.00
95% mean confidence interval for quadwords %-change: -14.31% -8.13%
Quadwords are helped.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-07-26 08:37:09 -07:00
Alyssa Rosenzweig
20771ede1c pan/midgard: Add post-RA move elimination
Think of this pass as register coalescing part 2. After RA runs, but
before scheduling, we scan for code of the form:

   mov rN, rN

and delete the move, since it's totally redundant. This pass helps
already, but it'd of course be much more effective paired with
register coalescing to encourage moves in general to end up in this
form. Nevertheless, even by itself:

total instructions in shared programs: 3665 -> 3613 (-1.42%)
instructions in affected programs: 2046 -> 1994 (-2.54%)
helped: 52
HURT: 0
helped stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1
helped stats (rel) min: 0.19% max: 25.00% x̄: 8.02% x̃: 4.00%
95% mean confidence interval for instructions value: -1.00 -1.00
95% mean confidence interval for instructions %-change: -10.26% -5.79%
Instructions are helped.

total bundles in shared programs: 2256 -> 2213 (-1.91%)
bundles in affected programs: 1154 -> 1111 (-3.73%)
helped: 43
HURT: 0
helped stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1
helped stats (rel) min: 0.33% max: 25.00% x̄: 9.10% x̃: 5.56%
95% mean confidence interval for bundles value: -1.00 -1.00
95% mean confidence interval for bundles %-change: -11.60% -6.60%
Bundles are helped.

total quadwords in shared programs: 3689 -> 3642 (-1.27%)
quadwords in affected programs: 2025 -> 1978 (-2.32%)
helped: 47
HURT: 0
helped stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1
helped stats (rel) min: 0.19% max: 25.00% x̄: 7.86% x̃: 3.85%
95% mean confidence interval for quadwords value: -1.00 -1.00
95% mean confidence interval for quadwords %-change: -10.30% -5.42%
Quadwords are helped.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-07-26 08:37:09 -07:00
Alyssa Rosenzweig
cb6dea6b4d pan/midgard: Share mir_nontrivial_outmod
To be used with redundant move elimination.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-07-26 08:37:08 -07:00
Alyssa Rosenzweig
b6946d35c8 pan/midgard: Implement texture RA
total instructions in shared programs: 3916 -> 3665 (-6.41%)
instructions in affected programs: 1405 -> 1154 (-17.86%)
helped: 35
HURT: 0
helped stats (abs) min: 1 max: 21 x̄: 7.17 x̃: 3
helped stats (rel) min: 3.00% max: 28.57% x̄: 20.11% x̃: 21.74%
95% mean confidence interval for instructions value: -9.35 -4.99
95% mean confidence interval for instructions %-change: -22.75% -17.46%
Instructions are helped.

total bundles in shared programs: 2472 -> 2256 (-8.74%)
bundles in affected programs: 906 -> 690 (-23.84%)
helped: 32
HURT: 0
helped stats (abs) min: 1 max: 18 x̄: 6.75 x̃: 3
helped stats (rel) min: 5.56% max: 32.26% x̄: 20.83% x̃: 16.67%
95% mean confidence interval for bundles value: -9.09 -4.41
95% mean confidence interval for bundles %-change: -23.77% -17.89%
Bundles are helped.

total quadwords in shared programs: 3965 -> 3689 (-6.96%)
quadwords in affected programs: 1568 -> 1292 (-17.60%)
helped: 35
HURT: 0
helped stats (abs) min: 1 max: 21 x̄: 7.89 x̃: 3
helped stats (rel) min: 2.08% max: 28.57% x̄: 19.87% x̃: 20.00%
95% mean confidence interval for quadwords value: -10.38 -5.39
95% mean confidence interval for quadwords %-change: -22.57% -17.17%
Quadwords are helped.

total registers in shared programs: 411 -> 392 (-4.62%)
registers in affected programs: 76 -> 57 (-25.00%)
helped: 15
HURT: 0
helped stats (abs) min: 1 max: 2 x̄: 1.27 x̃: 1
helped stats (rel) min: 9.09% max: 50.00% x̄: 30.97% x̃: 33.33%
95% mean confidence interval for registers value: -1.52 -1.01
95% mean confidence interval for registers %-change: -39.12% -22.82%
Registers are helped.

total threads in shared programs: 426 -> 432 (1.41%)
threads in affected programs: 6 -> 12 (100.00%)
helped: 3
HURT: 0
helped stats (abs) min: 2 max: 2 x̄: 2.00 x̃: 2
helped stats (rel) min: 100.00% max: 100.00% x̄: 100.00% x̃: 100.00%

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-07-26 08:37:08 -07:00
Alyssa Rosenzweig
13f61f24ea pan/midgard: Fix backwards blend color load
The source and destination were incorrectly flipped in the move, but
some details of our internal regalloc made this function anyway. Now
that we're changing the regalloc, we need to fix this to avoid
regressing blend shaders.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-07-26 08:37:08 -07:00
Alyssa Rosenzweig
a99ecc2b2b pan/midgard: Fix scheduling mishap
We shouldn't try to schedule onto a vmul if the last unit was a smul;
that would force a break ("traveling back in time").

total bundles in shared programs: 2519 -> 2472 (-1.87%)
bundles in affected programs: 791 -> 744 (-5.94%)
helped: 20
HURT: 0
helped stats (abs) min: 1 max: 9 x̄: 2.35 x̃: 1
helped stats (rel) min: 1.52% max: 11.76% x̄: 7.94% x̃: 7.69%
95% mean confidence interval for bundles value: -3.47 -1.23
95% mean confidence interval for bundles %-change: -9.36% -6.51%
Bundles are helped.

total quadwords in shared programs: 4028 -> 3965 (-1.56%)
quadwords in affected programs: 1223 -> 1160 (-5.15%)
helped: 17
HURT: 0
helped stats (abs) min: 1 max: 17 x̄: 3.71 x̃: 2
helped stats (rel) min: 2.97% max: 10.64% x̄: 6.97% x̃: 7.14%
95% mean confidence interval for quadwords value: -5.71 -1.70
95% mean confidence interval for quadwords %-change: -8.03% -5.91%
Quadwords are helped.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-07-26 08:37:08 -07:00
Alyssa Rosenzweig
e4038f9445 pan/midgard: Fix vector->scalar swizzles
The swizzle should be taken on the masked component, rather than
unconditionally X.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-07-26 08:37:08 -07:00
Alyssa Rosenzweig
10324095d2 pan/midgard: Add dead move elimination pass
This is a special case of DCE designed to run after the out-of-ssa pass
to cleanup special register lowering.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-07-26 08:37:08 -07:00
Alyssa Rosenzweig
082485d663 pan/midgard: Move DCE into its own file
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-07-26 08:37:08 -07:00
Alyssa Rosenzweig
f9e619fa82 pan/midgard: Add mir_rewrite_dst_tag helper
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-07-26 08:37:08 -07:00
Alyssa Rosenzweig
b3cab85606 pan/midgard: Fix flipped register bias fields
We mixed up component_lo and full, which made it appear that we had
less freedom in RA than we actually do. Fix this to fix some
disassemblies as well as prepare for RA with the bias field.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-07-26 08:37:08 -07:00
Alyssa Rosenzweig
be56840d5a pan/midgard: Update RA for cubemap coords
Following the RA work, we apply the same technique to eliminate the move
to r27 when loading cubemaps.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-07-26 08:37:08 -07:00
Eric Engestrom
d2de5b6ba2 anv+tu+radv: delete unusable dev_icd.json
As per previous commit, Meson doesn't support using uninstalled libs,
they're simply not ready until `ninja install` is ran, so delete them.

Suggested-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> # for anv
Reviewed-by: Eric Anholt <eric@anholt.net> # for tu
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> # for radv
2019-07-26 14:47:53 +00:00
Eric Engestrom
2605e9fe46 docs: fix intel_icd.json path
Meson doesn't support using uninstalled libs, they're simply not ready
until `ninja install` is ran, at which point one might as well use the
proper icd.json file in the install folder.

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2019-07-26 14:47:53 +00:00
Bas Nieuwenhuizen
9653d80de1 vulkan/wsi/x11: Increase the effective min. images for mailbox.
We need 5 images:
1) CPU work
2) GPU work
3) idle
4) queued for flip
5) presenting

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-07-26 16:37:28 +02:00
Bas Nieuwenhuizen
5eae9bfbfc vulkan/wsi/x11: Wait for GPU work before present with mailbox.
Otherwise the wait only happens at flip time, which messes with
keeping idle buffers around if the GPU work makes the image miss
the next flip.

I decided not to use the wait fences as those are still xshm fences,
so that means we'd still have to wait in the application. Just doing
it before presenting makes things simpler.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-07-26 16:37:28 +02:00
Bas Nieuwenhuizen
cc6a72a002 vulkan/wsi/x11: Allow using thread present-only.
This allows doing a potential long blocking operation before present.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-07-26 16:37:28 +02:00
Bas Nieuwenhuizen
55da4e1ec2 vulkan/wsi: Use one fence per image.
Much easier to work with if we want to use them in the WS-specific
WSI implementation.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-07-26 16:37:28 +02:00
Lionel Landwerlin
0fb61dfdeb spirv: propagate access qualifiers through ssa & pointer
Not only variables can be flagged as NonUniformEXT but also
expressions. We're currently ignoring it in an expression such as :

   imageLoad(data[nonuniformEXT(rIndex)], 0)

The associated SPIRV :

   OpDecorate %69 NonUniformEXT
   ...
   %69 = OpLoad %61 %68

This changes propagates access qualifiers through ssa & pointers so
that when it hits a OpLoad/OpStore style instructions, qualifiers are
not forgotten.

Fixes failure the following tests :

   dEQP-VK.descriptor_indexing.*

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 8ed583fe52 ("spirv: Handle the NonUniformEXT decoration")
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
2019-07-26 14:09:55 +00:00
Lionel Landwerlin
86b53770e1 spirv: wrap push ssa/pointer values
This refactor allows for common code to apply decoration on all
ssa/pointer values. In particular this will allow to propagage access
qualifiers.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Suggested-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
2019-07-26 14:09:55 +00:00
Lionel Landwerlin
8c330728f3 nir: add access to image_deref intrinsics
SPIRV added the ability to access variables and have expressions non
dynamically uniform and because spirv_to_nir generates deref
instructions, we'll need to have that access there.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
2019-07-26 14:09:55 +00:00
Yevhenii Kolesnikov
02ecf16a70 main: unreference ATIFragmentShader program before creating new one
Old program was overwritten without release of memory.

Signed-off-by: Yevhenii Kolesnikov <yevhenii.kolesnikov@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-07-26 12:51:05 +00:00
Yevhenii Kolesnikov
fad848094f state_tracker: Add destroying routine for feedback and select stages
Fixes leaking memory on iris.

Signed-off-by: Yevhenii Kolesnikov <yevhenii.kolesnikov@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-07-26 15:35:03 +03:00
Iago Toral Quiroga
1a99fc0fd0 v3d: fix glDrawTransformFeedback{Instanced}()
This needs to take the vertex count from the provided transform
feedback buffer.

v2:
 - don't take the vertex count from the underlying buffer, instead,
   take it from a v3d subclass of pipe_stream_output_target (Eric).

Fixes piglit tests:
spec/ext_transform_feedback2/draw-auto
spec/ext_transform_feedback2/draw-auto instanced

Reviewed-by: Eric Anholt <eric@anholt.net>
2019-07-26 08:29:41 +02:00
Iago Toral Quiroga
47eb74ae00 v3d: subclass pipe_streamout_output_target to record TF vertices written
Reviewed-by: Eric Anholt <eric@anholt.net>
2019-07-26 08:29:41 +02:00
Iago Toral Quiroga
39df568ca1 v3d: refactor v3d_tf_statistics_record slightly
Reviewed-by: Eric Anholt <eric@anholt.net>
2019-07-26 08:29:41 +02:00
Alyssa Rosenzweig
2f9236096a Revert "panfrost: Don't DIY point size/coord fields"
This reverts commit 4508f43eed, which
broke a bunch of dEQP tests (e.g. in
dEQP-GLES2.functional.draw.draw_arrays.*)

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-07-25 13:17:22 -07:00
Jason Ekstrand
295e5a17da anv: Disable transform feedback on gen7
It's totally implementable, it's just that the plumbing is a bit
different and we never hooked it up.  Don't advertise a broken feature.

Fixes: 36ee2fd61c "anv: Implement the basic form of VK_EXT_transform_feedback"
2019-07-25 14:58:14 -05:00
Pierre-Eric Pelloux-Prayer
cd02f60c1e mesa: Fix GetTextureImage error reporting, again
Iago Toral Quiroga fixed this in commit 94f740e3fc,
but it recently regressed in 0d8826f723.
Quoting Iago's original commit message for the fix:

GetTex*Image should return INVALID_ENUM if target is not valid, however,
GetTextureImage does not receive a target, and instead should return
INVALID_OPERATION if the effective target is not valid.  From the
OpenGL 4.6 core profile spec, section 8.11 Texture Queries:

   "An INVALID_OPERATION error is generated by GetTextureImage if the
    effective target is not one of TEXTURE_1D, TEXTURE_2D, TEXTURE_3D,
    TEXTURE_1D_ARRAY, TEXTURE_2D_ARRAY, TEXTURE_CUBE_MAP_ARRAY,
    TEXTURE_RECTANGLE, or TEXTURE_CUBE_MAP (for GetTextureImage only)."

Note that this differs from the original ARB_direct_state_access spec.

However, the EXT_direct_state_access version does take a target
parameter, so it should continue reporting INVALID_ENUM.

Fixes KHR-GL45.direct_state_access.textures_image_query_errors.

Fixes: 0d8826f723 ("mesa: refactor get_texture_image to remove duplicate code")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2019-07-25 18:43:40 +00:00
Kenneth Graunke
0e24d10ff5 iris: Use gen_mi_builder to handle CS ALU operations.
In a few cases, we switch to MI_MATH instead of MI_PREDICATE,
just because we were already doing math and it's easier to chain
together.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
2019-07-25 18:42:55 +00:00
Kenneth Graunke
fe08aa67a8 intel/mi: Add a unit test for gen_mi_store_if().
This tests that predicated stores work.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
2019-07-25 18:42:55 +00:00
Kenneth Graunke
74063ee61a intel/mi: Add a new gen_mi_store_if() helper.
This performs predicated MI_STORE_REGISTER_MEM commands, assuming that
the condition is already loaded into MI_PREDICATE_DATA.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
2019-07-25 18:42:55 +00:00
Kenneth Graunke
27b5817b6c intel/mi: Add gen_mi_nz() and gen_mi_z() helpers.
These provide comparisons against zero.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
2019-07-25 18:42:55 +00:00
Kenneth Graunke
4e16b838ba intel/mi: Add a gen_mi_ior() to go with gen_mi_iand()
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
2019-07-25 18:42:55 +00:00
Kenneth Graunke
79b8e3c260 intel/mi: Optimize away LOAD_REGISTER_REG from a register to itself
We might want to resolve something to be in a particular register,
so we can access it outside of the gen_mi framework...but it may already
be in that register, at which point there's no work to do.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
2019-07-25 18:42:55 +00:00
Kenneth Graunke
fe7ed6b057 iris: Make iris_query.c a genxml-compiled file.
This will let us use Jason's new MI-builder shortly.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
2019-07-25 18:42:55 +00:00
Kenneth Graunke
975f7e4a59 iris: Move iris_resolve_conditional_render to the vtable.
It's going to be in genxml code shortly.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
2019-07-25 18:42:55 +00:00
Kenneth Graunke
6c4c7b600d iris: Refactor genxml macros and inlines into iris_genx_macros.h.
This will let us put the genxml boilerplate in one place, before we
expand genxml to more files shortly.  Like i965/genX_boilerplate.h.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
2019-07-25 18:42:55 +00:00
Kenneth Graunke
204a3bb816 iris: Make an iris_genx_protos.h header for prototypes.
This lets us specify the prototypes once, instead of cut and pasting
them per generation.  isl uses a similar approach (isl_genX_priv.h).

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
2019-07-25 18:42:55 +00:00
Marek Olšák
068093e84c radeonsi: fix DAL hang due to incorrect DCC offset on Raven
Set the correct relative offset.

Fixes: f8b6c5a "radeonsi: rewrite si_get_opaque_metadata, also for gfx10 support"
2019-07-25 14:09:11 -04:00
Jason Ekstrand
9d2aa67c47 anv: Disable subgroup arithmetic on gen7
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-07-25 16:43:16 +00:00
Eric Anholt
f60defa72d gitlab-ci: Add a shader-db run using v3d on drm-shim.
This provides significant compiler coverage during CI at a fairly low
cost in CPU time (~17s per thread for 4 threads on
gst-gitlab-htz-runner3).

I'm leaving wget in the docker image, as once this is in master I'm
planning on having an automatic shader-db comparison between master
and the branch included in the artifacts.  I also haven't done
freedreno yet, because it has some races when run in multithreaded
mode that I'm still tracking down.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
2019-07-25 08:56:55 -07:00
Eric Anholt
dd3d0b2897 gitlab-ci: Only keep the build logs as artifacts.
On a build failure, we were tarring up the whole ccache directory,
build.ninja, build products, etc.  This was over 400MB compressed on a
recent early meson-main build failure, which fd.o then has to hang on
to for 4 weeks.  The build logs are probably the interesting part, are
potentially useful regardless ("how did CI's build flags differ from
mine?"), and are <500k uncompressed on my personal meson build.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2019-07-25 08:56:49 -07:00
Eric Anholt
f68b987387 gitlab-ci: Always set libdir to lib/
I introduced libdir for cross-builds so we could point at the
resulting drivers without per-arch dependencies, but I'd rather not
have to type x86_64-linux-whatever for non-cross-builds either.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
2019-07-25 08:56:19 -07:00
Eric Anholt
494ecef6b4 freedreno: Add support for drm-shim.
I'm using this for shader-db analysis on x86_64 systems.

Reviewed-by: Rob Clark <robdclark@gmail.com>
2019-07-25 08:56:19 -07:00
Eric Anholt
82bf1979d7 v3d: Introduce a DRM shim for calling out to the simulator.
The goal is to enable testing of parts of drivers without depending on any
particular kernel version or hardware being present.

Simply set LD_PRELOAD=$PREFIX/lib/libv3d_drm_shim.so in your environment,
and we'll fake a /dev/dri/renderD128 (or whatever the next available node
is) using v3dv3.  That node can then be used with the surfaceless or gbm
EGL platforms.

Acked-by: Iago Toral Quiroga <itoral@igalia.com>
2019-07-25 08:56:19 -07:00
Erik Faye-Lund
c5f1432296 glsl: report no function instead of empty candidate list
When generating the error message for a missing function error where
all available overloads were missing due to a too low GLSL version, we
used to report something like this:

---8<---
0:224(14): error: no matching function for call to
           `textureCubeLod(samplerCube, vec3, float)'; candidates are:
0:224(14): error: type mismatch
---8<---

This is a pretty confusing error message, and can throw people off when
debugging. So let's instead check if any overload is available before we
decide what to print. This allow us to report something like this
instead:

---8<---
0:224(14): error: no function with name 'textureCubeLod'
0:224(14): error: type mismatch
---8<---

This is arguably easier to understand for programmers, and doesn't send
you on a wild goose chase to figure out what argument is wrong just
because you stopped reading the message prematurely. I'm of course
referring to a friend, not me. For sure. I would never do that.

Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2019-07-25 17:20:10 +02:00
Bas Nieuwenhuizen
7e1fe81f56 radv: Set correct metadata size for GFX9+.
Without correct size, radeonsi assumes the metadata is incorrect,
which can and will cause issues.

Since the metadata is really incorrect without the size, let us
fix that.

Fixes: e43cc3e3af "radv/gfx9: handle GFX9 opaque metadata"
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-07-25 17:07:53 +02:00
Arcady Goldmints-Orlov
832cedfdee anv: report HOST_ALLOCATION as supported for images
Report VK_EXTERNAL_MEMORY_HANDLE_TYPE_HOST_ALLOCATION_BIT_EXT as
supported for images. It was being shown supported for buffers, but not
images.

Fixes: 69cc6272fb ("anv: Implement VK_EXT_external_memory_host")

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-07-25 09:01:26 -05:00
Samuel Pitoiset
7d11bf2155 radv/gfx10: fix intensity formats by setting ALPHA_IS_ON_MSB
This fixes
dEQP-VK.rasterization.primitive_size.points.point_size_*

This also fixes some black squares with the Sascha SSAO demo.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-07-25 15:48:24 +02:00