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Author SHA1 Message Date
Samuel Pitoiset
8a6442075f ac/nir: remove useless integer cast in visit_image_load() 
ac_build_image_opcode() casts if necessary and buffer images
are casted too.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
 2019-04-12 17:30:55 +02:00
Samuel Pitoiset
ffbb62f808 ac/nir: remove useless integer cast in adjust_sample_index_using_fmask() 
It's already casted if necessary in ac_build_image_opcode().

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
 2019-04-12 17:30:55 +02:00
Samuel Pitoiset
7b5b27a685 ac/nir: remove useles LLVMGetUndef for nir_op_pack_64_2x32_split 
Trivial.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
 2019-04-12 17:30:55 +02:00
Samuel Pitoiset
fd4041987b ac: add ac_build_load_helper_invocation() helper 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
 2019-04-12 17:30:55 +02:00
Samuel Pitoiset
590a4c8981 ac: add ac_build_ddxy_interp() helper 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
 2019-04-12 17:30:55 +02:00
Samuel Pitoiset
4cb13e9462 ac: add ac_build_umax() and use it where possible 
This changes the predicate from LessThan to Equal.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
 2019-04-12 17:30:55 +02:00
Samuel Pitoiset
cf88bfa75a ac/nir: make use of ac_build_umin() where possible 
This changes the predicate from LessThan to Equal.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
 2019-04-12 17:30:54 +02:00
Samuel Pitoiset
15dd81913f ac/nir: make use of ac_build_imin() where possible 
This changes the predicate from LessThan to Equal.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
 2019-04-12 17:30:54 +02:00
Samuel Pitoiset
d7a0c0d53b ac/nir: make use of ac_build_imax() where possible 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
 2019-04-12 17:30:54 +02:00
Timothy Arceri
d62d434fe9 ac/nir_to_llvm: add image bindless support 
With this all piglit bindless image tests pass on radeonsi.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
 2019-04-12 09:02:59 +02:00
Timothy Arceri
55fb93b586 ac/nir_to_llvm: make get_sampler_desc() more generic and pass it the image intrinsic 
This will be required by the bindless support in the following patches.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
 2019-04-12 09:02:59 +02:00
Karol Herbst
d7bbb3caf1 glsl_to_nir: handle bindless textures 
v2: add support for AMD

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> (v1)
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
 2019-04-12 09:02:59 +02:00
Rhys Perry
fd1fc255d9 ac: add 16-bit support to ac_build_ddxy() 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2019-04-10 09:05:58 +02:00
Samuel Pitoiset
bc6d486c78 ac/nir: fix nir_op_b2f16 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2019-04-10 09:05:55 +02:00
Samuel Pitoiset
27b8f3ecc3 ac/nir: fix intrinsic names for atomic operations with LLVM 9+ 
This fixes the following LLVM error when using RADV_DEBUG=checkir:
Intrinsic name not mangled correctly for type arguments! Should be: llvm.amdgcn.buffer.atomic.add.i32
i32 (i32, <4 x i32>, i32, i32, i1)* @llvm.amdgcn.buffer.atomic.add

The cmpswap operation still uses the old intrinsic.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2019-04-08 13:16:50 +02:00
Marek Olšák
b563460b49 radeonsi: enable displayable DCC on Ravens 2019-04-04 09:53:24 -04:00
Marek Olšák
1f21396431 radeonsi: add support for displayable DCC for multi-RB chips 
A compute shader is used to reorder DCC data from aligned to unaligned.
 2019-04-04 09:53:24 -04:00
Marek Olšák
2c09eb4122 radeonsi: add support for displayable DCC for 1 RB chips 
This is the simpler codepath - just disable RB and pipe alignment for DCC.
 2019-04-04 09:53:24 -04:00
Samuel Pitoiset
d099bc5829 ac: add 8-bit and 64-bit support to ac_build_bitfield_reverse() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2019-04-01 18:53:57 +02:00
Samuel Pitoiset
2cecf6c5cc ac: add 8-bit support to ac_build_umsb() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2019-04-01 18:53:55 +02:00
Samuel Pitoiset
a45d9e3e8d ac: add 8-bit support to ac_find_lsb() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2019-04-01 18:53:53 +02:00
Samuel Pitoiset
89cf8ca0ae ac: add 8-bit support to ac_build_bit_count() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2019-04-01 18:53:52 +02:00
Samuel Pitoiset
869af0464a ac/nir: add support for nir_op_b2i8 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2019-04-01 18:53:49 +02:00
Samuel Pitoiset
4d5fce29c3 ac: fix ac_build_umsb() for 16-bit integer type 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2019-04-01 09:51:56 +02:00
Samuel Pitoiset
7a088d1ac8 ac: fix ac_find_lsb() for 16-bit integer type 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2019-04-01 09:51:54 +02:00
Samuel Pitoiset
b16dffff23 ac: fix ac_build_bitfield_reverse() for 16-bit integer type 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2019-04-01 09:51:52 +02:00
Samuel Pitoiset
9d13b9e53e ac: fix ac_build_bit_count() for 16-bit integer type 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2019-04-01 09:51:49 +02:00
Samuel Pitoiset
e39a6b940f ac/nir: fix nir_op_b2i16 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2019-04-01 09:51:47 +02:00
Timothy Arceri
4478c5374b Revert "ac/nir: use new LLVM 8 intrinsics for SSBO atomic operations" 
This reverts commit 29132af234.

It seems the new intrinsic causes a hang on radeonsi (VEGA) when running the
piglit test:

tests/spec/arb_shader_storage_buffer_object/execution/ssbo-atomicCompSwap-int.shader_test
 2019-03-29 21:04:01 +11:00
Samuel Pitoiset
cc752dea61 ac: fix return type for llvm.amdgcn.frexp.exp.i32.64 
This fixes the following piglit with RadeonSI
tests/spec/arb_gpu_shader_fp64/execution/built-in-functions/fs-frexp-dvec4.shader_test

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
 2019-03-29 09:18:24 +01:00
Samuel Pitoiset
52c02d921f ac: add ac_build_frex_exp() helper ans 16-bit/32-bit support 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2019-03-28 13:02:48 +01:00
Samuel Pitoiset
1bf9311c59 ac: add ac_build_frexp_mant() helper and 16-bit/32-bit support 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2019-03-28 13:02:46 +01:00
Samuel Pitoiset
d6a07732c9 ac: use llvm.amdgcn.fmed3 intrinsic for nir_op_fmed3 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2019-03-27 14:45:52 +01:00
Nicolai Hähnle
e16ac33f37 amd/surface: provide firstMipIdInTail for metadata surface calculations 
This field was added in a recent addrlib update, and while there
currently seems to be no issue with skipping it, we will have to
set it correctly in the future.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
 2019-03-26 10:00:55 +01:00
Bas Nieuwenhuizen
82075e3c42 ac/nir: Return frag_coord as integer. 
To preserve the invariant that nir ssa defs are integers or pointers
in LLVM.

CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
 2019-03-26 09:41:15 +01:00
Rhys Perry
f736250ab4 ac/nir: implement 16-bit pack/unpack opcodes 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2019-03-22 12:50:16 +01:00
Samuel Pitoiset
00327f827f ac: fix incorrect argument type for tbuffer.{load,store} with LLVM 7 
GLC/SLC are boolean.

This fixes the following LLVM error when checkir is set:
Intrinsic has incorrect argument type!
void (i32, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32)* @llvm.amdgcn.tbuffer.store.i32

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl
 2019-03-21 14:02:00 +01:00
Samuel Pitoiset
20cac1f498 ac: fix 16-bit shifts 
This fixes the following LLVM error when ckeckir is set:
Type too small for ZExt

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl
 2019-03-21 14:01:58 +01:00
Samuel Pitoiset
2ac5c5c1b5 ac: add 16-bit support to fract 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2019-03-21 12:13:09 +01:00
Samuel Pitoiset
0eb1478ac2 ac: add 16-bit support fo fsign 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2019-03-21 12:13:07 +01:00
Samuel Pitoiset
ff11c9dcc7 ac: add f16_0 and f16_1 constants 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2019-03-21 12:13:05 +01:00
Rhys Perry
3cc72a88d8 ac/nir: implement 8-bit conversions 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2019-03-21 09:02:25 +01:00
Rhys Perry
c73f8b6576 ac/nir: add 8-bit types to glsl_base_to_llvm_type 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2019-03-21 09:02:22 +01:00
Rhys Perry
9c5067acf1 ac/nir: implement 8-bit ssbo stores 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2019-03-21 09:02:20 +01:00
Samuel Pitoiset
b235d77e18 ac: add ac_build_tbuffer_store_byte() helper 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2019-03-21 09:02:18 +01:00
Rhys Perry
b12e074b89 ac/nir: implement 8-bit push constant, ssbo and ubo loads 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2019-03-21 09:02:16 +01:00
Samuel Pitoiset
104dbc64a5 ac: add ac_build_tbuffer_load_byte() helper 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2019-03-21 09:02:14 +01:00
Samuel Pitoiset
6e632eb24b ac: add various int8 definitions 
Original patch by Rhys Perry.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2019-03-21 09:02:10 +01:00
Samuel Pitoiset
72e366b4c2 ac: use new LLVM 8 intrinsics in ac_build_buffer_store_dword() 
New buffer intrinsics have a separate soffset parameter.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2019-03-20 22:19:19 +01:00
Samuel Pitoiset
9d960c17a8 ac: use new LLVM 8 intrinsic when storing 16-bit values 
vindex is always 0.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2019-03-20 22:19:14 +01:00