Commit graph

16765 commits

Author SHA1 Message Date
Christian König
fb541662eb radeon/llvm: Support frint on SI
Gets VDPAUs shaders working again.

Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2012-09-14 17:03:24 +02:00
Marek Olšák
fac7031a04 r600g: consolidate decompression code for the blitter 2012-09-14 05:55:00 +02:00
Marek Olšák
df5e2c058f r600g: do not require MSAA renderbuffer support if not asked for
to allow stencil-only sampler-only formats (like X24S8)

NOTE: This is a candidate for the stable branches.
2012-09-14 05:55:00 +02:00
Marek Olšák
61706915a3 gallium/u_blitter: fix stencil-only blits
NOTE: This is a candidate for the stable branches.
2012-09-14 05:55:00 +02:00
Marek Olšák
1e51d368eb r300g: fix colormask with non-BGRA formats
NOTE: This is a candidate for the stable branches.
2012-09-14 05:55:00 +02:00
Alex Deucher
b33d7eaa5e r600g: reduce quant mode on evergreen+
Seems to have an affect on the allowable range of
values.  Set evergreen+ to 1/256 to match 6xx/7xx.

fixes:
https://bugs.freedesktop.org/show_bug.cgi?id=54877

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-09-13 17:33:35 -04:00
Marek Olšák
ee50d365ea radeonsi: don't use a staging resource for large transfers
It kills performance if the resource is linear.
2012-09-13 20:26:21 +02:00
Marek Olšák
e386972f5b r600g: don't use a staging resource for large transfers
It kills performance if the resource is linear.
2012-09-13 20:25:47 +02:00
Marek Olšák
1f5a7567e8 r600g: convert the remnants of VGT state into immediate register writes/atoms v4
v2: Group vgt register together to avoid lockup
v3: Split multi primitive register and index bias register
v4: Bump R600_NUM_ATOMS

Signed-off-by: Marek Olšák <maraeo@gmail.com>
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
2012-09-13 20:18:45 +02:00
Marek Olšák
150decffb4 r600g: emit the primitive type and associated regs only if the type is changed
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
2012-09-13 20:18:45 +02:00
Marek Olšák
c56dca909a r600g: add clip_misc_state for clip registers emitted in draw_vbo
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
2012-09-13 20:18:45 +02:00
Marek Olšák
51d839edc8 r600g: fix computing how much space is needed for a draw command
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
2012-09-13 20:18:45 +02:00
Marek Olšák
8faf3bcf07 r600g: fix the number of CS dwords of cb_misc_state
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
2012-09-13 20:18:45 +02:00
Marek Olšák
2b8d39bbfc r600g: atomize clip state
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
2012-09-13 20:18:44 +02:00
Marek Olšák
de89fe1e5d r600g: atomize blend color
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
2012-09-13 20:18:44 +02:00
Marek Olšák
605fd0c14a r600g: atomize viewport state
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
2012-09-13 20:18:44 +02:00
Marek Olšák
63bf0f905a r600g: atomize stencil ref state
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
2012-09-13 20:18:44 +02:00
Marek Olšák
fd19aa4e12 r600g: remove unused state ID definitions
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
2012-09-13 20:18:44 +02:00
Marek Olšák
c383a3cfb2 r600g: initialize the first CS just like any other CS
by reusing the CS initialization in r600_context_flush.

Reviewed-by: Jerome Glisse <jglisse@redhat.com>
2012-09-13 20:18:44 +02:00
Marek Olšák
263045afbc r600g: add support for geometry shader samplers and constant buffers
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
2012-09-13 20:18:44 +02:00
Marek Olšák
f2eac1423a r600g: put sampler states and views into an array indexed by shader type
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
2012-09-13 20:18:44 +02:00
Marek Olšák
3fe78594b1 r600g: do fine-grained sampler state updates
Update only those sampler states which are changed in a shader stage,
instead of always updating all sampler states in the shader stage.
That requires keeping a bitmask of those states which are enabled, and those
states which are dirty at a given point (subset of enabled states).

This is similar to how sampler views, constant buffers, and vertex buffers
are handled.

Reviewed-by: Jerome Glisse <jglisse@redhat.com>
2012-09-13 20:18:44 +02:00
Marek Olšák
6c86124157 r600g: consolidate set_viewport_state functions
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
2012-09-13 20:18:44 +02:00
Marek Olšák
48de30e760 r600g: consolidate set_sampler_views functions
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
2012-09-13 20:18:44 +02:00
Marek Olšák
1bce17ee01 r600g: put constant buffer state into an array indexed by shader type
to easily and robustly handle multiple shader stages

Reviewed-by: Jerome Glisse <jglisse@redhat.com>
2012-09-13 20:18:44 +02:00
Marek Olšák
3bffd8a5eb r600g: cleanup state function names
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
2012-09-13 20:18:44 +02:00
Marek Olšák
f96df32d62 r600g: consolidate initialization of common state functions
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
2012-09-13 20:18:44 +02:00
Marek Olšák
fd2e34d557 r600g: simplify flushing
Based on the patch called "simplify and fix flushing and synchronization"
by Jerome Glisse.

Rebased, removed unneded code, simplified more and cleaned up.

Also, SH_ACTION_ENA is not set when changing shaders (hw doesn't seem
to need it). It's only used to flush constant buffers.

Reviewed-by: Jerome Glisse <jglisse@redhat.com>
2012-09-13 20:18:44 +02:00
Tom Stellard
6a5a4d59ce radeon/llvm: Fix lowering of vbuild
Some of the old AMDIL code was hard-coding subreg indices when creating
the VBUILD node, which was making it difficult to match the
vector_insert patterns.
2012-09-13 10:38:02 -04:00
Tom Stellard
70a50685a8 radeon/llvm: Support fmul on SI 2012-09-13 10:38:02 -04:00
Michel Dänzer
7443e4e697 radeonsi: Properly handle NULL sampler views.
Fixes piglit shaders/glsl-fs-uniform-sampler-array and many other similar
tests.

In fact, I just completed a piglit quick-driver.tests run without any GPU
lockups or even VM protection faults. Yay!

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
2012-09-12 15:53:51 +02:00
Michel Dänzer
d67d8e2471 radeonsi: Fix calculation of number of records in buffer resource.
The value was too small by 1 in some cases (non-first of several vertex
elements interleaved in a single buffer).

Fixes intermittent incorrect geometry in many apps, e.g. piglit
spec/EXT_texture_snorm/fbo-generatemipmap-formats.

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2012-09-12 13:23:09 +02:00
Tom Stellard
843ac06ad2 radeon/llvm: Fix operand order of V_CNDMASK in custom inserter
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2012-09-11 14:53:48 -04:00
Tom Stellard
d399ce7615 radeon/llvm: Assert if we try to encode an unknown register
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2012-09-11 14:53:48 -04:00
Tom Stellard
0df2753ad2 radeon/llvm: Add register encoding for VCC
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2012-09-11 14:53:47 -04:00
Tom Stellard
056d9c6ef1 radeon/llvm: Ignore special registers when calculating reg count
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2012-09-11 14:53:47 -04:00
Tom Stellard
0fb1e68a0b radeonsi: Handle position input parameter for pixel shaders v2
v2:
  - Don't increment ninterp or set any of the have_* flags for
    TGSI_SEMANTIC_POSITION

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2012-09-11 14:53:47 -04:00
Tom Stellard
0410e9e8c7 radeon/llvm: Coding style fixes
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2012-09-11 14:53:47 -04:00
Tom Stellard
d3e58f75d2 radeonsi: Move interpolation mode check into the compiler
The compiler needs to know which interpolation modes are enabled, so
it knows which values will be preloaded into the VGPRs.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2012-09-11 14:53:47 -04:00
Tom Stellard
5fff032dd5 radeonsi: Add missing interpolation mode to check for enabled modes
At least one interpolation mode must be enable, but the code that checks
this was not checking for perspective center.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2012-09-11 14:53:47 -04:00
Tom Stellard
cc571a367e radeonsi: Pass shader type to the compiler
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2012-09-11 14:53:47 -04:00
Tom Stellard
dfd3d61abf radeon/llvm: Add SHADER_TYPE instruction
This allows the program to specify the type of shader being compiled
(e.g. PXEL, VERTEX, etc.)

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2012-09-11 14:53:47 -04:00
Jerome Glisse
841c1b5f54 r600g: avoid GPU doing constant preload from random address
Previous command stream might have set any of the constant buffer
and the previous address might no longer be valid thus GPU might
preload constant from random invalid address and possibly triggering
lockup.

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
2012-09-11 12:57:54 -04:00
Michel Dänzer
9ccaa24f84 radeonsi: Texture border colour fixes.
* Handle arbitrary border colours.
* Use correct packing format for detecting special border colours.

Fixes piglit tex-border-1 and probably many other tests using border colours.

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2012-09-11 11:06:56 +02:00
Michel Dänzer
03dfa30596 radeonsi: Handle NULL sampler states.
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2012-09-11 11:06:16 +02:00
Marek Olšák
87389d4e5c r600g: remove unused function 2012-09-11 00:02:58 +02:00
Marek Olšák
830b6f3273 r600g: fix printf warning 2012-09-11 00:02:58 +02:00
Christoph Bumiller
3433471e8b nvc0/ir: add initial code to support GK110 ISA encoding 2012-09-07 19:03:40 +02:00
Michel Dänzer
8a497e5955 radeonsi: Float format fixups.
Fixes piglit spec/ARB_texture_float/fbo-generatemipmap-formats.

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
2012-09-07 18:23:08 +02:00
Michel Dänzer
15c009af28 radeonsi: Handle more SNORM formats.
Fixes piglit spec/EXT_texture_snorm/fbo-generatemipmap-formats (except for
what seems like a random fluke).

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
2012-09-07 18:23:08 +02:00