Commit graph

3695 commits

Author SHA1 Message Date
Kenneth Graunke
e3a0e97300 intel: Limit Wa_1607854226 to Gfx12.0 only
This workaround is needed on all Gfx12.0 parts, but doesn't appear to be
necessary on XeHP.  The other drivers do not appear to be applying this
workaround on those parts.  As further evidence, we accidentally added
the 3DSTATE_BINDING_TABLE_POOL_ALLOC commands after switching back to
GPGPU mode, which would be an incorrect way to implement the workaround,
and things seem to be working.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14507>
2022-03-09 09:18:59 +00:00
Jason Ekstrand
a83c91a261 blorp: Add a binding_table_offset_to_pointer helper
On Gen11+, we have a feature that requires us to shift binding table
offsets by 3.  This adds a helper which gives the driver a hook to do
this if it so chooses.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14507>
2022-03-09 09:18:59 +00:00
Nanley Chery
c1a7d520f3 anv: Disable aux if the explicit modifier lacks it
For dmabuf imports, configure the primary surface without support for
compression if the modifier doesn't specify it. This helps to create VkImages
with memory requirements that are compatible with the buffers apps provide.

Suggested-by: Philip Langdale <philipl@overt.org>
Cc: 22.0 <mesa-stable>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5940
Tested-by: Philip Langdale <philipl@overt.org>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15181>
2022-03-01 20:05:50 +00:00
Nanley Chery
cada519482 anv: Refactor anv_image_init_from_create_info
Use a variable to store the anv_image_create_info struct. We'll modify it for a
bug fix in the next patch.

Cc: 22.0 <mesa-stable>
Tested-by: Philip Langdale <philipl@overt.org>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15181>
2022-03-01 20:05:50 +00:00
Nanley Chery
8d2b7e558b anv: Change a parameter of the implicit layout fn
Replace the create_info parameter with isl_extra_usage_flags to more closely
match the parameters of explicit layout function.

Tested-by: Philip Langdale <philipl@overt.org>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15181>
2022-03-01 20:05:50 +00:00
Lionel Landwerlin
214092da87 anv: fix fast clear type value with external images
Disable fast clear if not supported by the external modifier.

v2: Set fast_clear value to NONE in case of import/export from/to external

v3: Move logic next to existing acquire/release checks (Nanley)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6056
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15096>
2022-03-01 17:37:13 +00:00
Nanley Chery
dc05615ec1 Revert "anv: Require the local heap for CCS on XeHP"
This reverts commit 382f6ccda8.

The spec requires that all color images created with the same tiling
(and a few other properties) support the same memoryTypeBits. So this
wasn't a valid change. It also wasn't necessary - we already have a
mechanism in anv_BindImageMemory2 for disabling compression if the BO
doesn't support it.

With this, XeHP passes the tests in
dEQP-VK.memory.requirements.*tiling_optimal

Fixes: 382f6ccd ("anv: Require the local heap for CCS on XeHP")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15068>
2022-03-01 00:02:51 +00:00
Nanley Chery
203c8be09f anv: Add a perf warning in anv_BindImageMemory2
It reports: "BO lacks implicit CCS. Disabling the CCS aux usage."

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15068>
2022-03-01 00:02:51 +00:00
Nanley Chery
74e446b45b anv: Fall back to HiZ when disabling CCS on HiZ+CCS
When an image configured for HIZ_CCS/HIZ_CCS_WT is bound to a BO lacking
implicit CCS, we disable any compression it may have had. Such images
are still compatible with ISL_AUX_USAGE_HIZ however. Fall back to that
aux usage to retain the performance benefit.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15068>
2022-03-01 00:02:51 +00:00
Nanley Chery
ffbde42b93 anv: Don't disable HiZ/MCS in anv_BindImageMemory2
When an image is bound to a BO lacking implicit CCS, we disable any
compression it may have had. This is unnecessary in the cases where the
compression type doesn't depend on the BO having implicit CCS support.
Avoid this disabling for ISL_AUX_USAGE_MCS and ISL_AUX_USAGE_HIZ.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15068>
2022-03-01 00:02:51 +00:00
Jordan Justen
0fffaa9fca anv: Align state pools to 2MiB on XeHP
Suggested-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Fixes: c17e2216dd ("anv: Align buffer VMA to 2MiB for XeHP")
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15054>
2022-02-23 20:15:24 +00:00
Jordan Justen
5a28d2482f anv: Align GENERAL_STATE_POOL_MIN_ADDRESS to 2MiB
Fixes: c17e2216dd ("anv: Align buffer VMA to 2MiB for XeHP")
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15054>
2022-02-23 20:15:24 +00:00
Rhys Perry
ded9cb904f anv: Enable nir_opt_access
This commit will enable pass for searching readonly / writeonly
access when it's missing.

We don't support shaderStorageImageReadWithoutFormat
and the optimization pass causes those shaders to
take the write-only path which does support formatless.

Following games are affected with positive result:
 - Wolfenstein: Youngblood
 - Wolfenstein II: The New Colossus https://gitlab.freedesktop.org/mesa/mesa/-/issues/3138
 - Rage 2 https://gitlab.freedesktop.org/mesa/mesa/-/issues/5791
 - The Surge 2 https://gitlab.freedesktop.org/mesa/mesa/-/issues/5805
 - Metro Exodus https://gitlab.freedesktop.org/mesa/mesa/-/issues/4703
 - DOOM Eternal https://gitlab.freedesktop.org/mesa/mesa/-/issues/4273

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3138,https://gitlab.freedesktop.org/mesa/mesa/-/issues/5791,https://gitlab.freedesktop.org/mesa/mesa/-/issues/4273
Signed-off-by: Mykhailo Skorokhodov <mykhailo.skorokhodov@globallogic.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15082>
2022-02-23 13:11:12 +00:00
Kenneth Graunke
c46d3acf0e anv: Raise vertex input bindings and attributes limits slightly
This raises our vertex input bindings limit from 28 to 31, and our
vertex input attribute limit from 28 to 29.  We could theoretically
go higher, but it will take additional work.

The 3DSTATE_VERTEX_BUFFERS and 3DSTATE_VERTEX_ELEMENTS limits are 33
vertex buffers, and 34 vertex elements.  But we need up to two vertex
elements for system values (FirstVertex, BaseVertex, BaseInstance,
DrawID), and we currently use two vertex bindings for those.

There is another hidden limit: our compiler backend only supports the
push model for VS inputs currently.  3DSTATE_VS only allows URB Read
Lengths between [0, 15], which is measured in pairs of inputs, which
means we can theoretically push no more than 32 vertex elements.  This
is no artifical limit either, as a vec4 element takes up 4 registers
in the payload, and 32 * 4 = 128, the entire size of our register file.
Plus, the VS Thread payload needs at least g0 and g1 for other things,
so we can really only push 31.

We can theoretically support one additional binding, by combining our
two SGV bindings into a single upload.  In order to support additional
vertex elements, we would need to add support to the backend compiler
for the pull model for VS inputs.

References: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5917
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14991>
2022-02-22 21:31:06 +00:00
Marcin Ślusarz
fddab17e54 anv: cleanup begin_subpass & end_subpass
Share values of some expressions instead of duplicating the same logic.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15079>
2022-02-22 09:09:05 +00:00
Marcin Ślusarz
037e98a10c anv: don't set color state when input state was requested
Fixes: 814dc66935 ("anv: Allocate surface states per-subpass")

Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15081>
2022-02-21 08:45:05 +00:00
Lionel Landwerlin
2763a8af5a anv/genxml/intel/fs: fix binding shader record entry
Bit is flipped compared to all the other packets.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 705395344d ("intel/fs: Add support for compiling bindless shaders with resume shaders")
Fixes: c3ac9afca3 ("anv: Create and return ray-tracing pipeline SBT handles")
Acked-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15078>
2022-02-19 13:50:56 +00:00
Kenneth Graunke
4ed9fd62c9 anv: Lower bufferImageGranularity to 1 from 64
The Vulkan 1.3 spec says:

   "The implementation-dependent limit bufferImageGranularity specifies
    a page-like granularity at which linear and non-linear resources
    must be placed in adjacent memory locations to avoid aliasing.  Two
    resources which do not satisfy this granularity requirement are said
    to alias. bufferImageGranularity is specified in bytes, and must be
    a power of two.  Implementations which do not impose a granularity
    restriction may report a bufferImageGranularity value of one.

    Note: Despite its name, bufferImageGranularity is really a
    granularity between "linear" and "non-linear" resources."

We set this limit to 64 bytes (a cacheline) at the dawn of time, without
any real rationale attached.  There shouldn't be any restrictions here.
Our tile sizes are typically 4K, and tiled resource addresses are
aligned to the tile size, and the extent is also a multiple of the tile
sized.  So if a linear resource occurs before a tiled one, there will
naturally be some space due to the alignment of the tiled resource's
starting address.  If a linear resource occurs after a tiled one, the
tiled resource's ending address is already 4K aligned, which is already
guaranteeing that they won't share a cacheline.

So I think it should be fine to reduce this to 1.  The other Vulkan
driver for our hardware seems to advertise 1 here as well.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15066>
2022-02-18 09:52:00 +00:00
Lionel Landwerlin
7a52286215 anv: add a custom AcquireNextImage2KHR func
So that we can plug our intel_measure framework.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Felix DeGrood <felix.j.degrood@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14998>
2022-02-17 22:15:23 +00:00
Felix DeGrood
6e939ca865 anv/measure: Fix INTEL_MEASURE for ANV
INTEL_MEASURE broke while implementing the common sync and submit
framework. Re-adding missing INTEL_MEASURE entry point for
command buffer submit.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14998>
2022-02-17 22:15:23 +00:00
Jason Ekstrand
df0e2a1565 anv: Don't assume depth/stencil attachments have depth
If a secondary command buffer is used and the client provides a
framebuffer and that framebuffer has a stencil-only attchment, we would
try to get the aux usage for the depth component of that attachment and
crash.  Check the aspects of the image before looking at aux usage.
This fixes at least the following SkQP tests on my Tigerlake:

 - vk_circular-clips
 - vk_filterfastbounds
 - vk_innershapes_bw
 - vk_lineclosepath
 - vk_multipicturedraw_rrectclip_simple
 - vk_pathinvfill
 - vk_quadclosepath
 - vk_rrect_clip_bw
 - vk_windowrectangles

Fixes: 0d8b9c529c ("anv: Allow PMA optimization to be enabled in secondary command buffers")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15048>
2022-02-16 23:02:09 +00:00
Iván Briano
11544435ad anv: only advertise 64b atomic floats if 64b floats are supported
Cc: 22.0 <mesa-stable>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15039>
2022-02-16 21:36:42 +00:00
Jason Ekstrand
9cbcdfb514 anv: use vk_image_view::format for creating dynamic renderpasses
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15007>
2022-02-16 00:14:50 +00:00
Jason Ekstrand
05e9e7767d vulkan: Rename vk_image_view::format to view_format
When I originally added vk_image_view, I was overly clever when it came
to the format field.  I decided to make it only contain the bits of the
format contained in the selected aspects.  However, this is confusing
(not generally a good thing) and it's also not always what you want.
The Vulkan 1.3.204 spec says:

    "When using an image view of a depth/stencil image to populate a
    descriptor set (e.g. for sampling in the shader, or for use as an
    input attachment), the aspectMask must only include one bit, which
    selects whether the image view is used for depth reads (i.e. using a
    floating-point sampler or input attachment in the shader) or stencil
    reads (i.e. using an unsigned integer sampler or input attachment in
    the shader). When an image view of a depth/stencil image is used as
    a depth/stencil framebuffer attachment, the aspectMask is ignored
    and both depth and stencil image subresources are used."

So, while the restricted format makes sense for texturing, it doesn't
for when the image is being used as an attachment.  What we probably
actually want is both versions of the format.  We'll call the one given
by the VkImageViewCreateInfo vk_image_view::format and the restricted
one vk_image_view::view_format.

This is just the first commit which switches format to view_format so
the compiler will make sure we get them all.  The next commit will
re-add vk_image_view::format but this time unmodified.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15007>
2022-02-16 00:14:50 +00:00
Rohan Garg
4001d9ce1a anv: Handle VK_DESCRIPTOR_POOL_CREATE_HOST_ONLY_BIT_VALVE for descriptor sets
Ensure that surface state does not get created for
VK_DESCRIPTOR_POOL_CREATE_HOST_ONLY_BIT_VALVE and we don't bind to the
binding table for descriptor sets created with this pool.

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14683>
2022-02-11 12:03:42 +00:00
Jason Ekstrand
09b5f0f3ac anv: Use the common vk_command_pool
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14917>
2022-02-11 08:06:25 +00:00
Jason Ekstrand
3007f8e95f anv: Don't call DestroyCommandBuffers in AllocateCommandBuffers
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14917>
2022-02-11 08:06:25 +00:00
Jason Ekstrand
5a15c3eff7 anv: Drop anv_cmd_buffer::pool
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14917>
2022-02-11 08:06:25 +00:00
Jason Ekstrand
2170ec2845 anv: Don't use vk_alloc/free2 for command buffers
The pool will always have a valid allocator.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14917>
2022-02-11 08:06:25 +00:00
Jason Ekstrand
bda4c4f6b6 vulkan: Take a vk_command_pool in vk_command_buffer_init()
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14917>
2022-02-11 08:06:25 +00:00
Jason Ekstrand
c5b8ee8810 anv: Use vk_command_pool
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14917>
2022-02-11 08:06:24 +00:00
Louis-Francis Ratté-Boulianne
5e263cc324 vulkan/runtime: Add a level field to vk_command_buffer
Looks like 3 implementations already have that field in their private
command_buffer struct, and having it at the vk_command_buffer opens the
door for generic (but suboptimal) secondary command buffer support.

Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14917>
2022-02-11 08:06:24 +00:00
Jason Ekstrand
7b0e306854 anv: Call vk_command_buffer_finish if create fails
This wasn't much of a problem before because vk_command_buffer_finish()
doesn't do much on an empty command buffer.  However, it's about to be
responsible for managing the pool's list of command buffers so it will
be critical to get this right.

Fixes: c9189f4813 ("anv: Use a common vk_command_buffer structure")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14917>
2022-02-11 08:06:24 +00:00
Iván Briano
e2a5e2d5a0 anv: make the pointer valid before we assign stuff into it
Fixes: 665ffd4bf9 ("anv: Update VK_KHR_fragment_shading_rate for newer HW")

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14982>
2022-02-10 23:06:13 +00:00
Caio Oliveira
12b4aad803 anv: Enable requiredSubgroupSize for Task/Mesh
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14979>
2022-02-10 22:37:03 +00:00
Kenneth Graunke
577d131bcf anv: Increase maxBoundDescriptorSets to 32
We recently had a request to support a larger maxBoundDescriptorSets,
specifically 32, and there doesn't appear to be a reason we need to
restrict this to 8.  According to vulkan.gpuinfo.org reports, most
Vulkan drivers appear to support 32.

Acked-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14952>
2022-02-10 13:56:46 -08:00
Lionel Landwerlin
137e170bcb anv: update limit for maxVertexInputBindingStride
Before:
	maxVertexInputBindingStride                     = 2048 (gen7+)

After:
	maxVertexInputBindingStride                     = 2048 (gen7/gen8)
	maxVertexInputBindingStride                     = 4095 (gen9+)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14958>
2022-02-10 10:06:22 +00:00
Tapani Pälli
7a6ea04795 anv: invalidate L3 read only cache when VF cache is invalidated
When enabling the caching of index,vertex data in the L3 RO Cache
(L3BypassDisable), we need to use L3ReadOnlyCacheInvalidationEnable
to invalidate cache when buffer is modified by CPU/GPU.

Ref: bspec 46314
Fixes: 6c345ddbe4 ("anv: Cache VB/IB in L3$ for Gfx12")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5941
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14815>
2022-02-09 10:05:10 +00:00
Rohan Garg
03e1e19246 anv: Refactor descriptor copy
Refactor descriptor copies to use the existing helper functions instead
of rolling our own. In order to facilitate this, we need to store the
appropriate buffer views for the relevant descriptors internally and
reuse them in the helpers.

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14909>
2022-02-09 09:24:37 +00:00
Lionel Landwerlin
93a90fc85d anv: fix conditional render for vkCmdDrawIndirectByteCountEXT
We just forgot about conditional render for this entry point.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 2be89cbd82 ("anv: Implement vkCmdDrawIndirectByteCountEXT")
Tested-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14891>
2022-02-08 13:33:38 +00:00
Lionel Landwerlin
5d3e419378 anv: enable ray queries
Only on platforms that support it.

v3: Split out code setting up ray query shadow buffer (Caio)
    Don't forget to setup ray query globals even when no shadow buffer
    is used (Lionel)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
2022-02-08 12:55:25 +00:00
Kenneth Graunke
c7a357787f anv: Increase maxUniformBufferRange to 2^30 when not using the sampler
The limit here is from the RENDER_SURFACE_STATE height/width/depth
fields - it's 2^30 for ISL_FORMAT_RAW buffers, and 2^27 otherwise.

anv_isl_format_for_descriptor_type() uses ISL_FORMAT_R32G32B32A32_FLOAT
for uniform buffers when compiler->indirect_ubos_use_sampler is set
(Icelake and earlier), but ISL_FORMAT_RAW when it isn't (Tigerlake+).

So we can increase the limit on Tigerlake and later.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14892>
2022-02-05 11:23:16 -08:00
Lionel Landwerlin
9da3d714b8 anv: add dynamic rendering traces
v2: Get rid of subpass_count

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14798>
2022-02-04 23:43:48 +00:00
Lionel Landwerlin
d0811ca046 anv: flush utrace before at device destroy
Ensuring any remaining traces are displayed.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14798>
2022-02-04 23:43:48 +00:00
Dylan Baker
2f916f2be6 meson: add support for meson devenv with vulkan
Meson devenv is a feature added in meson 0.58 (thus the features is
version guarded) that allows creating a shell environment with
environment variables automatically setup for running the project inside
the build dir. Some variables (such as LD_LIBRARY_PATH and PATH) are set
automatically, others must be added by the project.

For vulkan is is relativley simple, we create a new, uninstalled, icd
file for each driver and set the VK_ICD_FILENAMES variable
appropriately. This can be used with:

```sh
meson devenv -C $builddir
```

then, vulkan applications will automatically use the uninstall vulkan
driver, no need to install.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14826>
2022-02-04 09:08:47 -08:00
Caio Oliveira
242c7a6513 anv: Add experimental support for VK_NV_mesh_shader
Enable setting ANV_EXPERIMENTAL_NV_MESH_SHADER=1 environment variable.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13662>
2022-02-02 18:17:57 +00:00
Marcin Ślusarz
da273b2b7b anv: Put first few push constants directly into Task/Mesh InlineData
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13662>
2022-02-02 18:17:57 +00:00
Marcin Ślusarz
27c32fd14b anv: include ClipDistance array in mesh shader per-vertex output
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13662>
2022-02-02 18:17:57 +00:00
Marcin Ślusarz
c95b4ac2eb anv: tell the hardware about gl_[Clip|Cull]Distance in mesh shaders
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13662>
2022-02-02 18:17:57 +00:00
Marcin Ślusarz
bbde9f2448 anv: Implement indirect dispatch for Mesh pipeline
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13662>
2022-02-02 18:17:57 +00:00