PKT3_SET_PREDICATION is GFX only, even on GFX6.
This fixes recent
dEQP-VK.conditional_rendering.dispatch.*_compute_queue.
Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27746>
To make sure the compute shader BO is always part of the DGC execute
submission. This is more like a workaround but this ext is currently
only exposed for vkd3d-proton and it doesn't use indirect compute
pipeline binds.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27495>
vkCmdUpdatePipelineIndirectBufferNV() can be called on any queue
supporting transfer operations and it's not required to call it on the
same queue as DGC execute. This is very annoying if the compute shader
has scratch because it needs to be configured per queue.
The solution is to gather the maximum possible scratch size used by
indirect compute pipelines and use that to configure scratch.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27495>
They must be compatible and this allows us to remove some pipeline
references (useful for experimenting pipeline binds).
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27495>
If monolithic shaders were inlined, there might not be a radv_shader
associated with some stages. Zero out the shader allocation info in that
case, the shader will get identified by hash instead.
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27890>
I think amdgpu always supports multi wait since syncobj is just a
container of dma-fences. Fixes
Assertion `!(req_features & ~ttype->point_sync_type->features)' failed.
in vk_sync_timeline_type_validate on older kernels.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27838>
On older kernels without timeline syncobjs, the timeline and the submit
modes are VK_DEVICE_TIMELINE_MODE_EMULATED and
VK_QUEUE_SUBMIT_MODE_DEFERRED respectively. They are incompatible with
the sparse queue which requires VK_QUEUE_SUBMIT_MODE_THREADED.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27838>
Here it borrowed the term "long term reference" to represent
the customized reference frame rather than the default ones used.
To enable that, it needs application to leverage VAAPI existing
interface to mark a frame as "long term reference", and then
it will be preserved in the DPB for later usage. This preserved
frame later could be refered to by having its signature used in
the ref_frame_idx[] list, and the index can be indicated by
RefFrameCtrl index2, which has not been used for other purpose.
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27771>
This doesn't seem supported and introduced regressions on
Pitcairn/Tahiti, but it seems fine on Bonaire (GFX7).
Fixes: 926d9f1cef ("radv: support minmax filter for more formats")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27760>
This adds support for AV1 decode to radv, there are likely some
cleanups necessary.
Co-author: Charlie Turner <cturner@igalia.com>
(I wrote the initial mesa extension, and Charlie ported it to
the KHR extension and kept it up to date and fixed CTS things)
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27424>
This parallels changes made to the radeonsi code, but since we have uvd
in here as well we still use family in some places.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27424>
Conditional rendering is annoying to implement on ACE because there is
no predication packet like on GFX. With DGC it's even worse because
ACE is missing the IB2 packet which means it's not possible to predicate
the DGC IB entirely.
The provided solution is to always run the DGC prepare shader if
conditional rendering is enabled in order to generate a cmdbuf which
only contains NOPs.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27673>
It's implemented and it's passing dEQP-VK.mesh_shader.ext.query.*.
Though, it's not enabled yet because task shader can still randomly
hang on RDNA3.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26304>
