Commit graph

303 commits

Author SHA1 Message Date
Lionel Landwerlin
76bf38eaf0 intel/tools/aub_dump: move aub file initialization to maybe_init()
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3705>
2020-02-25 20:56:40 +02:00
Rafael Antognolli
6baeca3689 intel/tools: Update aubinator_error_decode.
"ringbuffer" is now called only "ring" in the error state.

v2: Keep compatible with old error state (Lionel).
v3: Also update "gtt_offset" -> "batch".

Closes: https://gitlab.freedesktop.org/drm/intel/issues/1206
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2020-02-13 16:53:18 -08:00
Lionel Landwerlin
632995227c intel/dump_gpu: handle context create extended ioctl
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
2019-10-30 21:58:31 +02:00
Francisco Jerez
35bcd08d61 intel/eu: Split brw_inst ex_desc accessors for SEND(C) vs. SENDS(C).
The brw_inst opcode accessors are going away in one of the following
commits.  We could potentially replace them with the new helpers that
do opcode remapping, but that would lead to a circular dependency
between brw_inst.h and brw_eu.h.  This way we also avoid ordering
issues that can cause the semantics of the ex_desc accessors to change
depending on whether the ex_desc field is set after or before the
opcode instruction field.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2019-10-11 12:24:16 -07:00
Rafael Antognolli
01122a78b3 intel/tools: Support multiple contexts in intel_dump_gpu.
Create basic aub_context on GEM_CONTEXT_CREATE.

Set it up and submit a context + ring + pphwsp during execbuf
submission, if it has not been initialized yet.

v2: Write the HWSP only once per engine (Lionel).

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-10-10 14:08:50 +00:00
Rafael Antognolli
12feafc28e intel/tools: Add basic aub_context code and helpers.
v2:
 - Only dump context if there were no erros (Lionel).
 - Store counter for context handles in aub_file (Lionel).
v3:
 - Add a comment about aub_context -> GEM context (Lionel).

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-10-10 14:08:50 +00:00
Rafael Antognolli
472de61187 intel/tools: Use common code for GGTT address allocation.
We want to be able to create contexts on demand, and increase the GGTT
as needed for that. Use the aub_map_ggtt() function for that.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-10-10 14:08:50 +00:00
Rafael Antognolli
9968316ed0 intel/tools: Factor out GGTT allocation.
We want to reuse it in execlists_setup().

v2: Rename it to write_ggtt_ptes() (Lionel).
v3: Rename it to aub_map_ggtt() (Lionel).

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-10-10 14:08:50 +00:00
Lionel Landwerlin
907c2397f0 intel/error2aub: add support for platforms without PPGTT
Not much to do to enable this, just make sure to always write to the
GGTT :)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2019-10-04 22:31:15 +00:00
Rafael Antognolli
b9994cb8d5 intel/tools: Fix aubinator usage of rb_tree.
The order of comparison has changed, so we need to invert the logic of
"insert_left" when using rb_tree_insert_at().

Fixes: dae33052db (util/rb_tree: Reverse the order of comparison
                    functions).
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2019-09-30 13:43:23 -07:00
Jason Ekstrand
dae33052db util/rb_tree: Reverse the order of comparison functions
The new order matches that of the comparison functions accepted by the C
standard library qsort() functions.  Being consistent with qsort will
hopefully help avoid developer confusion.

The only current user of the red-black tree is aub_mem.c which is pretty
easy to fix up.

Reviewed-by: Lionel Landwerlin <lionel.g.lndwerlin@intel.com>
2019-09-20 17:37:25 +00:00
Caio Marcelo de Oliveira Filho
412ed1338f intel/decoders: Avoid uninitialized variable warnings
Initialize `next_batch_addr` and `second_level`.  If the batch is well
formed, those values will be overriden, if not, they are as good as
uninitialized garbage.

Acked-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2019-08-23 13:25:27 -07:00
Caio Marcelo de Oliveira Filho
1021abab07 intel/tools: Fix aub_file initialization in intel_dump_gpu
The `device` can be set earlier either by a command line or a by
intercepting an ioctl call to get the I915_PARAM_CHIPSET_ID done by
the application early.  In both cases `aub_file` and `devinfo` would
not be initialized.

Fix by splitting the conditions

- `device == 0`: use the FD to get both device and devinfo.
- Or `devinfo.gen == 0`: use `device` to initialize it.

And separatedly, initialize aub_file the first time it is needed.

Fixes: d594d2a052 ("intel/tools: use device info initializer")
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2019-08-12 19:18:26 -07:00
Greg V
c0376a1234 util: add anon_file.h for all memfd/temp file usage
Move the Weston os_create_anonymous_file code from egl/wayland into util,
add support for Linux memfd and FreeBSD SHM_ANON,
use that code in anv/aubinator instead of explicit memfd calls for portability.

Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
2019-08-07 22:57:55 +00:00
Danylo Piliaiev
430823c96b intel/tools: add binary output type to i965_asm
Add '-t,--type' command line option to specify the output type
which can be 'bin', 'c_literal' or 'hex'.

Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
2019-08-05 17:19:09 +00:00
Eric Engestrom
d2d85b950d meson: replace libmesa_util with idep_mesautil
This automates the include_directories and dependencies tracking so that
all users of libmesa_util don't need to add them manually.

Next commit will remove the ones that were only added for that reason.

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Acked-by: Eric Anholt <eric@anholt.net>
Tested-by: Vinson Lee <vlee@freedesktop.org>
2019-08-03 00:08:37 +00:00
Kenneth Graunke
adcc0a8fdc intel/tools: Fix aubinator_viewer build.
This functions was recently renamed and not all callers were updated.

Fixes: 086c486a75 ("intel/device: rename gen_get_device_info")
2019-08-01 23:36:41 -07:00
Mark Janes
086c486a75 intel/device: rename gen_get_device_info
Rename the original device info initialization routine so callers
don't mistakenly call the wrong one:

  gen_get_device_info_from_fd:

      Queries kernel for full device info, including topology
      details.

  gen_get_device_info_from_pci_id:

      Partially initializes device info based on PCI ID lookup, when
      the kernel is not available.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-08-01 16:39:56 -07:00
Mark Janes
d594d2a052 intel/tools: use device info initializer
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-08-01 16:39:54 -07:00
Eric Engestrom
abc226cf41 tree-wide: replace MAYBE_UNUSED with ASSERTED
Suggested-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2019-07-31 09:41:05 +01:00
Sagar Ghuge
d5f63990b4 intel/tools: Add assembler unit tests for ROL/ROR instructions
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2019-07-01 10:14:22 -07:00
Sagar Ghuge
e9c35dd7cc intel/tools: Add ROL/ROR support in assembler
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2019-07-01 10:14:22 -07:00
Lionel Landwerlin
f80679c8e8 intel/dump: fix segfault when the app hasn't accessed the device
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2019-06-12 09:49:55 +03:00
Lionel Landwerlin
17898a9b7e intel/gpu_dump: fix argument passing
We were dropping "/' around arguments grouped together.
This was triggering failures with :

   $ ./framemetrics -g "Memory Writes Distribution Gen9" -o /tmp/output.csv -f ./my.trace 10 11

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
2019-06-09 19:45:13 +00:00
Mark Janes
36d8a922de intel/tools: use C99 print conversion specifier for 32 bit builds
Fixes formatting errors for 32 bit compilations, eg:

  error: format ‘%lx’ expects argument of type ‘long unsigned int’,
  but argument 5 has type ‘uint64_t’ {aka ‘long long unsigned int’}
  [-Werror=format=]

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-06-05 19:25:15 +00:00
Vinson Lee
20b42fad9b intel/tools: Fix build with glibc < 2.27.
glibc < 2.27 defines OVERFLOW in /usr/include/math.h.

This patch fixes this build error.

In file included from ../include/c99_math.h:37:0,
                 from ../src/util/u_math.h:44,
                 from ../src/mesa/main/macros.h:35,
                 from ../src/intel/compiler/brw_reg.h:47,
                 from ../src/intel/tools/i965_asm.h:32,
                 from ../src/intel/tools/i965_gram.y:29:
src/intel/tools/i965_gram.tab.c:562:5: error: expected identifier before numeric constant
     OVERFLOW = 412,
     ^

Fixes: 70308a5a8a ("intel/tools: New i965 instruction assembler tool")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110656
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Acked-by: Eric Engestrom <eric@engestrom.ch>
2019-05-13 11:05:48 -07:00
Eric Engestrom
6c6af0c8b0 i965_asm: avoid free()ing uninitialized pointers
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-05-09 10:03:15 +00:00
Eric Engestrom
51597eca84 i965_asm: fix memleak
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-05-09 10:03:15 +00:00
Sagar Ghuge
4e828bb48a
intel/tools: Add unit tests for assembler
v1: Pass executable object from meson to test(Dylan Baker)
v2: Ignore generated output files from git status(Matt Turner)

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
2019-05-07 14:33:48 -07:00
Mika Kuoppala
1fb5ce0a11
intel/tools: Initialize offset correctly for i965_asm
If we leave offset uninitialized, access to store
will be random depending on stack value and can
segfault.

Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2019-05-07 14:33:48 -07:00
Mika Kuoppala
85da1194ec
intel/tools: Add meson pthread dependancy for i965_asm
Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2019-05-07 14:33:48 -07:00
Sagar Ghuge
70308a5a8a
intel/tools: New i965 instruction assembler tool
Tool is inspired from igt's assembler tool. Thanks to Matt Turner, who
mentored me through out this project.

v2: Fix memory leaks and naming convention (Caio)
v3: Fix meson changes (Dylan Baker)
v4: Fix usage options (Matt Turner)

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/merge_requests/141
2019-05-07 14:33:38 -07:00
Eric Engestrom
7ca8ba199f delete autotools .gitignore files
One special case, `src/util/xmlpool/.gitignore` is not entirely deleted,
as `xmlpool.pot` still gets generated (eg. by `ninja xmlpool-pot`).

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
2019-04-29 21:17:19 +00:00
Mark Janes
eda36feb2b intel/tools: Remove redundant definitions of INTEL_DEBUG
INTEL_DEBUG is declared extern and defined in gen_debug.c

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2019-04-10 13:15:33 -07:00
Lionel Landwerlin
7271808df8 intel/error2aub: support older style engine names
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
2019-03-08 11:01:14 +00:00
Lionel Landwerlin
a036eac029 intel/error2aub: deal with GuC log buffer
When Guc is enabled, the error state will contain a "global" buffer
for the GuC log buffer.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
2019-03-08 11:01:14 +00:00
Lionel Landwerlin
c619ea945d intel/error2aub: add a verbose option
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
2019-03-08 11:01:14 +00:00
Lionel Landwerlin
ca0161f890 intel/error2aub: write GGTT buffers into the aub file
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
2019-03-08 11:01:14 +00:00
Lionel Landwerlin
9b5dc2124f intel/error2aub: store engine last ring buffer head/tail pointers
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
2019-03-08 11:01:14 +00:00
Lionel Landwerlin
cdab19fa57 intel/error2aub: annotate buffer with their address space
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
2019-03-08 11:01:14 +00:00
Lionel Landwerlin
630a72827a intel/error2aub: parse other buffer types
We don't write them in the aub file yet.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
2019-03-08 11:01:14 +00:00
Lionel Landwerlin
c0ea043888 intel/error2aub: strenghten batchbuffer identifier marker
Found out that some base64 data matched the '---' identifier. We can
avoid this by adding the surrounding spaces.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
2019-03-08 11:01:14 +00:00
Lionel Landwerlin
650e6e5d33 intel/error2aub: identify buffers by engine
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
2019-03-08 11:01:14 +00:00
Lionel Landwerlin
a07f5262f0 intel/error2aub: build a list of BOs before writing them
The error state contains several kind of BOs, including the context
image which we will want to write in a later commit. Because it can
come later in the error state than the user buffers and because we
need to write it first in the aub file, we have to first build a list
of BOs and then write them in the appropriate order.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
2019-03-08 11:01:14 +00:00
Lionel Landwerlin
0b3871bc7f intel/aub_write: factorize context image/pphwsp/ring creation
We allocate GGTT entries and physical addresses are we create engines
rather than having a fixed layout.

Context images now receive a parameter argument which is used to setup
pml4 & ring buffer addresses.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
2019-03-07 15:08:32 +00:00
Lionel Landwerlin
c1a2c72e76 intel/aub_write: turn context images arrays into functions
We'll make them more parameterized in a later commit.

As this is just a transitional commit, we allow ourself to leak the
context images allocated in get_context_init(). We'll fix this in the
next commit.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
2019-03-07 15:08:32 +00:00
Lionel Landwerlin
8e14c9b7db intel/aub_write: store the physical page allocator in struct
We want to use this allocator in the next commit for GGTT pages.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
2019-03-07 15:08:32 +00:00
Lionel Landwerlin
0343a3b42b intel/aub_write: log mmio writes
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
2019-03-07 15:08:32 +00:00
Lionel Landwerlin
6ef46972d9 intel/aub_write: switch to use i915_drm engine classes
Prepare aub write to deal with multiple engine instances. We don't
pass the instance number yet this could be done in the future by
having a 2 dimensional array of struct engine.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Rafael Antognolli <rafael.antognolli@intel.com>
2019-03-07 15:08:32 +00:00
Lionel Landwerlin
8a81f5c255 intel/aub_write: break execlist write in 2
We want to reuse the execlist submission, but won't need the ring
buffer update.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
2019-03-07 15:08:32 +00:00