Commit graph

66347 commits

Author SHA1 Message Date
Mike Blumenkrantz
764e17eb03 dri: further collapse dri_screen creation
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30619>
2024-08-19 17:43:58 +00:00
Mike Blumenkrantz
af6d3fdf6e dri: pass has_multibuffers through from the loader
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30619>
2024-08-19 17:43:58 +00:00
Mike Blumenkrantz
b5fa2d6448 kopper: reuse loader_dri3_get_pixmap_buffer
delete more code

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30619>
2024-08-19 17:43:58 +00:00
Mike Blumenkrantz
00f810c31b dri: break out get_pixmap_buffer
no functional changes

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30619>
2024-08-19 17:43:58 +00:00
Mike Blumenkrantz
7f8a60758e kopper: reuse dri_image_fence_sync
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30619>
2024-08-19 17:43:58 +00:00
Mike Blumenkrantz
c5f55ee126 dri: rename and move handle_in_fence to dri_helpers
make this reusable

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30619>
2024-08-19 17:43:58 +00:00
Mike Blumenkrantz
f14ef0ee0a kopper: reuse dri3 functions
these were copied because of dependency hell and can now be consolidated

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30619>
2024-08-19 17:43:58 +00:00
Mike Blumenkrantz
8cc95baf7b dri: merge in loader_dri3
this simplifies dependencies

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30619>
2024-08-19 17:43:58 +00:00
Mike Blumenkrantz
8f29aa28a5 kopper: reuse drisw_update_tex_buffer to delete some code
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30619>
2024-08-19 17:43:58 +00:00
Mike Blumenkrantz
a3de3a4501 dri: set __DRI_IMAGE_ERROR_BAD_PARAMETER if driver doesn't support dmabuf import
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30619>
2024-08-19 17:43:58 +00:00
Eric Engestrom
6b460189f4 nvk+zink/ci: mark spec@arb_sample_shading@samplemask .*@0\..* partition as fixed
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30725>
2024-08-19 17:25:15 +00:00
Eric Engestrom
397bdb944d llvmpipe/ci: mark now-skipping test as no longer failing
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30725>
2024-08-19 17:25:15 +00:00
Konstantin Seurer
a77f1d04d2 llvmpipe: Use derivative intrinsics
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30584>
2024-08-19 14:09:11 +00:00
Adam Jackson
e497f81603 rusticl: Add clCreateSubDevices stub
unified-runtime tries to call this unconditionally. It handles errors
correctly, but calling None here isn't an error, it's a crash. Just
return CL_INVALID_VALUE so we don't crash.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30699>
2024-08-19 13:35:40 +00:00
GKraats
0311159bed i915g: fix count of buffers at i915_drm_batchbuffer_validate_buffers
This commit contains the fix with num_of_buffers at validation-call
at i915_drm_batchbuffer_validate_buffers.

Cc: mesa-stable

Signed-off-by: GKraats <vd.kraats@hccnet.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26769>
2024-08-18 20:19:44 +00:00
GKraats
ed2123158d i915g: Screen corruption with ENOBUFS caused by fence register shortage
This commit solves the shortage-problem at the blit-functions by
checking the number of fence-registers after updating the batch.
If too many registers are used,
the batch-entries and relocs for the current blit function are
removed by setting batch->ptr and reloc_count to value before
the blit call and calling drm_intel_gem_bo_clear_relocs.
This truncated batch is flushed,
and the batch is updated again for the current blit function.

Cc: mesa-stable

Signed-off-by: GKraats <vd.kraats@hccnet.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26769>
2024-08-18 20:19:44 +00:00
Karol Herbst
93e96da945 rusticl: do not use CL vector types in bindings and code
Bindgen seems to miscompile them and I kinda thought I've done this
already in the past, but apparently not.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11722
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30710>
2024-08-18 09:23:22 +00:00
Guilherme Gallo
8aa52ac666 ci/a618: Fix zink-tu-a618-full rules
We should use `.zink-turnip-collabora-manual-rules` instead of
`.collabora-turnip-manual-rules`, since the former correctly reacts to
the zink+turnip file changes.

Fixes: 69eac6dd15 ("ci/a618: Add zink-tu-a618-full")

Reported-by: Valentine Burley <valentine.burley@gmail.com>
Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30698>
2024-08-16 20:08:35 +00:00
Job Noorman
2c47ad7774 ir3: make ir3_const_state less error-prone to use
ir3_const_state is shared between the binning and non-binning variants.
The non-binning variant is compiled first and sets up ir3_const_state
after which the binning variant is not supposed to modify it anymore. If
it would, things may go haywire since the layout of the constant state
will change after the non-binning variant already finished compiling.

Currently, the ir3_const_state() accessor takes care of the sharing
(i.e., it returns the non-binning const state for the binning variant)
but nothing would be prevent the binning variant from accidentally
modifying the state. This is handled by restraint from its users.

This commit tries to make it more difficult to accidentally modify the
const state by the binning shader by making the following changes:
- ir3_const_state(): the same logic as before but now returns a const
  pointer to prevent the binning variant from (accidentally) modifying
  the const state.
- ir3_const_state_mut(): returns a non-const pointer but asserts that it
  is not called by the binning variant.

As a corollary ir3_get_driver_ubo() also had to be split in two variants
(const and non-const) as it is called with a pointer to one of the
fields of ir3_const_state.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30256>
2024-08-16 14:14:29 +00:00
Job Noorman
bec7e79f33 freedreno: don't require binning and non-binning inputs to match
This shouldn't be necessary anymore since f6f7bc29 ("freedreno/a6xx:
Program VFD_DEST_CNTL from program stateobj").

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30256>
2024-08-16 14:14:29 +00:00
Robert Mader
c738cfe8dd egl: Stop requiring texture_3D_image for EGL 1.5
Neither VK-GL-CTS nor dri2_setup_screen() require it, unlike
texture_2D_image and texture_cubemap_image. Crucially, older etnaviv
generations and vc4 in general do not support 3d textures.

Thus drop the requirement in order to support EGL 1.5 across the board.

Signed-off-by: Robert Mader <robert.mader@collabora.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30680>
2024-08-16 13:36:47 +00:00
Danylo Piliaiev
b88b076870 tu/a7xx: Use generic clear for LOAD_OP_CLEAR
Aside from being just nicer it does UBWC fast-clear.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30270>
2024-08-16 10:38:37 +00:00
Danylo Piliaiev
49193771f6 freedreno: Clarify RB_BLIT_INFO::TYPE field
It's an enum, not two unconnected bits, with A7XX it's even more clear..

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30270>
2024-08-16 10:38:37 +00:00
David Rosca
6150967888 frontends/va: Parse packed header slice for HEVC TemporalId
Reviewed-By: Sil Vilerino <sivileri@microsoft.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30151>
2024-08-16 08:31:38 +00:00
David Rosca
987e3e0dd5 frontends/va: Get per temporal layer params for HEVC
Reviewed-By: Sil Vilerino <sivileri@microsoft.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30151>
2024-08-16 08:31:38 +00:00
David Rosca
1283f43527 frontends/va: Assert maximum number of temporal layers
There is a hardcoded limit of 4 layers in all structs, so make sure
drivers will not return more.

Reviewed-By: Sil Vilerino <sivileri@microsoft.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30151>
2024-08-16 08:31:37 +00:00
David Rosca
384057076a gallium: Change pipe_h265_enc_rate_control to array
Same as other codecs, use 4 as max number of temporal layers.

Reviewed-By: Sil Vilerino <sivileri@microsoft.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30151>
2024-08-16 08:31:37 +00:00
Ruijing Dong
b9c1fcc59b radeonsi/vcn: qp map IB package sent by default
This is to support QP map enabled and disabled mixed case.
When qp map disabled, it still needs the IB package to tell
VCN engine qp map is not needed.

Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Reviewed-By: Sil Vilerino <sivileri@microsoft.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30665>
2024-08-15 18:16:06 +00:00
Ruijing Dong
ac45948136 frontends/va: reset roi number
reason:
   roi number is an indication to do qp_map in vcn encoder.
   if not resetting this number, the previous roi style
   will be used if not changed, or not used. In the case
   non roi case mixed with roi, the behavior will not be
   expected.

reset roi_num at the beginning of each frame, if application
doesn't send roi map, then roi will be stopped.

Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Reviewed-By: Sil Vilerino <sivileri@microsoft.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30665>
2024-08-15 18:16:06 +00:00
Job Noorman
f448cf90c8 zink/ci: add a618 flake
Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28341>
2024-08-15 12:07:27 +00:00
Connor Abbott
de1d36d054 ci: Uprev VK-CTS to 1.3.9.0
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29766>
2024-08-15 09:01:26 +00:00
Connor Abbott
bc1521e601 ci: Move two failing loader-related tests to all-skips.txt
There's no value testing these tests in CI until the loader is upgraded,
so don't force every driver to add them to their fails list.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29766>
2024-08-15 09:01:26 +00:00
Pavel Ondračka
a1a06f386e r300: fix RGB10_A2 CONSTANT_COLOR blending
Just reverse the color order the same way we do for RGBA8.

Fixes: 910bac63df
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30656>
2024-08-15 07:02:44 +00:00
David Rosca
4b60918138 radeonsi: Don't allow DCC for encode in is_video_target_buffer_supported
This accidentally allowed DCC with format conversion, which is not supported.
Also disable EFC with VCN5 for now.

Fixes: 40c3a53fec ("radeonsi: Implement is_video_target_buffer_supported")
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30562>
2024-08-15 06:26:16 +00:00
David Rosca
79ce0e3b2f frontends/va: Fix use after free with EFC
This happens when the source surface is destroyed before being used
in encoding operation. It also needs to disable EFC in this case.

Fixes: a7469a9ffd ("frontends/va: Rework EFC logic")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11653
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30562>
2024-08-15 06:26:16 +00:00
Karol Herbst
5d0c870c00 rusticl/mem: do not check against image base alignment for 1Dbuffer images
The CL cap in question is only valid for 2D images created from buffer.

Fixes: 20c90fed5a ("rusticl: added")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30655>
2024-08-14 15:33:01 +00:00
David Rosca
214b6c3040 radeonsi/vcn: Only insert headers when requested for H264/5
Currently sequence headers (VPS, SPS, PPS) are always inserted
on each IDR frame and AUD is inserted on every frame, but this
should be decided by application what headers it wants.
AUD is optional and is almost never needed, in some cases sequence
headers also are not needed each IDR frame and currently this only
wastes bits.
With FFmpeg/GStreamer this changes AUD to not be inserted by default,
there is no change to sequence headers as those are already requested
to be inserted on each IDR.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30585>
2024-08-14 13:26:03 +00:00
David Rosca
c9ccce5271 frontends/omx: Request SPS PPS for IDR pictures
Also request AUD every frame to match old behavior.

Reviewed-By: Sil Vilerino <sivileri@microsoft.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30585>
2024-08-14 13:26:03 +00:00
David Rosca
31f6fe1356 frontends/va: Keep track if VPS/SPS/PPS/AUD was sent
FFmpeg sends AUD as part of VA_ENC_PACKED_HEADER_SEQUENCE and
VA_ENC_PACKED_HEADER_SLICE.
GStreamer sends it separately as VA_ENC_PACKED_HEADER_RAW_DATA.

It's now also needed to keep track what packed headers were enabled
to include VPS/SPS/PPS with VAEncSequenceParameterBuffer when sequence
packed headers are disabled.

Reviewed-By: Sil Vilerino <sivileri@microsoft.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30585>
2024-08-14 13:26:02 +00:00
David Rosca
ba1bc7c495 frontends/va: Don't check header type for packed header buffers
Applications should not send types that were not enabled when creating
config and even if they do it will not cause any unexpected issues.
Remove the checks as it is another place that would need to be
updated when adding support for new packed header types.

Reviewed-By: Sil Vilerino <sivileri@microsoft.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30585>
2024-08-14 13:26:02 +00:00
David Rosca
f8dcf15ed2 gallium: Add header_flags to pipe_h2645_enc_picture_desc
Indicates what headers should be inserted.
Move pipe_h265_enc_picture_desc metadata_flags into header_flags

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30585>
2024-08-14 13:26:02 +00:00
Antonio Ospite
2d2bc5b307 android: simplify building libgallium_dri on Android
The versioned libgallium library can be confusing on Android, and it is
probably not even needed there, so simplify the build on Android by
always build the unversioned `libgallium_dri.so` overriding the
`-Dunversion-libgallium=true` option added in
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30579

Remove also all the bits that deal with the versioned library which are
not needed anymore.

Fixes: 9568976c52 ("android: fix build in multiple ways")
Acked-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Mauro Rossi <issor.oruam@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30641>
2024-08-14 09:11:44 +00:00
Lucas Stach
c90e2bccf7 etnaviv: properly set PIPE_CAP_GRAPHICS
Only advertise graphics capabilities if the GPU isn't compute only.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30606>
2024-08-14 08:35:36 +00:00
Rob Clark
a5b103e4c1 freedreno/a6xx: Cleanup setup_slices()
We don't need to runtime dispatch btwn a6xx and a7xx versions of
setup_lrz().

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30649>
2024-08-14 02:19:55 +00:00
Rob Clark
a127a78548 freedreno: Re-enable LRZ for a7xx
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30649>
2024-08-14 02:19:55 +00:00
Rob Clark
141466eb27 freedreno/a6xx: Fix LRZ
LRZ fastclear offset can be greater than 16b.

Fixes: b1937f76ff ("freedreno/a6xx: Allocate lrcfc when needed for direction tracking")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30649>
2024-08-14 02:19:55 +00:00
Christian Gmeiner
e05962a4e7 etnaviv: Drop halti from etna_specs
Use the one from etna_core_info instead.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30394>
2024-08-13 22:15:22 +00:00
Christian Gmeiner
6e0a28db2e etnaviv: Extend shader structs with etna_core_info
Prep step to drop halti from etna_specs.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30394>
2024-08-13 22:15:22 +00:00
Christian Gmeiner
6d673a3ac7 etnaviv: Switch etna_compiler_create(..) to etna_core_info
Prep step to drop halti from etna_specs.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30394>
2024-08-13 22:15:22 +00:00
Christian Gmeiner
ce2fc866ec etnaviv: Move halti determination to drm
The ideal place to store the halti value is in struct etna_core_info.
Let's put it there and the determination of it into etna_gpu_new(..).
This makes it possible to reuse the halti level outside of gallium.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30394>
2024-08-13 22:15:22 +00:00