Commit graph

13 commits

Author SHA1 Message Date
Alyssa Rosenzweig
95e3df39c0 treewide: sed out more is_ssa
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24432>
2023-08-03 22:40:28 +00:00
Yonggang Luo
48a25ef700 treewide: Remove all usage of nir_builder_init with nir_builder_create and nir_builder_at
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24038>
2023-07-10 19:20:17 +00:00
Alyssa Rosenzweig
b0b5a71c74 nir/opt_preamble: Consider load_preamble as movable
It's kosher to get load_preamble intrinsics ahead of time if the driver is
pushing sysvals. Handle them like load_uniform.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by-(with-sparkles): Asahi Lina <lina@asahilina.net>

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20562>
2023-01-31 17:02:34 +00:00
Alyssa Rosenzweig
05d3238692 nir/opt_preamble: Treat *size as an input
Some backends may wish to reserve early uniforms for internal system values, and
use the remaining space for preamble storage. In this case, it's convenient to
teach nir_opt_preamble about a reserved offset. It's logical to treat the output
*size instead of an in/out variable that nir_opt_preamble adds to. This requires
a slight change to the consumers to zero the input.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by-(with-sparkles): Asahi Lina <lina@asahilina.net>

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20562>
2023-01-31 17:02:34 +00:00
Alyssa Rosenzweig
0af08acca5 nir: Add intrinsics for lowering UBOs/VBOs on AGX
We'll use formatted loads and some system values to lower UBOs and VBOs to
global memory in NIR, using the AGX-specific format support and addressing
arithmetic to optimize the emitted code.

Add the intrinsics and teach nir_opt_preamble how to move them so we don't
regress UBO pushing.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19996>
2022-12-02 06:25:20 +00:00
Qiang Yu
533b39bfcb nir,ac/llvm,radeonsi: add nir_load_clamp_vertex_color_amd
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19429>
2022-11-11 04:22:20 +00:00
Qiang Yu
7fb506d068 nir: add nir_load_prim_xfb_query_enabled_amd
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17457>
2022-10-25 12:58:43 +00:00
Qiang Yu
83643e4dc8 nir,ac/nir/ngg,radv: split shader_query_enabled_amd
For used by different counter.

Vulkan:
1. VK_QUERY_PIPELINE_STATISTIC_GEOMETRY_SHADER_PRIMITIVES_BIT,
   sum generated primitives of all 4 streams when GS.
2. VK_QUERY_TYPE_PRIMITIVES_GENERATED_EXT, count generated
   primitives for all 4 streams when VS/TES/GS.
3. VK_QUERY_TYPE_TRANSFORM_FEEDBACK_STREAM_EXT, count generated
   and streamout primitives for all 4 streams when VS/TES/GS.

OpenGL:
1. GL_GEOMETRY_SHADER_PRIMITIVES_EMITTED_ARB, sum generated
   primitives for all 4 streams when GS.
2. GL_PRIMITIVES_GENERATED, count generated primitives for all 4
   streams when VS/TES/GS.
3. GL_TRANSFORM_FEEDBACK_PRIMITIVES_WRITTEN, count streamout
   primitives for all 4 streams when VS/TES/GS.

pipeline_stat_query_enabled_amd is for Vulkan 1 and OpenGL 1.
xfb_query_enabled_amd is for Vulkan 2/3 and OpenGL 2/3.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19015>
2022-10-25 02:42:52 +00:00
Alyssa Rosenzweig
80de33cf6a nir/opt_preamble: Move load_texture_base_agx
nir_opt_preamble will be crucial to optimize out the lowering for array
textures on AGX, which involves this AGX-specific sysval.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
2022-10-22 14:48:04 -04:00
Marek Olšák
ea6993f9c7 nir: add nir_intrinsic_image_samples_identical
radeonsi will use it

Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17693>
2022-08-03 17:44:15 +00:00
Konstantin Seurer
16585664cd radv: vkCmdTraceRaysIndirect2KHR
This changes the trace rays logic to always use
VkTraceRaysIndirectCommand2KHR and implements
vkCmdTraceRaysIndirect2KHR. I renamed the
load_sbt_amd to sbt_base_amd and moved the SBT
load lowering from ACO to NIR.

Note that we can not just upload one pointer to
all the trace parameters because that would
be incompatible with traceRaysIndirect.

Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16430>
2022-06-08 20:20:21 +00:00
Konstantin Seurer
3aa0ea8279 nir: Handle ray_launch_size_addr in opt_preamble
Found this while working on traceRaysIndirect2.
I don't think this is relevant for now at least
since we don't use the pass in RADV.

Fixes: 938c9d9 ("nir: Add a ray launch size addr intrinsic")
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16430>
2022-06-08 20:20:21 +00:00
Connor Abbott
3b96ad70ee nir: Add a preamble optimization pass
This pass tries to move computations that are uniform for the entire
draw to the preamble. There's also an API for backends to insert their
own instructions into the preamble, for porting existing UBO pushing
passes.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13148>
2022-03-17 12:15:45 +00:00