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Author SHA1 Message Date
Marek Olšák
6e2e89e6d8 amd,radeonsi: change enabled_rb_mask to 64 bits 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21641>
 2023-03-03 00:41:48 +00:00
Rhys Perry
dc01f03d1b radv: remove is_internal pipeline creation parameter 
Instead, check if the cache is the meta shader cache. This catches the
shaders created by radv_create_radix_sort_u64().

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21606>
 2023-03-02 16:48:09 +00:00
Samuel Pitoiset
4ec6850210 radv: fix DCC decompress on GFX11 
The hardware requires one color output to be set by CB registers,
otherwise the DCC decompression does nothing.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8127
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8175
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8370
Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21629>
 2023-03-02 16:03:31 +00:00
Tatsuyuki Ishi
57ab623f0b radv: Use common helpers to translate format in SDMA copy. 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21585>
 2023-03-02 15:29:47 +00:00
Tatsuyuki Ishi
4f681d5e2c radv: Remove SDMA padding from copy helpers. 
These are handled in winsys already; no need to duplicate and complicate
the code paths.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21585>
 2023-03-02 15:29:47 +00:00
Tatsuyuki Ishi
e9a55b332a radv: SDMA v4 size field is size - 1 
After cross-checking with kernel and the old buffer copy code, it seems
that the size field should be size - 1 instead.

Fixes: 7b5ab48c40 ("radv: partial sdma support")

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21585>
 2023-03-02 15:29:47 +00:00
Samuel Pitoiset
427fd83d27 radv: use new EVENT_WRITE_ZPASS packet3 on GFX11 
Ported from RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21621>
 2023-03-02 12:53:27 +00:00
Samuel Pitoiset
87444bb7ab radv: ignore alpha_is_on_msb on GFX11 because the hw ignores it 
Ported from RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21621>
 2023-03-02 12:53:27 +00:00
Samuel Pitoiset
3ced4ae816 radv: only expose EXT_pipeline_library_group_handles if RT is enabled 
VK_EXT_pipeline_library_group_handles requires
VK_KHR_ray_tracing_pipeline to be enabled.

Fixes dEQP-VK.info.device_extensions.

Fixes: ed76833705 ("radv: Implement & expose VK_EXT_pipeline_library_group_handles.")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21618>
 2023-03-01 10:55:00 +00:00
Dave Airlie
24c09d4b16 radv: add video format support to format probing. 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21457>
 2023-03-01 07:16:47 +00:00
Tatsuyuki Ishi
bab235106e radv: Replace radv_trap_handler_shader with radv_shader. 
Now that the upload memory is tied to the shader itself, the trap handler
shader no longer needs an additional wrapper.

This is a cleanup to ease introduction of a new shader uploading code path.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21541>
 2023-03-01 05:12:10 +00:00
Konstantin Seurer
5ce99bc568 radv: Only init geometry infos if RRA is enabled 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21532>
 2023-02-28 20:49:33 +00:00
Konstantin Seurer
7bd265bc86 radv: Move header and geometry info init into separate functions 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21532>
 2023-02-28 20:49:33 +00:00
Samuel Pitoiset
c356f1b4ed radv: fix draw calls with 0-sized index buffers and robustness on NAVI10 
The correct workaround is to bind an internal index buffer to handle
robustness2 correctly.

Fixes dEQP-VK.robustness.index_access.* in CTS 1.3.5.0 on NAVI10.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21471>
 2023-02-28 14:12:29 +00:00
Samuel Pitoiset
7c62f6fa01 radv: fix flushing non-coherent images in EndCommandBuffer() 
The condition was inverted.

This doesn't fix anything known.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21549>
 2023-02-28 09:35:07 +00:00
Samuel Pitoiset
6750a9094f radv: fix flushing non-coherent images inside secondaries on GFX9+ 
Fixes
dEQP-VK.draw.dynamic_rendering.complete_secondary_cmd_buff.multi_draw.mosaic.*
on VEGA10 (related to the use of HTILE).

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21549>
 2023-02-28 09:35:07 +00:00
Eric Engestrom
735df516e9 radv: split linker script for android since it requires different symbols 
Fixes: 4956f6d0bf ("radv: Add Android module info to linker script.")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8338
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21518>
 2023-02-27 14:34:16 +00:00
Mike Blumenkrantz
7c8a5f6e37 vulkan/wsi: switch to using an options struct for last param 
this makes adding values easier since the drivers won't need to be updated

Acked-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21447>
 2023-02-27 13:21:21 +00:00
Georg Lehmann
9f155c21c3 amd: d16 uses rtz conversion for 32bit float 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21404>
 2023-02-27 09:55:34 +00:00
Georg Lehmann
77252687fa amd: don't use d16 for integer loads 
D16 saturates to min/max instead of just truncating.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21404>
 2023-02-27 09:55:34 +00:00
Georg Lehmann
a00b50d820 nir: change 16bit image dest folding option to per type 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21404>
 2023-02-27 09:55:34 +00:00
Samuel Pitoiset
a14d46fde2 radv: enable primitiveUnderestimation on GFX9+ 
It's passing dEQP-VK.rasterization.conservative.underestimate.* on
NAVI21.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21459>
 2023-02-27 09:04:01 +00:00
Samuel Pitoiset
dba7a66429 radv: set MSAA_NUM_SAMPLES to 0 for underestimate rasterization 
Based on PAL.

Fixes
dEQP-VK.rasterization.conservative.underestimate.samples_*.triangles.normal.test.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21459>
 2023-02-27 09:04:01 +00:00
Samuel Pitoiset
0eae617826 radv: stop setting ENABLE_POSTZ_OVERRASTERIZATION to 1 
According to PAL this isn't set.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21459>
 2023-02-27 09:04:01 +00:00
Samuel Pitoiset
05732f4519 radv: cleanup radv_emit_{conservative,msaa}_state() functions 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21459>
 2023-02-27 09:04:01 +00:00
Tatsuyuki Ishi
ed03821442 radv/sqtt: Use code buffer from radv_shader directly instead of copying. 
The reference-counted radv_shader always outlives the pipeline, so we can
use this buffer directly when dumping code objects to the trace.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21513>
 2023-02-27 07:16:48 +00:00
Tatsuyuki Ishi
ea070fb83a radv: Keep shader code ptr in a separately allocated buffer. 
RGP traces need a dump of shader code in order to display ISA and
instruction trace. Previously, this was read back from GPU at trace
creation time. However, for future changes that implements upload shader
to invisible VRAM, the upload destination will be a temporary staging
buffer and will be only accessible during shader creation.

To allow dumping in such cases, copy the shader code to a separate buffer
at creation time, if thread tracing is enabled.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21513>
 2023-02-27 07:16:48 +00:00
Konstantin Seurer
2d93ab795b radv/rt: Pre shift cull_mask 
This removes the need for masking the instance mask.

Totals from 14 (14.43% of 97) affected shaders:
CodeSize: 378696 -> 378308 (-0.10%); split: -0.12%, +0.02%
Instrs: 70854 -> 70855 (+0.00%); split: -0.02%, +0.02%
Latency: 1651235 -> 1651215 (-0.00%); split: -0.00%, +0.00%
InvThroughput: 336290 -> 336285 (-0.00%); split: -0.00%, +0.00%
Copies: 9915 -> 9923 (+0.08%); split: -0.03%, +0.11%
PreSGPRs: 890 -> 896 (+0.67%)

 PERCENTAGE DELTAS Shaders  CodeSize   Instrs   Latency  InvThroughput   Copies   PreSGPRs
 q2rtx-pipe        48        -0.02%    -0.02%    -0.00%      -0.00%      -0.03%      .
 q2rtx_1           49        -0.10%    +0.02%    +0.00%      +0.00%      +0.14%    +0.31%
 -------------------------------------------------------------------------------------------
 All affected      14        -0.10%    +0.00%    -0.00%      -0.00%      +0.08%    +0.67%
 -------------------------------------------------------------------------------------------
 Total             97        -0.06%    +0.00%    -0.00%      -0.00%      +0.06%    +0.16%

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21530>
 2023-02-26 12:58:13 +00:00
Konstantin Seurer
13a9ce7f2f radv/rt: Merge cull_mask and flags 
Since cull_mask is only one byte, we can trivially store it in the same
register as the flags. This leaves us with a 2% performance gain in
Quake II RTX:

Totals from 7 (14.00% of 50) affected shaders:
VGPRs: 720 -> 688 (-4.44%)
CodeSize: 213052 -> 212980 (-0.03%); split: -0.05%, +0.02%
MaxWaves: 67 -> 70 (+4.48%)
Instrs: 39429 -> 39394 (-0.09%); split: -0.15%, +0.06%
Latency: 1096258 -> 1096943 (+0.06%); split: -0.05%, +0.11%
InvThroughput: 230661 -> 222963 (-3.34%); split: -3.42%, +0.08%
VClause: 1208 -> 1206 (-0.17%); split: -0.25%, +0.08%
Copies: 5321 -> 5269 (-0.98%); split: -1.22%, +0.24%
Branches: 1903 -> 1902 (-0.05%)
PreVGPRs: 650 -> 645 (-0.77%)

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21470>
 2023-02-25 12:07:46 +00:00
Marek Olšák
9f1e6d8f70 nir,amd: add and use nir_intrinsic_load_esgs_vertex_stride_amd 
This will emulate VGT_ESGS_RING_ITEMSIZE, which does the multiplication
for us. It's beneficial to stop setting VGT_ESGS_RING_ITEMSIZE to reduce
context rolls, and also the register will be removed in the future.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:24 +00:00
Marek Olšák
df6380ddc9 amd: implement conformant TRUNC_COORD behavior for gfx11 
For testing, the conformant behavior can be enabled by setting
conformant_trunc_coord to true manually and running this to enable
the conformant behavior in hw:
    umr -w *.*.regTA_CNTL2 0x40000

The layer index rounding and TRUNC_COORD resetting workarounds can disabled
in the shader compiler.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:24 +00:00
Marek Olšák
3e8bd05020 radeonsi: don't set PACKET_TO_ONE_PA for line stippling 
A hw guy told me this.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:24 +00:00
Marek Olšák
98eee7dee3 amd: replace SI_BIG_ENDIAN with UTIL_ARCH_BIG_ENDIAN 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:24 +00:00
Marek Olšák
e0c8b24e22 amd/registers: unify VRS combiner definition names between gfx103 and gfx11 
use gfx11 names

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:24 +00:00
Marek Olšák
ac0e83375a amd: fix LOD_BIAS on gfx6-9 and adjust the lod bias CAP 
Fixes: e673bb4ae4 - amd,util: fix how lod bias is converted to fixed-point

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:23 +00:00
Faith Ekstrand
96c832c47e spirv: Always emit deref_buffer_array_length intrinsics 
All the drivers have been converted to setting this option now except
imagination and they don't support SSBOs yet.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3993
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21446>
 2023-02-24 20:37:10 +00:00
Konstantin Seurer
e2fa9ba9c6 radv: Use indirect header filling for compact builds 
Sets the accel struct size fields to the correct values which should
allow for more compaction.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20818>
 2023-02-24 15:14:40 +00:00
Konstantin Seurer
40e9efa2de radv/bvh: Add a shader for filling the header 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20818>
 2023-02-24 15:14:40 +00:00
Konstantin Seurer
c83ea20683 radv/bvh: Move the size header field up 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20818>
 2023-02-24 15:14:40 +00:00
Konstantin Seurer
b0fd43f1f7 radv: Move the geometry infos before the BVH 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20818>
 2023-02-24 15:14:40 +00:00
Konstantin Seurer
0800450cb9 radv: Use compact encoding 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20818>
 2023-02-24 15:14:40 +00:00
Konstantin Seurer
07c1b23022 radv/bvh: Implement compact encoding 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20818>
 2023-02-24 15:14:40 +00:00
Konstantin Seurer
71ccc8d600 radv: Add a build config for compact builds 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20818>
 2023-02-24 15:14:40 +00:00
Konstantin Seurer
da4f498f6f radv/bvh/encoder: Move dst_node initialization into the loop 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20818>
 2023-02-24 15:14:40 +00:00
Konstantin Seurer
2792d012d2 radv/bvh/encode: Introduce is_root_node 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20818>
 2023-02-24 15:14:40 +00:00
Konstantin Seurer
2c0e158ae2 radv/bvh/encode: Move bvh_offset NULL check to the top of the loop 
NULL nodes don't have to be encoded and they also don't carry over any
information to their children.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20818>
 2023-02-24 15:14:40 +00:00
Konstantin Seurer
4e87a01b93 radv/bvh: Replace is_final_tree with bvh_offset 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20818>
 2023-02-24 15:14:40 +00:00
Konstantin Seurer
688f598237 radv/bvh/encode: Use the node type for identifying internal nodes 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20818>
 2023-02-24 15:14:40 +00:00
Samuel Pitoiset
d2ff8b673a radv: advertise VK_EXT_image_sliced_view_of_3d on GFX10+ 
Pass dEQP-VK.pipeline.monolithic.sliced_view_of_3d_image.* on NAVI21.

Looks like older generations can't support it.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21359>
 2023-02-24 14:12:22 +00:00
Samuel Pitoiset
5520a40e05 radv: implement VK_EXT_image_sliced_view_of_3d on GFX10+ 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21359>
 2023-02-24 14:12:22 +00:00