Commit graph

4020 commits

Author SHA1 Message Date
Tomeu Vizoso
9e031426be panvk/ci: Disable CI for a while
We have been hitting OOM conditions quite often and this is making ti
hard to get stuff merged.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16554>
2022-05-17 09:16:21 +00:00
Timothy Arceri
d7a071a28f gallium/drivers: set force_indirect_unrolling_sampler for all required drivers
This is set to true for all drivers that have a GLSL level
of support lower than 4.00. This matches the rule for setting the
GLSL IR option EmitNoIndirectSampler.

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16543>
2022-05-17 02:12:21 +00:00
Jason Ekstrand
9e22e2ac88 panvk: Lower blending after lower_var_copies
nir_lower_blend needs store_deref as does
io_arrays_to_elements_no_indirects.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16483>
2022-05-16 21:43:47 +00:00
Jason Ekstrand
4050697a8f panvk: So more nir_lower_tex before descriptor lowering
Some texture lowering generates more txs which means it needs to happen
before we lower descriptors because descriptor lowering is where txs is
actually handled in panvk.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16483>
2022-05-16 21:43:47 +00:00
Jason Ekstrand
36bb62139e bifrost: Run nir_lower_global_vars_to_local before nir_lower_vars_to_scratch
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16483>
2022-05-16 21:43:47 +00:00
Timothy Arceri
7647023f3b glsl: enable the use of the nir based varying linker
Here as well as calling the pass we need to switch the order of
some of the information gathering and optimisation calls. We also
need to create a custom callback for the dead variables removal
pass to clean up dead builtin varying in SSO programs without
causing piglit regressions.

shader-db results IRIS (BDW):

total instructions in shared programs: 17487900 -> 17477072 (-0.06%)
instructions in affected programs: 128682 -> 117854 (-8.41%)
helped: 587
HURT: 82
helped stats (abs) min: 1 max: 145 x̄: 18.82 x̃: 20
helped stats (rel) min: 0.21% max: 77.78% x̄: 17.41% x̃: 8.85%
HURT stats (abs)   min: 1 max: 6 x̄: 2.68 x̃: 2
HURT stats (rel)   min: 0.25% max: 9.76% x̄: 2.94% x̃: 2.16%
95% mean confidence interval for instructions value: -17.71 -14.66
95% mean confidence interval for instructions %-change: -16.40% -13.42%
Instructions are helped.

total cycles in shared programs: 857442520 -> 857170199 (-0.03%)
cycles in affected programs: 112252720 -> 111980399 (-0.24%)
helped: 13733
HURT: 13349
helped stats (abs) min: 1 max: 7293 x̄: 81.44 x̃: 10
helped stats (rel) min: <.01% max: 90.32% x̄: 3.30% x̃: 0.62%
HURT stats (abs)   min: 1 max: 7424 x̄: 63.38 x̃: 8
HURT stats (rel)   min: <.01% max: 192.23% x̄: 3.28% x̃: 0.54%
95% mean confidence interval for cycles value: -14.01 -6.10
95% mean confidence interval for cycles %-change: -0.17% 0.06%
Inconclusive result (%-change mean confidence interval includes 0).

total sends in shared programs: 971443 -> 970010 (-0.15%)
sends in affected programs: 4596 -> 3163 (-31.18%)
helped: 446
HURT: 39
helped stats (abs) min: 1 max: 6 x̄: 3.40 x̃: 4
helped stats (rel) min: 3.03% max: 85.71% x̄: 46.48% x̃: 50.00%
HURT stats (abs)   min: 1 max: 3 x̄: 2.15 x̃: 2
HURT stats (rel)   min: 6.67% max: 25.00% x̄: 15.16% x̃: 10.53%
95% mean confidence interval for sends value: -3.13 -2.78
95% mean confidence interval for sends %-change: -44.16% -38.88%
Sends are helped.

LOST:   235
GAINED: 262

Shader-db results radeonsi (RX580):

169505 shaders in 102144 tests
Totals:
SGPRS: 7698832 -> 7696552 (-0.03 %)
VGPRS: 5547296 -> 5545280 (-0.04 %)
Spilled SGPRs: 14795 -> 14773 (-0.15 %)
Spilled VGPRs: 3782 -> 3782 (0.00 %)
Private memory VGPRs: 1152 -> 1152 (0.00 %)
Scratch size: 3872 -> 3872 (0.00 %) dwords per thread
Code Size: 162946528 -> 162895264 (-0.03 %) bytes
Max Waves: 2449334 -> 2449736 (0.02 %)

Totals from affected shaders:
SGPRS: 215024 -> 212744 (-1.06 %)
VGPRS: 151976 -> 149960 (-1.33 %)
Spilled SGPRs: 162 -> 140 (-13.58 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Private memory VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 5249916 -> 5198652 (-0.98 %) bytes
Max Waves: 54588 -> 54990 (0.74 %)

Panfrost trace checksum is updated as per discussion in:
https://gitlab.freedesktop.org/mesa/mesa/-/issues/6343

Some virpipe tess shader piglit tests are added as failures to CI
these failures are not a regression but an uncovered existing bug
exposed due to the linker no longer sorting internally facing
shader interfaces in alphabetical order. See details in:
https://gitlab.freedesktop.org/mesa/mesa/-/issues/6481

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15731>
2022-05-16 03:33:18 +00:00
Jason Ekstrand
5ef9bd5ff2 panvk: Round FillBuffer sizes down to a multiple of 4
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
2022-05-12 10:53:16 +00:00
Jason Ekstrand
ad05bc9315 panvk: Drop panvk_descriptor
The API-style representation of descriptors is no longer used by
anything so let's get rid of it.  All we really need is the data in the
descriptor set itself.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
2022-05-12 10:53:16 +00:00
Jason Ekstrand
d783f8949e panvk: Implement descriptor copies properly
All we were doing was copying panvk_descriptor structs around which
don't actually contain data that's used by anything interesting.  We
need to copy the actual data arround.  Annoyingly, that means we need a
descriptor copy function per descriptor type.  Woo!

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
2022-05-12 10:53:16 +00:00
Jason Ekstrand
f6268220c2 panvk: Set immutable samplers properly up-front
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
2022-05-12 10:53:16 +00:00
Jason Ekstrand
935fd18bc3 panvk: Rewrite the write portion of vkUpdateDescriptorSets
The new design is based on the ANV code which I massively cleaned up
some time ago.  Each descriptor type has a write function and they have
consistent prototypes.  This makes it all much easier to read and figure
out what's going on.  It also makes it easier to make changes going
forward because you aren't re-plumbing function arguments if you ever
change the type of data in any given descriptor type.  You just change
the write function.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
2022-05-12 10:53:16 +00:00
Jason Ekstrand
53f53b577f panvk: Re-arrange descriptor set functions
Put them in the order we call them which is also roughly descriptor type
enum order.

Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
2022-05-12 10:53:16 +00:00
Jason Ekstrand
28333e039c FIXUP: Use 16-bit things for texture sizes
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
2022-05-12 10:53:16 +00:00
Jason Ekstrand
38a0742f6a panvk: Implement texture/image queries
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
2022-05-12 10:53:16 +00:00
Jason Ekstrand
714e125ae4 pavnk: Pass bind layouts to texture and image descriptor helpers
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
2022-05-12 10:53:16 +00:00
Jason Ekstrand
6ed298dce7 panvk: Add an elems field to panvk_buffer_view
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
2022-05-12 10:53:16 +00:00
Jason Ekstrand
6621ab8bf9 panvk: Advertise VK_KHR_variable_pointers
Now that our SSBO descriptor handling code no longer craws deref chains
back to the variable, we should be handling variable pointers properly.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
2022-05-12 10:53:16 +00:00
Jason Ekstrand
d9f9955f9e panvk: Enable robustBufferAccess
It should already work for UBOs.  This should do everything we need for
SSBOs.  Not sure about vertex and index buffers but we can deal with
those later.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
2022-05-12 10:53:16 +00:00
Jason Ekstrand
a463c58e22 panvk: Put SSBO addresses in the descriptor buffer
Instead of storing SSBO pointers in the very limited sysval space, store
them in the UBO we've attached to the descriptor set.  This gives us a
virtually unlimited number of SSBOs.  Dynamic SSBOs still live in the
sysval space so we can update them as part of vkCmdBindDescriptorSets().
Also, the new code (based on the code in ANV) loads those SSBO addresses
in a way that never chases the deref chain back to the variable so we
should now be able to handle all of variable pointers.  The code as
written in this patch is a bit overly generic because it switches on
address modes a bit more than panvk needs but we ended up needing all
that flexibility in ANV so we may as well leave hooks for it in panvk.

Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
2022-05-12 10:53:16 +00:00
Jason Ekstrand
e265583ee1 panvk: Interleave UBOs with multiple descriptor sets
The original intention was to put all the non-dynamic UBOs first
followed by all the dynamic ones.  However, we got the calculations
wrong and, once you went above one descriptor set, things start stomping
each other.

Also, the whole strategy is a bit busted.  Vulkan pipeline layout
compatability rules say that it's ok to create a pipeline with one
layout and then bind with another so long as the bottom N descriptor set
layouts match and the pipeline uses at most N descriptors.  This means
that, while it's safe to have each subsequent set add onto a given pool
of descriptors, if you're going to combine two of those pools, you need
to be careful that the position of descriptors in set N only depends on
the layouts of sets M <= N.  The easy way to do this is to interleve
where we do the UBOs for set 0 then dynamic for set 0 then UBOs for set
1 then dynamic for set 1, etc.

Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
2022-05-12 10:53:16 +00:00
Jason Ekstrand
6d15d65e19 panvk: Put the sysval and push const UBOs at fixed indices
In theory, this may cost us a tiny bit of descriptor space but in
practice, given that the viewport transform is a sysval, we'll always
need it for 3D and given that SSBO pointers live there, we'll basically
always need it for compute.  It also makes a lot of things simpler.
We're about to start using the sysval UBO directly in our descriptor set
code and knowing the index up-front is really nice.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
2022-05-12 10:53:16 +00:00
Jason Ekstrand
744b977963 panvk: Stop calling lower_uniforms_to_ubo
We don't need it because Vulkan doesn't have GL-style uniforms.  It
*shouldn't* be doing anything but sometimes it inserts an extra UBO
binding and adds 1 to all our UBO indices for no good reason.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
2022-05-12 10:53:16 +00:00
Jason Ekstrand
c32ddb5e77 panvk: Use a flat sysvals struct
PanVK uses fewer sysvals than the GLES driver, as some data that would
be a data in GLES is instead part of the descriptor set or the pipeline
state in Vulkan. Therefore, it is simpler and more efficient to use a
flat, fixed layout provided by the driver for our sysvals, rather than
the compiler choosing a layout.

This commit switches to a flat sysval layout.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
2022-05-12 10:53:16 +00:00
Jason Ekstrand
e6091cc578 panvk: Get rid of the per-pipeline sysvals BO
This is a micro-optimization and probably not a correct one at that.
The cost involved in re-uploading the viewport is tiny compared to the
mental overhead from trying to do this juggle.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
2022-05-12 10:53:16 +00:00
Jason Ekstrand
f0a47d8602 bifrost,midgard: Allow providing a fixed sysval layout
Vulkan doesn't need nearly as many system values and would like to bake
its layout up-front instead of having it provided by the back-end
compiler.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
2022-05-12 10:53:16 +00:00
Jason Ekstrand
e07a296398 panfrost: Add some sanity checking for sysvals
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
2022-05-12 10:53:15 +00:00
Jason Ekstrand
4e60f0655a panfrost,panvk: Make fixed_sysval_ubo < 0 mean compiler-assigned
In 3559efb9bf ("panfrost: Allow passing an explicit UBO index for the
sysval UBO"), an explicit UBO index was added and it was implicitly
assumed that it would be > num_ubos.  This was convenient because it
meant 0, the default for designated initializers, implicitly meant
compiler-assigned.  However, we're about to move the sysval UBO to 0
which breaks this assumption.   Also, we don't want the back-end
compiler to even look at num_ubos since it's meaningless in Vulkan.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
2022-05-12 10:53:15 +00:00
Jason Ekstrand
42aca84704 panvk: Add a buffer to each descriptor set
Later in the series, we will map descriptor sets to driver-internal
buffers bound as UBOs. These buffers will contain various internal data,
like buffer and texture sizes. Resource access will be lowered to pull
from this UBO in the shader. To prepare, create a backing buffer when
creating descriptor set and emit a UBO record so we can bind it.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
2022-05-12 10:53:15 +00:00
Jason Ekstrand
bcea5ed2b6 panvk: Break descriptor lowering into its own file
It's about to get a lot more complicated so let's split it out.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
2022-05-12 10:53:15 +00:00
Jason Ekstrand
8af805a475 panvk: Move CreateDescriptorSetLayout to per-arch
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
2022-05-12 10:53:15 +00:00
Alyssa Rosenzweig
5cfae66cde pan/bi: Ensure the end NOP isn't eliminated
Otherwise the lowering doesn't work.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16410>
2022-05-11 21:57:13 +00:00
Alyssa Rosenzweig
6d41a28a40 pan/bi: Support atomics on Valhall
Atomics on Valhall work basically the same as on Bifrost, however the
instruction selection is simplified as there are no clauses. Support the
simplified set of atomic instructions.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16410>
2022-05-11 21:57:13 +00:00
Alyssa Rosenzweig
21900ec8b0 pan/bi: Handle shared/scratch on Valhall
There's no .seg modifier, so we have some easy lowering to do ourselves.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16410>
2022-05-11 21:57:13 +00:00
Alyssa Rosenzweig
b683a67328 pan/bi: Handle shared atomic exchange on Valhall
Need to lower the WLS into a segment addition, since the .seg modifier was
dropped on Valhall.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16410>
2022-05-11 21:57:13 +00:00
Alyssa Rosenzweig
6e2b757bce pan/bi: Preserve AXCHG.i32 destination
dEQP-GLES31.functional.image_load_store.2d.atomic.exchange_r32f_result

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16410>
2022-05-11 21:57:13 +00:00
Alyssa Rosenzweig
20f92871d8 pan/bi: Support image loads on Valhall
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16410>
2022-05-11 21:57:13 +00:00
Alyssa Rosenzweig
e53f44a4b8 pan/bi: Emit LEA_TEX on Valhall
As opposed to LEA_ATTR_TEX. In principle we could do this for Bifrost too, but
let's keep the Midgard compatible path for now.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16410>
2022-05-11 21:57:13 +00:00
Alyssa Rosenzweig
423773faa9 pan/bi: Don't analyze td on Valhall
The implementation is based on clauses, so it won't work on Valhall.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16410>
2022-05-11 21:57:13 +00:00
Jason Ekstrand
e4ad1b5b33 panvk: Advertise support for logicOp
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16309>
2022-05-11 14:47:33 +00:00
Jason Ekstrand
25249e8be2 nir/lower_blend: Expand or shrink output variables as needed
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16309>
2022-05-11 14:47:33 +00:00
Jason Ekstrand
7aec8db161 midgard: Handle FB fetch from non-vec4 output variables.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16309>
2022-05-11 14:47:33 +00:00
Jason Ekstrand
730d2b7660 nir/lower_blend: Stop passing the whole options object around
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16309>
2022-05-11 14:47:33 +00:00
Jason Ekstrand
885437d1a6 panvk: Call nir_lower_io_arrays_to_elements_no_indirects
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16309>
2022-05-11 14:47:33 +00:00
Jason Ekstrand
3c07c3e16d shader_info: Make images_used a bitset
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15988>
2022-05-10 11:23:11 -05:00
Icecream95
c65afe541b pan/mdg: Fix multiple spilt writes in the same bundle
If two instructions in a single bundle both write to a spilt
destination, then we need to reuse the fill and spill instructions,
otherwise the value will be overwritten.

This and the rest of this set of Midgard bug fixes were found from a
vertex shader in Firefox WebRender that is used when a video is
clipped, for example by setting the border-radius CSS property.

CC: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16382>
2022-05-10 13:16:50 +00:00
Icecream95
7b9c976c2d pan/mdg: Return the instruction from mir_insert_instruction_*_scheduled
We can't return a pointer to the bundle itself because it might move
about in memory.

CC: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16382>
2022-05-10 13:16:50 +00:00
Icecream95
ca2be07484 pan/mdg: Fix disassembly of store instructions
The mask does apply for store instructions, so pass it onto
print_vec_swizzle after converting it to the right format.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16382>
2022-05-10 13:16:50 +00:00
Icecream95
c750ab8a38 pan/mdg: Fix mask usage when filling before a spill
Check the bytemask against 0xFFFF rather than 0xF so that the fill is
skipped for a .xyzw write rather than a .x write.

Set the mask on the store to 0xF when doing a read so that all
components are written back.

Fixes: 31d26ebf1b ("pan/mdg: Fill from TLS before spilling non-SSA nodes")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16382>
2022-05-10 13:16:50 +00:00
Icecream95
b281843974 pan/mdg: Use MAX2 to set min_alignment
If a value is written in a vector CSEL but then written again by other
instructions, it still needs full alignment, so set min_alignment
using MAX2 to avoid ever reducing it.

Fixes: 1798f6bfc3 ("pan/midgard: Fix masks/alignment for 64-bit loads")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16382>
2022-05-10 13:16:50 +00:00
Icecream95
b1ecb90941 pan/mdg: Keep min_bound at 16 when alignment requires it
Otherwise LCRA will try to divide by zero when calculating m_max.

Fixes: 553c2cf16b ("pan/mdg: Set RA bounds for fp16")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16382>
2022-05-10 13:16:50 +00:00