Commit graph

3770 commits

Author SHA1 Message Date
Rhys Perry
69d21a3dee nir: rename fsin_r600/fcos_r600 to fsin_amd/fcos_amd
GCN has better range, but constant folding is the same.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10587>
2022-07-07 22:18:08 +00:00
Iago Toral Quiroga
84a0dca9df nir: fix documentation for uadd_carry and usub_borry opcodes
These opcodes where fixed to return an integer instead of a boolean
value some time ago but the documentation for them was not updated
and still talked about a boolean result.

Fixes: b0d4ee520 ('nir/opcodes: Fix up uadd_carry and usub_borrow')
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17372>
2022-07-07 09:16:24 +00:00
Jason Ekstrand
bfbcd966f3 nir: Use util_mask_sign_extend when serializing constants
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17214>
2022-07-06 11:23:18 +00:00
Jason Ekstrand
efc63ea02d util,nir: Move mask_sign_extend from opt_load_store_vectorize to util
While we're moving it, reformat a bit to make it match util_sign_extend
better.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17214>
2022-07-06 11:23:18 +00:00
Daniel Schürmann
862f1eacb2 nir/opt_shrink_vectors: fix re-using of components for vecN
Cc: mesa-stable
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17276>
2022-07-01 12:01:21 +00:00
Konstantin Seurer
4676b3d3dd nir: Use nir_test_mask instead of i2b(iand)
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17242>
2022-06-30 18:00:32 +00:00
Konstantin Seurer
1018d0f9c0 nir: Add a nir_test_mask helper
nir_ine_imm(b, nir_iand_imm(b, x, mask), 0) and
nir_i2b(b, nir_iand_imm(b, x, mask)) are common
patterns which become quite messy when they are
part of a larger expression. Clang-format does
not improve things either and we can end up with
some rather interesting looking code.
(RADV ray tracing pipeline and query lowering)

Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17242>
2022-06-30 18:00:32 +00:00
Boris Brezillon
5e5b54c9d1 nir/serialize: Silence integer-overflow false positive
Use util_sign_extend() to silence the following integer-overflow
error.

src/compiler/nir/nir_serialize.c:1333:40: runtime error: left shift of 1000165000 by 13 places cannot be represented in type 'int'

Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17186>
2022-06-28 09:07:32 +00:00
Boris Brezillon
370ca07482 nir/serialize: Support texop >= 16
Extend the packed_instr struct to support texops above
nir_texop_fragment_fetch_amd.

Fixes: 603e6ba972 ("nir: add two new texture ops for multisample fragment color/mask fetches")
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17186>
2022-06-28 09:07:32 +00:00
Boris Brezillon
ee536ea633 nir/serialize: Put dest last in packed_instr::tex
packed_instr::tex::dest must be last to match the packed_instr::any::dest
position.

Fixes: 35655865cb ("nir/serialize: pack instructions better")
Cc: stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17212>
2022-06-27 09:39:22 +00:00
Qiang Yu
fdf589321c ac/nir: add nir_intrinsic_load_hs_out_patch_data_offset_amd
Also add radv and radeonsi implementation. Will be used in tess lowering.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16705>
2022-06-27 02:38:21 +00:00
Jason Ekstrand
7c127ca018 nir/opt_memcpy: Add another case for function_temp
Reviewed-by: Kristian H. Kristensen <hoegsberg@gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com> (1.5 years later)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13166>
2022-06-24 19:21:26 +00:00
Jason Ekstrand
dc85065944 nir: Add an options parameter to deref_instr_has_complex_use
Reviewed-by: Kristian H. Kristensen <hoegsberg@gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com> (1.5 years later)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13166>
2022-06-24 19:21:26 +00:00
Jason Ekstrand
d6123460fd nir/opt_memcpy: lower copies to/from tightly packed types
v2: Add comment by Jason (Lionel)

Reviewed-by: Kristian H. Kristensen <hoegsberg@gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com> (1.5 years later)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13166>
2022-06-24 19:21:26 +00:00
Ian Romanick
6689fa2ab4 nir/range_analysis: Teach range analysis about fdot opcodes
This really, really helps on platforms where fabs() isn't free.  A great
many shaders use a * frsq(fabs(fdot(a, a))) to normalize a vector.
Since the result of the fdot must be non-negative, the fabs can be
eliminated by an existing algebraic rule.

shader-db results:

r300 (run on R420 - X800XL)
total instructions in shared programs: 1369807 -> 1368550 (-0.09%)
instructions in affected programs: 59986 -> 58729 (-2.10%)
helped: 609
HURT: 0

total vinst in shared programs: 512899 -> 512861 (<.01%)
vinst in affected programs: 1522 -> 1484 (-2.50%)
helped: 36
HURT: 0

total sinst in shared programs: 260690 -> 260570 (-0.05%)
sinst in affected programs: 1419 -> 1299 (-8.46%)
helped: 120
HURT: 0

total consts in shared programs: 957295 -> 957230 (<.01%)
consts in affected programs: 849 -> 784 (-7.66%)
helped: 65
HURT: 0

LOST:   0
GAINED: 3

The 3 gained shaders are all vertex shaders from XCom: Enemy Unknown.
I'm guessing that game is never going to run on my X800XL. :)

i915
total instructions in shared programs: 791121 -> 780843 (-1.30%)
instructions in affected programs: 220170 -> 209892 (-4.67%)
helped: 2085
HURT: 0

total temps in shared programs: 47765 -> 47766 (<.01%)
temps in affected programs: 9 -> 10 (11.11%)
helped: 0
HURT: 1

total const in shared programs: 93048 -> 92983 (-0.07%)
const in affected programs: 784 -> 719 (-8.29%)
helped: 65
HURT: 0

LOST:   0
GAINED: 36

Haswell, Ivy Bridge, and Sandy Bridge had similar results. (Haswell shown)
total instructions in shared programs: 16702250 -> 16697908 (-0.03%)
instructions in affected programs: 119277 -> 114935 (-3.64%)
helped: 1065
HURT: 0
helped stats (abs) min: 1 max: 20 x̄: 4.08 x̃: 4
helped stats (rel) min: 0.48% max: 10.17% x̄: 3.66% x̃: 3.94%
95% mean confidence interval for instructions value: -4.26 -3.89
95% mean confidence interval for instructions %-change: -3.76% -3.56%
Instructions are helped.

total cycles in shared programs: 880772068 -> 880734134 (<.01%)
cycles in affected programs: 2134456 -> 2096522 (-1.78%)
helped: 941
HURT: 324
helped stats (abs) min: 2 max: 2180 x̄: 123.06 x̃: 44
helped stats (rel) min: 0.04% max: 49.96% x̄: 7.08% x̃: 3.81%
HURT stats (abs)   min: 2 max: 2098 x̄: 240.33 x̃: 35
HURT stats (rel)   min: 0.04% max: 77.07% x̄: 12.34% x̃: 3.00%
95% mean confidence interval for cycles value: -47.93 -12.04
95% mean confidence interval for cycles %-change: -2.87% -1.34%
Cycles are helped.

No shader-db changes on any other Intel platform.

Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17181>
2022-06-23 18:46:27 +00:00
Ian Romanick
fd1f2d3b5a nir: Add and use algebraic property "is selection"
There are several places that should have supported the various sized
versions of bcsel and the various nir_op_[fi]csel_* opcodes.  Rather
than enumerate the whole list, add a property.

v2: Make the comment for NIR_OP_IS_SELECTION more descriptive.
Suggested by Jason.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17048>
2022-06-22 19:26:59 +00:00
Ian Romanick
a2a2fbc510 nir/algebraic: Fix NaN-unsafe fcsel patterns
For example, the proof for this pattern

    (('bcsel', ('flt', 'a@32', 0), 'b@32', 'c@32'), ('fcsel_ge', a, c, b)),

would be

    bcsel(a < 0, b, c)
    bcsel(!(a < 0), c, b)
    bcsel(a >= 0, c, b)
    fcsel_ge(a, c, b)

However, !(a < 0) => (a >= 0) is well known to produce different
results if `a` is NaN.

Instead of that replacement, use this replacement:

    bcsel(a < 0, b, c)
    bcsel(-0 < -a, b, c)
    bcsel(0 < -a, b, c)
    fcsel_gt(-a, b, c)

This is NaN-safe and exact.

Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Fixes: 0f5b3c37c5 ("nir: Add opcodes for fused comp + csel and optimizations")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17048>
2022-06-22 19:26:59 +00:00
Ian Romanick
ccd18ec4f3 nir: i32csel opcodes should compare with integer zero
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Noticed-by: Georg Lehmann <dadschoorse@gmail.com>
Fixes: 0f5b3c37c5 ("nir: Add opcodes for fused comp + csel and optimizations")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17048>
2022-06-22 19:26:59 +00:00
Mike Blumenkrantz
4830cc77cb nir/lower_point_size: apply point size clamping
point size min/max values are provided through the state vars, so ensure
these are always applied in order to respect ARB_point_parameters

cc: mesa-stable

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17145>
2022-06-22 13:27:29 +00:00
Timur Kristóf
e5970fe22a nir/lower_task_shader: don't use base index for shared memory intrinsics
Intel backend doesn't handle them very well.

Fixes: 8aff8d3dd4 ("nir: Add common task shader lowering to make the backend's job easier.")
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17143>
2022-06-22 10:32:13 +00:00
Marcin Ślusarz
49b8fffeed nir/lower_task_shader: insert barrier before/after shared memory read/write
Fixes: 8aff8d3dd4 ("nir: Add common task shader lowering to make the backend's job easier.")
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17143>
2022-06-22 10:32:13 +00:00
Marcin Ślusarz
97b53ad759 nir/opt_load_store_vectorize: handle task payloads
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17000>
2022-06-20 17:38:20 +00:00
Andres Calderon Jaramillo
a5d09d7a0a nir: Account for YUV range.
This patch expands on what commit
d8fdb8dab4 did. It adds support for
YUV-to-RGB conversions depending on the range of the YUV samples.

The conversion matrices and offsets are derived from
https://gist.github.com/yohhoy/dafa5a47dade85d8b40625261af3776a.

Tested-by: Andres Calderon Jaramillo <andrescj@chromium.org>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16651>
2022-06-17 17:25:44 +00:00
Christian Gmeiner
15f394cc7a nir: Fix unused-variable compile warnings
Fixes: 8492e78f9d ("nir/deref: Handle SSBO array bindings specially")

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17021>
2022-06-15 19:43:27 +00:00
Alejandro Piñeiro
481df13f27 nir: get res binding using component 0, instead of asssumig an uint
Needed to be able to call nir_opt_gcm on the v3dv driver. This change
is needed as on v3dv we honor vulkan resource index returning a vec2.

See commit 21b0a4c80c for more info.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16986>
2022-06-14 13:12:46 +00:00
Boris Brezillon
d9ec7df2f4 nir: Fix flat new_var assignment in create_new_io_vars()
If the type is not an array, glsl_get_length() returns 0 and we don't
update the new_vars[]/flat_vars[] entries.

Fixes: bcd14756ee ("nir/lower_io_to_vector: add flat mode")
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16960>
2022-06-10 08:06:46 +00:00
Konstantin Seurer
08577bbb70 nir/nir_lower_io: Optimize 32-bit inbounds access
Perform address calculation in 32 bits when
dealing with inbounds array derefs.

Closes: #6562
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16729>
2022-06-09 16:20:16 +00:00
Konstantin Seurer
f19cbe98e3 nir,spirv: Preserve inbounds access information
Preserving information about inbounds access and
the required bit size for the bounds will help
with avoiding 64-bit operations when lowering io.

Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16729>
2022-06-09 16:20:16 +00:00
Jason Ekstrand
4655ff1f5b nir/deref: Handle RESTRICT for SSBO deref bindings
Tested-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: M Henning <drawoc@darkrefraction.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16894>
2022-06-08 21:30:59 +00:00
Jason Ekstrand
8492e78f9d nir/deref: Handle SSBO array bindings specially
Instead of just checking for the variables to match, check that the
entire deref up to the interface type matches.

Tested-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: M Henning <drawoc@darkrefraction.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16894>
2022-06-08 21:30:59 +00:00
Jason Ekstrand
a5b1274275 nir/vars_tests: Use nir_var_mem_global instead of ssbo
We're about to add a bunch of SSBO special cases which will depend on
SSBOs always being either structs or arrays of structs.  All those
little vector SSBOs we're creating will no longer be valid.  Switch to
nir_var_mem_global to avoid this.

Cc: mesa-stable@lists.freedesktop.org
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16894>
2022-06-08 21:30:59 +00:00
Jason Ekstrand
2d221c64e7 nir: Increase nir_variable_data::mode to 16 bits
This is required if we want to have variables with nir_var_mem_global
which we will for CL eventually.  Also, they're useful in unit tests
because they're the most generic thing imaginable and can't get
eliminated by normal means.

Cc: mesa-stable@lists.freedesktop.org
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16894>
2022-06-08 21:30:59 +00:00
Jason Ekstrand
0ad2dfe942 nir/deref: Re-arrange variable checks in compare_deref_paths
Instead of having a bunch of mode checks as special cases, assert that
the modes equal and then switch on the mode.  This should make the
special cases a bit easier to understand.  Handling of `a_var == b_var`
looks redundant now but it won't be in the next patch.

Tested-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: M Henning <drawoc@darkrefraction.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16894>
2022-06-08 21:30:59 +00:00
Jason Ekstrand
130d9d80db nir/deref: Make compare_deref_paths take a stop callback
This will let us use it to compare only the first part of a pair of
deref paths and continue the comparison later.

Tested-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: M Henning <drawoc@darkrefraction.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16894>
2022-06-08 21:30:59 +00:00
Jason Ekstrand
7ebcdada00 nir/deref: Use an index in compare_deref_paths
Instead of incrementing pointers, use an integer index.  This makes it
clear that we always increment them together.  It'll also make the next
change a bit easier.  We use a pointer to an integer because the next
patch is going to let us abort the walk and we want to be able to
continue where we left off.

Tested-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: M Henning <drawoc@darkrefraction.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16894>
2022-06-08 21:30:59 +00:00
Jason Ekstrand
4d80b3217e nir/deref: Break out a helper for compare_deref_paths
Tested-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: M Henning <drawoc@darkrefraction.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16894>
2022-06-08 21:30:59 +00:00
Rhys Perry
cb5c1bcb7c nir/deref: stop assuming coherent accesses of different SSBOs may alias
Whether it's coherent should be irrelevant and the ACCESS_RESTRICT check
above should consider all cases aliasing unless NIR makes it clear they're
not.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Tested-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: M Henning <drawoc@darkrefraction.com>
Cc: mesa-stable@lists.freedesktop.org
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16894>
2022-06-08 21:30:59 +00:00
Georg Lehmann
1b68d3e43a nir/lower_tex: Add lower_array_layer_round_even option.
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16871>
2022-06-08 20:57:22 +00:00
Konstantin Seurer
16585664cd radv: vkCmdTraceRaysIndirect2KHR
This changes the trace rays logic to always use
VkTraceRaysIndirectCommand2KHR and implements
vkCmdTraceRaysIndirect2KHR. I renamed the
load_sbt_amd to sbt_base_amd and moved the SBT
load lowering from ACO to NIR.

Note that we can not just upload one pointer to
all the trace parameters because that would
be incompatible with traceRaysIndirect.

Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16430>
2022-06-08 20:20:21 +00:00
Konstantin Seurer
3aa0ea8279 nir: Handle ray_launch_size_addr in opt_preamble
Found this while working on traceRaysIndirect2.
I don't think this is relevant for now at least
since we don't use the pass in RADV.

Fixes: 938c9d9 ("nir: Add a ray launch size addr intrinsic")
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16430>
2022-06-08 20:20:21 +00:00
Konstantin Seurer
2e0e150e69 spirv: Add plumbing for ray_cull_mask
Add a new cull_mask system value that is exposed
by the ray_cull_mask capability of
SPV_KHR_ray_cull_mask.

Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16430>
2022-06-08 20:20:21 +00:00
Timur Kristóf
02c87e66e9 nir: Introduce new intrinsics for AMD specific mesh shader task ring.
The mesh shader task ring is a buffer in VRAM which we will use to
store some mesh shader outputs that don't fit into LDS.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16737>
2022-06-08 08:43:51 +00:00
Emma Anholt
5c499d6d1a nir: Fix idiv lowering on !NativeIntegers when lower_fdiv is also set.
Avoids a regression when turning off GLSL's int div lowering.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16823>
2022-06-07 02:38:42 +00:00
Timur Kristóf
f7f2770e72 ac/nir: Add remappability to tess and ESGS I/O lowering passes.
This will be used for radeonsi to map common I/O location to fixed
slots agreed by different shader stages.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16418>
2022-06-07 01:40:14 +00:00
Qiang Yu
33b4b923ee nir: add nir_intrinsic_load_lshs_vertex_stride_amd
For loading LS-HS vertex stride by shader argument in radeonsi.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16418>
2022-06-07 01:40:14 +00:00
Qiang Yu
ff8ae4e589 nir/builder: add load/store array variable helper functions
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15765>
2022-06-06 18:23:49 +00:00
Mike Blumenkrantz
06859ba69c mesa: handle atomic counter lowering for drivers with big ssbo offset aligns
according to the spec, atomic counters can be bound at any offset divisible by 4,
which means that any driver that uses the ssbo lowering pass and doesn't have
a min offset align of 4 is potentially broken

to handle this, use a statevar to inject the misaligned remainder of the offset
into the shader as a uniform. for well-aligned counter binds, the uniform offset
will be 0

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16749>
2022-06-05 23:16:36 +00:00
Alyssa Rosenzweig
dc2d8a643f nir: Export nir_io_add_intrinsic_xfb_info
This is useful for drivers which wish to consume XFB information. These
hopefully-uncontroversial hunks are extracted from the much more controversial
"st,nir,radeons: Move nir_lower_io_passes to si_nir_lower_io" by Jason.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15720>
2022-06-04 14:35:56 +00:00
Alyssa Rosenzweig
5c79d649af nir: Add transform feedback system values
These will be used to facilitate transform feedback lowering for Panfrost,
although other backends could use the sysvals in the future.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15720>
2022-06-04 14:35:56 +00:00
Timothy Arceri
44d6068c5b nir: add nir based version of the lower_const_arrays_to_uniforms pass
Doing this in NIR should give better results, but also allows us to
stop calling more GLSL IR optimisations passes.

v2: Skip 8bit and 16bit type that would require further processing
    I believe this is an existing bug in the GLSL IR pass also.

v3: rebuild constant initialisers as we want to call this pass
    after nir has already lowered them and performed optimisations.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> (v1)
Acked-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16770>
2022-06-04 03:13:36 +00:00