Commit graph

287 commits

Author SHA1 Message Date
Mark Janes
f54a65c69b intel: check setuid before writing output file in INTEL_MEASURE
Without this check, the INTEL_MEASURE environment variable could be
misused to overwrite arbitrary files.

Fixes: 0f4143ec37 ("intel: Print GPU timing data based on INTEL_MEASURE")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9166>
2021-02-20 11:53:33 -08:00
Jason Ekstrand
7c8c14a988 intel/mi_builder: Add tests for gen_mi_z and gen_mi_nz
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9116>
2021-02-18 21:28:40 +00:00
Jason Ekstrand
9145d77707 intel/mi_builder: Rewrite unit tests in terms of constant folding
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9116>
2021-02-18 21:28:40 +00:00
Jason Ekstrand
efdbe53eda intel/mi_builder: Add constant folding
This also serves as pretty clear documentation of each helper's
semantics.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9116>
2021-02-18 21:28:40 +00:00
Jason Ekstrand
dbcbb321ad intel/mi_builder: Short-circuit shifts in more cases
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9116>
2021-02-18 21:28:40 +00:00
Jason Ekstrand
c64d7aa8e3 intel/mi_builder: Fix a misleading comment
This doesn't actually assume the top 32 bits of the source value are
zero.  Instead, it does (src >> shift) & UINT32_MAX regardless of what
the top bits of src are.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9116>
2021-02-18 21:28:40 +00:00
Jason Ekstrand
40df12d4ce intel/mi_builder: Delete a bogus comment
It actually returns ~0/0.  We're about to make things more self-
documenting so we can delete the comment instead of fixing it.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9116>
2021-02-18 21:28:40 +00:00
Jason Ekstrand
749ae5af93 intel/mi_builder: Create a context in the tests
This makes them work on the simulator

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9116>
2021-02-18 21:28:40 +00:00
Rohan Garg
628c10f14e intel/genxml: Free resource before exiting
Signed-off-by: Rohan Garg <rohan.garg@collabora.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8162>
2021-02-16 15:07:52 +01:00
Mark Janes
2edfb27913 intel: combine common gather routines in INTEL_MEASURE
Anv and iris had separate, similar routines to gather intel_measure
timestamps.  Timestamps are now managed within intel_measure, allowing
those routines to be consolidated.

Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7354>
2021-02-01 17:24:57 -08:00
Mark Janes
d6fc72e286 intel: support secondary command buffers in INTEL_MEASURE
When a secondary command buffer is encountered, insert an event that
links to the new batch.

This commit leaves intel_measure timestamp buffer objects mmapped,
which is more efficient than mapping/unmapping several times.  With
the BOs mapped at all times, timestamp buffers can be managed directly
by intel_measure, where it will iterate over timestamps of linked
secondary buffers.

With timestamp buffers managed by intel_measure, a more efficient and
accurate check for render completion can be moved into intel_measure
from anv/iris.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7354>
2021-02-01 17:24:57 -08:00
Mark Janes
9eacbfaf7b intel: stop tracking submission state in INTEL_MEASURE
With secondary command buffers, it is inconvenient to track whether a
batch has been submitted and needs to be gathered.  Instead, always
check for completed snapshots before destroying a command buffer.

Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7354>
2021-02-01 17:24:57 -08:00
Mark Janes
0f4143ec37 intel: Print GPU timing data based on INTEL_MEASURE
This infrastructure collects GPU timestamps over common intervals, and
generates a CSV report to show how long rendering took.  The overhead
of collection is limited to the flushing that is required at the
interval boundaries for accurate timestamps.

By default, timing data is sent to stderr.  To direct output to a
file:
 INTEL_MEASURE=file=/tmp/measure.csv {workload}

To begin capturing timestamps at a particular frame:
 INTEL_MEASURE=file=/tmp/measure.csv,start=15 {workload}

To capture only 23 frames:
 INTEL_MEASURE=count=23 {workload}

To capture frames 15-37, stopping before frame 38:
 INTEL_MEASURE=start=15,count=23 {workload}

Designate an asynchronous control file with:
 INTEL_MEASURE=control=path/to/control.fifo {workload}

As the workload runs, enable capture for 5 frames with:

 $ echo 5 > path/to/control.fifo

Enable unbounded capture:

 $ echo -1 > path/to/control.fifo

and disable with:

 $ echo 0 > path/to/control.fifo

Select the boundaries of each snapshot with:
 INTEL_MEASURE=draw  : DEFAULT - Collects timings for every render
 INTEL_MEASURE=rt    : Collects timings when the render target changes
 INTEL_MEASURE=batch : Collects timings when batches are submitted
 INTEL_MEASURE=frame : Collects timings at frame boundaries

With INTEL_MEASURE=interval=5, the duration of 5 events will be
combined into a single record in the output.  When possible, a single
start and end event will be submitted to the GPU to minimize
stalling.  Combined events will not span batches, except in
the case of INTEL_MEASURE=frame.

Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7354>
2021-02-01 17:24:57 -08:00
Lionel Landwerlin
43acc10bd0 intel/common: store sample position in plain arrays
Allows to extract the values in different ways than just the genxml
format.

v2 (Jason Ekstrand):
 - Add a struct gen_sample_location so that we can re-use the array
   macros from the earlier commit.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1887>
2021-01-27 23:25:27 +00:00
Eleni Maria Stea
cb082d8260 anv/state: Take explicit sample locations in emit helpers
This commit adds a "locations" parameter to emit_multisample and
emit_sample_pattern which, if provided, will override the default
sample locations.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1887>
2021-01-27 23:25:27 +00:00
Kenneth Graunke
a710145b5b intel: Produce a "constrained" output from gen_get_urb_config()
When calculating a URB configuration, we start with a notion of how
much space each stage /wants/ (to achieve the maximum amount of
concurrency), but sometimes fall back to giving it less than that,
because we don't have enough space.  (Typically, this happens when
the per-stage size is large, or there are many stages, or both.)

We now output a "constrained" boolean which is true if we weren't
able to satisfy all the "wants" due to a lack of space.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8721>
2021-01-27 18:30:54 +00:00
Lionel Landwerlin
d8154c4006 intel/mi_builder: fix self modifying batches
So far we only write a maximum of 4 dwords further into the batch and
it seems just going over the CS prefetch was enough.

Turns out writing more dwords can delay the writes and we start
prefetching stuff that hasn't landed in memory yet.

This fixes the issue by stalling the CS to ensure the writes have
landed before we go over the prefetch.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 796fccce63 ("intel/mi-builder: add framework for self modifying batches")
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8525>
2021-01-15 13:26:23 +02:00
Lionel Landwerlin
359312ae01 intel/mi_builder: optimize 64bit immediate register loads & memory stores
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8525>
2021-01-15 13:26:23 +02:00
Jason Ekstrand
b7c1ad00fc intel/tools: Decode COMPUTE_WALKER
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8342>
2021-01-13 13:10:27 -08:00
Jordan Justen
231c27adaf intel/common: Build mi_builder_test for gen 12.5
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8424>
2021-01-11 13:05:49 -08:00
Michael Forney
434da21a7c meson: add missing dependency on generated git_sha1.h
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8121>
2020-12-17 00:03:22 +00:00
Rob Clark
53f7d539cd util: Add helgrind support for simple_mtx
Annoyingly mtypes.h pulls in simple_mtx, which means we end up needing
to sprinkle a lot of idep_mesautil around.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3773
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7644>
2020-11-24 21:03:34 +00:00
Jordan Justen
06cf838cbd intel/mi_builder: Support gen11 command-streamer based register offsets
Reworks:
 * Automatically apply to any register in the range 0x2000 - 0x4000

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5466>
2020-10-27 16:11:12 -07:00
Ian Romanick
1f00b0f4ef intel: Remove Gen10-specific cache config code
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6899>
2020-10-15 09:29:54 -07:00
Jason Ekstrand
f103012fad intel/batch_decoder: Don't clame vec4 vs/gs/tcs shaders on Gen11+
Because we hard-coded the default to vec4, any platform where it doesn't
have a "Dispatch Mode" field gets vec4 by default.  This includes Gen11+
where vec4 is no longer a thing.  Change the default so it works on
newer hardware.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7084>
2020-10-13 21:59:27 +00:00
Juan A. Suarez Romero
6a44bda879 intel/uuid: use git-sha1/package for the driver UUID
We can't read information from the loaded shared object because we have
different objects for Vulkan and OpenGL drivers, but we need to share
the same UUID for both.

Hence let's use SHA1 from the Git commit and package version.

v2: use also package version for the case of building from tarball (Eric)
v3: fix typos in comment (Tapani)

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Rohan Garg <rohan.garg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7025>
2020-10-07 11:11:34 +03:00
Juan A. Suarez Romero
456fa9b838 iris: plumb device/driver UUID generators
Use the same generators as used in anv driver so both Vulkan and OpenGL
drivers can share the same external memory objects.

v2: removed extra parameter from function gen_uuid_compute_device_id

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Signed-off-by: Eleni Maria Stea <estea@igalia.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Rohan Garg <rohan.garg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7025>
2020-10-07 11:11:28 +03:00
Juan A. Suarez Romero
e9a766a8c0 intel: split driver/device UUID generators
We need Vulkan and GL to produce the same UUIDs. So move the generator
from ANV to a common code that can be shared by ANV and Iris driver.

v2: fix android build (Tapani)

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Rohan Garg <rohan.garg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7025>
2020-10-07 11:11:23 +03:00
Eric Anholt
13ea7db760 mesa: Promote Intel's simple logging façade for Android to util/
I'm bringing up freedreno Vulkan on an Android phone, and my pains are
exactly what Chad said when working on Intel's vulkan for Android in
aa716db0f6 ("intel: Add simple logging façade for Android (v2)"):

    On Android, stdio goes to /dev/null. On Android, remote gdb is even
    more painful than the usual remote gdb. On Android, nothing works like
    you expect and debugging is hell. I need logging.

    This patch introduces a small, simple logging API that can easily wrap
    Android's API. On non-Android platforms, this logger does nothing
    fancy.  It follows the time-honored Unix tradition of spewing
    everything to stderr with minimal fuss.

    My goal here is not perfection. My goal is to make a minimal, clean API,
    that people hate merely a little instead of a lot, and that's good
    enough to let me bring up Android Vulkan.  And it needs to be fast,
    which means it must be small. No one wants to their game to miss frames
    while aiming a flaming bow into the jaws of an angry robot t-rex, and
    thus become t-rex breakfast, because some fool had too much fun desiging
    a bloated, ideal logging API.

Compared to trusty fprintf, _mesa_log[ewi]() is actually usable on
Android.  Compared to os_log_message(), this has different error levels
and supports format arguments.

The only code change in the move is wrapping flockfile/funlockfile in
!DETECT_OS_WINDOWS, since mingw32 doesn't have it.  Windows likely wants
different logging code, anyway.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6806>
2020-09-28 09:14:44 -07:00
Lionel Landwerlin
320d80f2ce intel/genxml: make sure test assert are compiled in
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Anuj Phogat anuj.phogat@gmail.com
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6678>
2020-09-15 06:14:34 +00:00
Nanley Chery
80a8bb590a intel/common: Drop unused gen_aux_map_add_image
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6486>
2020-09-09 20:02:03 +00:00
Nanley Chery
1ddb1a6cf9 intel/common: Add get_aux_map_format_bits()
Add a function suitable for planar YUV surfaces. For these surfaces,
drivers remap each plane to an RGB-formatted surface. Enable drivers to
pass the plane index and the original YUV format to get the right
aux-map format bits.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6486>
2020-09-09 20:02:03 +00:00
Jason Ekstrand
272ab2823d intel/eu: Include brw_compiler.h in brw_eu.h
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6244>
2020-09-02 19:48:44 +00:00
Jason Ekstrand
372774367c intel/compiler: Get rid of struct gen_disasm
It's just a container around a devinfo.  The one useful purpose it did
serve is that gen_disasm_create initialized the compaction table
singletons.  Now that those no longer exist, this isn't necessary.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6244>
2020-09-02 19:48:44 +00:00
Jason Ekstrand
54ba0daa28 intel/compiler: Get rid of the global compaction table pointers
With discrete GPUs, it's going to be possible to have GPUs from two
different hardware generations in the machine at the same time.  Global
singletons like this aren't going to fly.  Have a struct containing the
pointers which gets initialized once per shader disassemble instead.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6244>
2020-09-02 19:48:44 +00:00
Danylo Piliaiev
bc4a127d6e intel/disasm: Label support in shader disassembly for UIP/JIP
Shader instructions which use UIP/JIP now get formatted with a label
in addition with immediate value, labels have "LABEL%d" format.

v2: - Consider brw_jump_scale when calculating label's offset

From: "Lonnberg, Toni" <toni.lonnberg@intel.com>
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4245>
2020-09-02 10:33:29 +00:00
Rafael Antognolli
86617c08cc intel/l3: Return the URB size from devinfo for DG1
We don't have any URB size set in the L3 config, since it's a fixed
value now. So just return the value that we know from gen_device_info.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4956>
2020-06-22 11:42:00 -07:00
Anuj Phogat
3daa866751 intel/l3: Add DG1 L3 configuration
Reworks:
 * Jordan: Make DG1 L3 config table empty

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4956>
2020-06-22 11:41:59 -07:00
Jordan Justen
6054b24f58 intel/l3: Allow platforms to have no l3 configurations
On some gen12 platforms we will use the L3FullWayAllocationEnable and
never reconfigure the L3 setup.

Suggested-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4956>
2020-06-22 11:41:59 -07:00
Jordan Justen
49fe43e15f intel/l3: Don't rely on cfg entry URB size being 0 as a sentinal
An example entry with URB size being 0 is in the cnl list.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4956>
2020-06-22 11:41:59 -07:00
Dylan Baker
a8e2d79e02 meson: use gnu_symbol_visibility argument
This uses a meson builtin to handle -fvisibility=hidden. This is nice
because we don't need to track which languages are used, if C++ is
suddenly added meson just does the right thing.

Acked-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4740>
2020-06-01 18:59:18 +00:00
Lionel Landwerlin
796fccce63 intel/mi-builder: add framework for self modifying batches
v2: Use Jason's idea to store addresses to modify

v3: Add ALU flushes (Jason)

v4: Remove ALU flush from gen_mi_self_mod_barrier() (Jason)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> (v2)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2775>
2020-05-20 14:02:27 +03:00
Ian Romanick
ceae09da15 intel: Silence unused parameter warning in __intel_log_use_args
...in every file that includes intel_log.h.

In file included from src/intel/vulkan/anv_private.h:93,
                 from src/intel/vulkan/genX_cmd_buffer.c:27:
src/intel/common/intel_log.h: In function ‘__intel_log_use_args’:
src/intel/common/intel_log.h:75:34: warning: unused parameter ‘format’ [-Wunused-parameter]

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4994>
2020-05-14 16:47:08 +00:00
Dave Airlie
b2164320a0 i965: add support for gen 5 pipelined pointers to dump
I wanted to see inside these, so added support to the dumper.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4846>
2020-05-03 05:47:16 +10:00
Kenneth Graunke
615270502c intel: Move anv_gem_supports_syncobj_wait to common code.
This will let me use this in iris.

We leave the existing anv function for anv_gem_stubs.c faking, but
move the contents to a helper in a new src/intel/common/gen_gem.c file.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3802>
2020-05-01 19:00:02 +00:00
Albert Astals Cid
06c5875fd6 Fix promotion of floats to doubles
Use the f variants of the math functions if the input parameter is a
float, saves converting from float to double and running the double
variant of the math function for gaining no precision at all

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3969>
2020-04-18 19:55:45 +00:00
Jason Ekstrand
029471c3c4 intel/batch_decoder: Stop printing to stdout
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4597>
2020-04-16 17:26:16 +00:00
Eric Engestrom
8970b7839a intel: drop unused include directories
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4360>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4360>
2020-03-28 21:36:54 +01:00
Eric Engestrom
79af30768d meson: inline inc_common
Let's make it clear what includes are being added everywhere, so that
they can be cleaned up.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4360>
2020-03-28 21:36:54 +01:00
Lionel Landwerlin
25a54554b3 intel/decoder: don't consider header fields past dword0
v2: use ULL

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4134>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4134>
2020-03-18 09:19:53 +00:00