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Author SHA1 Message Date
Georg Lehmann
6ac576ceb0 radv/ci: update trace checksums 
Single pixel differences that are indistinguishable to my eyes.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28676>
 2024-09-06 09:16:21 +00:00
Timur Kristóf
6e000d2817 radv: Determine linked I/O info after nir_opt_varyings. 
This makes it possible to not allocate I/O space
(such as LDS or VRAM) for I/O slots that were eliminated
by nir_opt_varyings.

Fossil DB stats on Rembrandt:

Totals from 896 (1.13% of 79395) affected shaders:
MaxWaves: 19452 -> 19488 (+0.19%)
Instrs: 443693 -> 443711 (+0.00%); split: -0.01%, +0.01%
CodeSize: 2331788 -> 2330904 (-0.04%); split: -0.04%, +0.01%
VGPRs: 43088 -> 42992 (-0.22%)
Inputs: 10344 -> 9198 (-11.08%)
Outputs: 7991 -> 6845 (-14.34%)
LDS: 3537408 -> 3184128 (-9.99%)
Latency: 1636786 -> 1636899 (+0.01%); split: -0.01%, +0.01%
InvThroughput: 359066 -> 358825 (-0.07%); split: -0.08%, +0.01%
VClause: 12106 -> 12109 (+0.02%); split: -0.02%, +0.05%
SClause: 6770 -> 6766 (-0.06%); split: -0.07%, +0.01%
Copies: 26532 -> 26540 (+0.03%); split: -0.02%, +0.05%
PreVGPRs: 32345 -> 32342 (-0.01%); split: -0.01%, +0.00%
VALU: 288476 -> 288501 (+0.01%); split: -0.00%, +0.01%
SALU: 44527 -> 44530 (+0.01%); split: -0.00%, +0.01%

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28676>
 2024-09-06 09:16:21 +00:00
Timur Kristóf
17f6ab28cc radv: Add new linking step and use nir_opt_varyings. 
The nir_opt_varyings pass is the new NIR solution for shader
linking, with new features including better I/O compaction,
packing 16-bit I/O, inter-stage code motion and more.

Fossil DB stats on Rembrandt:

Totals from 34585 (43.56% of 79395) affected shaders:
MaxWaves: 873362 -> 873260 (-0.01%); split: +0.11%, -0.12%
Instrs: 21543639 -> 21526956 (-0.08%); split: -0.27%, +0.19%
CodeSize: 115077568 -> 115015536 (-0.05%); split: -0.25%, +0.20%
VGPRs: 1465152 -> 1464192 (-0.07%); split: -0.29%, +0.22%
Inputs: 161776 -> 158711 (-1.89%); split: -1.90%, +0.00%
Outputs: 46532551993 -> 46532548680 (-0.00%); split: -0.00%, +0.00%
LDS: 70597120 -> 70794752 (+0.28%); split: -0.04%, +0.32%
Latency: 162963576 -> 162785055 (-0.11%); split: -0.25%, +0.14%
InvThroughput: 37356298 -> 37261700 (-0.25%); split: -0.37%, +0.12%
VClause: 427827 -> 427105 (-0.17%); split: -0.35%, +0.18%
SClause: 669989 -> 668623 (-0.20%); split: -0.36%, +0.15%
Copies: 1582166 -> 1582592 (+0.03%); split: -0.36%, +0.39%
Branches: 523203 -> 523789 (+0.11%); split: -0.04%, +0.15%
PreSGPRs: 1272992 -> 1273228 (+0.02%); split: -0.05%, +0.07%
PreVGPRs: 1164295 -> 1161623 (-0.23%); split: -0.43%, +0.20%
VALU: 13733432 -> 13714109 (-0.14%); split: -0.35%, +0.21%
SALU: 2828974 -> 2831841 (+0.10%); split: -0.12%, +0.22%
VMEM: 748396 -> 748500 (+0.01%); split: -0.16%, +0.18%
SMEM: 1263487 -> 1263329 (-0.01%); split: -0.03%, +0.02%

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28676>
 2024-09-06 09:16:21 +00:00
Timur Kristóf
fcb2c62b63 radv: Add NIR XFB IO intrinsic info to legacy stages not just NGG. 
Some NIR passes (such as nir_opt_varyings) rely on having the
XFB info in explicit I/O intrinsics. If we want to use those,
we need to add this info.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28676>
 2024-09-06 09:16:21 +00:00
Timur Kristóf
79df320463 ac/nir: Move varying cost functions from radeonsi to common code. 
This code will be shared between RADV and RadeonSI.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28676>
 2024-09-06 09:16:21 +00:00
Samuel Pitoiset
5fd3be6f1b radv: stop relying on the VS for emitting VBO descriptors in DGC 
This is required for experimenting indirect graphics pipelines with DGC.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31040>
 2024-09-06 07:04:59 +00:00
Samuel Pitoiset
53c760c388 radv: pass vb_desc_usage_mask in radv_dgc_params 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31040>
 2024-09-06 07:04:59 +00:00
Samuel Pitoiset
4bd4f037b5 radv: emit all VBO descriptors in the prepare DGC shader 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31040>
 2024-09-06 07:04:59 +00:00
Samuel Pitoiset
8397e15019 radv: use radv_vbo_info for emitting descriptors with DGC 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31040>
 2024-09-06 07:04:59 +00:00
Samuel Pitoiset
a1646f468d radv: compute rsrc3 for VBO descriptors in NIR for DGC 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31040>
 2024-09-06 07:04:59 +00:00
Samuel Pitoiset
91fdce3f5a radv: add a helper to get VBO info for emitting descriptors 
This will be used to rework VBO in DGC.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31040>
 2024-09-06 07:04:59 +00:00
Timur Kristóf
4d5bc893b4 ac/nir/tess: Remove no_inputs_in_lds. 
When there are no VS outputs, we expect that the drivers set
the LS-HS vertex stride to zero, which will produce the
same result as no_inputs_in_lds did.

Remove the unnecessary code path from the output lowering.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30962>
 2024-09-05 19:54:29 +00:00
Marek Olšák
52c41f25de ac/nir/tess: don't allocate LDS for HS inputs that are passed via VGPRs 
Right now we don't allocate LDS for HS inputs when all HS inputs are passed
via VGPRs.

This changes it to skip allocating exactly the HS inputs passed via VGPRs
by reducing the inputs_read mask to remove holes.

radeonsi changes to the LDS allocation will be in a different MR.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30962>
 2024-09-05 19:54:29 +00:00
Samuel Pitoiset
165c026161 radv: add a helper to write a single vertex descriptor with DGC 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31018>
 2024-09-05 10:29:55 +00:00
Samuel Pitoiset
374abea26b radv: pass use_per_attribute_vb_descs in radv_dgc_params 
This is more like a shader metadata parameter.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31018>
 2024-09-05 10:29:55 +00:00
Samuel Pitoiset
955f148db1 radv: specialize one more VBO parameter with DGC 
This covers the case when unused VBO bindings are defined with DGC.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31018>
 2024-09-05 10:29:55 +00:00
Samuel Pitoiset
e99ea580f7 radv: fix missing attribute offset with dynamic VS inputs and DGC 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31018>
 2024-09-05 10:29:55 +00:00
Mike Blumenkrantz
cd7ad7bd7e vk: rename DGC feature to DGC-NV 
this is an NV extension, so it should have NV suffix

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31015>
 2024-09-04 12:27:21 +00:00
Samuel Pitoiset
63112e79ac radv: use compute pipeline metadata for non-indirect DGC pipelines 
The idea is to better abstract loading shader metadata parameters by
using the same layout for indirect/non-indirect compute pipelines.

Graphics support will added later.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30987>
 2024-09-04 06:50:38 +00:00
Samuel Pitoiset
9a07b8fa1c radv: store the indirect compute pipeline VA to dgc_cmdbuf 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30987>
 2024-09-04 06:50:38 +00:00
Samuel Pitoiset
81ec193e1b radv: specialize dispatch initiator for compute/task shaders with DGC 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30987>
 2024-09-04 06:50:38 +00:00
Samuel Pitoiset
fbb1ed66e4 radv: stop storing DGC info as part of the VBO descriptors 
This is no longer needed and it's possible to just load&store the
bindings that aren't updated by DGC.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30918>
 2024-09-04 06:17:37 +00:00
Samuel Pitoiset
57aa34a30d radv: pass more VBO info as parameters to the DGC prepare shader 
Instead of storing the stride/rsrc_word3 as part of the VBO descriptors,
pass them as parameters. This is cleaner and this will allow us
to simplify VBO in DGC.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30918>
 2024-09-04 06:17:37 +00:00
Rhys Perry
192ef947a9 aco: fix printing of d16 MIMG dmask 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30761>
 2024-09-03 21:14:27 +00:00
Rhys Perry
999362f895 aco: have get_subdword_definition_info update DefInfo 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30761>
 2024-09-03 21:14:27 +00:00
Rhys Perry
16ff51bb37 aco/ra: use DefInfo for get_reg_specified 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30761>
 2024-09-03 21:14:27 +00:00
Rhys Perry
1e6741bf6b aco/ra: fix sub-dword get_reg_specified in some cases 
For example, v6b MIMG can have sdw_def_info={4, 6}. This now has similar
behaviour as the DefInfo constructor.

fossil-db (navi31):
Totals from 5 (0.01% of 79395) affected shaders:
CodeSize: 29460 -> 29408 (-0.18%); split: -0.29%, +0.11%
Latency: 22133 -> 21934 (-0.90%); split: -2.51%, +1.61%
InvThroughput: 2953 -> 2963 (+0.34%); split: -0.03%, +0.37%
Copies: 410 -> 409 (-0.24%); split: -1.95%, +1.71%
VALU: 3242 -> 3241 (-0.03%); split: -0.25%, +0.22%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: 56345b8c61 ("aco: allow reading/writing upper halves/bytes when possible")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30761>
 2024-09-03 21:14:27 +00:00
Caio Oliveira
74be809237 compiler: Allow derivative_group to be used for all stages in shader_info 
These will now also be used by stages that have workgroups.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30950>
 2024-09-03 20:03:18 +00:00
Martin Roukala (né Peres)
9b4e46e8fc radv/ci: update the flakes lists 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30973>
 2024-09-03 12:50:01 +00:00
Samuel Pitoiset
0dc2a5bfee radv: pass the vertex shader to radv_write_vertex_descriptors() 
Mostly for DGC.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30916>
 2024-09-03 11:39:47 +00:00
Samuel Pitoiset
bd5dca3e81 radv: rename radv_vs_input_state to radv_vertex_input_state 
"vs_state" is confusing because it could be "Vertex Shader state" but
it's not.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30916>
 2024-09-03 11:39:47 +00:00
Samuel Pitoiset
b3834b7dcd radv: bind the static vertex input state from the pipeline 
This removes one more pipeline dependency when writing VBO descriptors.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30916>
 2024-09-03 11:39:47 +00:00
Samuel Pitoiset
aea6cec434 radv: add radv_vs_input_state::attrib_index_offset 
This is only used with static strides and it will allow us to bind
the static vertex input state from the pipeline.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30916>
 2024-09-03 11:39:47 +00:00
Samuel Pitoiset
dd673269e4 radv: only initialize per-attribute vertex input state when needed 
The vertex shader uses per attribute VBO descriptors only when it uses
a prolog or when robustness is enabled.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30916>
 2024-09-03 11:39:47 +00:00
Samuel Pitoiset
4c181c33cc radv: return early when the vertex input state is dynamic 
state->vi is set to NULL by the vulkan runtime when the state is
dynamic.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30916>
 2024-09-03 11:39:47 +00:00
Georg Lehmann
9bb10b58f3 aco: use v_cvt_pk_u8_f32 for f2u8 
Foz-DB Navi31:
Totals from 42 (0.05% of 79395) affected shaders:
Instrs: 3253747 -> 3248867 (-0.15%); split: -0.15%, +0.00%
CodeSize: 16690136 -> 16661772 (-0.17%); split: -0.17%, +0.00%
VGPRs: 4176 -> 4128 (-1.15%)
Latency: 18485157 -> 18479752 (-0.03%); split: -0.03%, +0.00%
InvThroughput: 3659404 -> 3658222 (-0.03%); split: -0.03%, +0.00%
Copies: 231891 -> 228145 (-1.62%)
VALU: 1785800 -> 1782054 (-0.21%)

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29532>
 2024-09-02 19:49:20 +00:00
Daniel Schürmann
6ada0170c4 aco/ra: use arena allocator for hash maps 
Also change Key types to uint32_t instead of unsigned.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30898>
 2024-09-02 15:31:52 +00:00
Daniel Schürmann
709f60e71d aco/ra: use auto for std container iterators 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30898>
 2024-09-02 15:31:52 +00:00
Daniel Schürmann
534031761a aco/ra: avoid rename map lookups in most cases 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30898>
 2024-09-02 15:31:52 +00:00
Daniel Schürmann
72464e24b4 aco/ra: add add_rename() helper 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30898>
 2024-09-02 15:31:51 +00:00
Georg Lehmann
8f3bb1fb2e aco/ra: always reuse def register for literal copy 
Foz-DB Vega10:
Totals from 4056 (6.43% of 63053) affected shaders:
Instrs: 5540797 -> 5540760 (-0.00%); split: -0.00%, +0.00%
CodeSize: 29680912 -> 29680812 (-0.00%); split: -0.00%, +0.00%
SGPRs: 307808 -> 307680 (-0.04%)
Latency: 82483179 -> 82484437 (+0.00%); split: -0.00%, +0.00%
InvThroughput: 45546645 -> 45547091 (+0.00%); split: -0.00%, +0.00%
SClause: 185641 -> 185648 (+0.00%); split: -0.00%, +0.01%
Copies: 642229 -> 642214 (-0.00%); split: -0.01%, +0.01%
SALU: 643132 -> 643107 (-0.00%); split: -0.01%, +0.01%

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30932>
 2024-09-02 11:09:55 +00:00
Georg Lehmann
5fb54d1fde aco/ra: fix copying 64bit literal to sgprs 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30932>
 2024-09-02 11:09:55 +00:00
Georg Lehmann
364764356c aco/ra: use parallelcopy to copy literal instead of s_mov 
This can result in smaller code size.

Foz-DB Vega10:
Totals from 4745 (7.53% of 63053) affected shaders:
CodeSize: 33014176 -> 33007088 (-0.02%); split: -0.02%, +0.00%
Copies: 690055 -> 704738 (+2.13%)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30932>
 2024-09-02 11:09:55 +00:00
Georg Lehmann
607cf5a8e9 aco/ra: unconditionally replace literal with sgpr when promoting to VOP3 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30932>
 2024-09-02 11:09:55 +00:00
Samuel Pitoiset
8873382703 radv: fix emitting DGC indirect draws with drawid/base_instance 
This fixes test_execute_indirect_state_vbo_offsets, a new vkd3d-proton
test.

The drawid/base_instance bits were cleared by mistake.

Fixes: e59a16bbb8 ("radv: use an indirect draw when IBO isn't updated as part of DGC")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30971>
 2024-09-02 09:58:32 +00:00
Samuel Pitoiset
e4e789ce10 radv: allow VK_EXT_legacy_vertex_attributes with DGC 
Dynamic vertex input state is supported with DGC but it wasn't at the
time this extension has been introduced.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30957>
 2024-09-02 09:09:07 +00:00
Collabora's Gfx CI Team
b32b15f0df Uprev Piglit to 93b4bd2e0aaab1c22ae3e1a23f9e057a8f7451b2 
a3826de3c2...93b4bd2e0a

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30863>
 2024-09-02 08:30:51 +00:00
Samuel Pitoiset
45319cb253 radv: specialize push constant stages with DGC 
Even if the layout declares using push constant for more stages than
needed, upload_sgpr/inline_sgpr will prevent the DGC prepare shader to
emit them because it's initialized to 0.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30924>
 2024-08-30 18:02:23 +00:00
Samuel Pitoiset
8c5358040d radv: move emitting VBOs with DGC 
Only for graphics.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30924>
 2024-08-30 18:02:22 +00:00
Samuel Pitoiset
2234e6d75a radv: add a helper to store data to the DGC upload space 
The offset is automatically incremented when something is stored.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30924>
 2024-08-30 18:02:22 +00:00