Commit graph

140 commits

Author SHA1 Message Date
Alyssa Rosenzweig
62497d4860 util/prim_convert: Don't set index_bounds_valid
draw->index_bounds_valid tells drivers that the values of min_index/max_index
are set correctly and can be used e.g. to allocate memory for varyings. If set
incorrectly, the GL promises badness.

But, with primconvert, we go mucking with index buffers and then never update
the bounds. So it doesn't matter if the original index bounds were valid, we
can't promise the original bounds are *still* valid. If we were trying to
optimize CPU overhead, we could try to preserve the new min/max index but seeing
as only older Mali cares about this flag, and if you're using primconvert you're
already screwed, I'm not too inclined to go rework primconvert.

Fixes* page faults in primitive-restart-draw-mode on Mali-G52 for GL_QUAD_STRIPS
and GL_POLYGON, which hit the primconvert path. The full dmesg splat looks like:

[ 5438.811727] panfrost ffe40000.gpu: Unhandled Page fault in AS0 at VA 0x000000100A16BAC0
             Reason: TODO
             raw fault status: 0x25002C1
             decoded fault status: SLAVE FAULT
             exception type 0xC1: TRANSLATION_FAULT_1
             access type 0x2: READ
             source id 0x250

Notice that a high bit is randomly set in the address, this is trying to read
a varying from the actual varying buffer in the vicinity of 0xa16bac0. What's
actually happening is that we're trying to read index #0 despite promising the
driver a minimum index of 2, causing an integer underflow as we try to read
index -2, or as the hardware sees, 4294967294.

As long as we stop lying to panfrost about the bounds being correct, panfrost is
able to calculate the real (post-primconverted) bounds on its own, fixing the
test.

* Alternatively, maybe Panfrost should just ignore this bit, in which I don't
  know why we have it in Gallium, since it's probably not conformant to fault on
  out-of-range glDrawRangeElements.

Fixes: 72ff53098c ("gallium: add pipe_draw_info::index_bounds_valid")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21891>
2023-03-14 23:10:00 +00:00
Daniel Stone
95e8be29a7 ci/panfrost: Add texturesize flake seen in the wild
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20887>
2023-03-13 18:28:15 +00:00
David Heidelberg
84767a5160 ci/lava: every LAVA job doesn't want to run gles2 deqp, drop it
Very annoying when adding new job and not getting failure due to missing
`DEQP_VER: `

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21702>
2023-03-11 14:48:20 +00:00
David Heidelberg
8cdbb894ca ci/panfrost: correct the job name, as it runs on gles2
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21702>
2023-03-11 14:48:20 +00:00
Daniel Stone
50378f59a7 ci: Actually run Piglit on LAVA
At some point in a refactoring long ago, our 'Piglit' runs on arm64
started actually being dEQP-GLES2 runs. Oh dear.

Surprisingly, there are a number of expectation changes; added every
fail I saw from a long overnight stress test.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21851>
2023-03-11 11:58:30 +00:00
Eric Engestrom
eae5aa943a panfrost/ci: add EGL tests
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21504>
2023-03-03 10:14:29 +00:00
Emma Anholt
f6c06ef2f6 ci: Add manual rules variations to disable irrelevant driver jobs.
If you're only affecting one or a couple of drivers, it would be nice if
your pipeline buttons on the web UI weren't full of manual run buttons for
all the other drivers.

This is a bunch of duplicated lines, but less than it could have been now
that we have !references.

In some of these cases (i915g, nouveau, etnaviv), we have no non-manual
jobs for those drivers, so I could have just rewritten the original
"driver-rules" to "driver-manual-rules".  I decided to keep things
consistent between drivers, though, because this is all esoteric enough to
readers already without making different drivers' rules look different.

Fixes: #4891
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17445>
2023-01-26 00:48:19 +00:00
Emma Anholt
849af68dbd ci/piglit: Add some common piglit skips for Mesa CI's testing of glx.
Since our X servers don't have a compositor, and we run tests in parallel,
various swap and frontbuffer tests won't ever be stable.  Rather than
having every driver have to track those flakes, make a general X11 skips
list as a known issue of our CI rather than pointing fingers at drivers.

Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Martin Roukala <martin.roukala@mupuf.org>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20798>
2023-01-24 00:13:02 +00:00
Alyssa Rosenzweig
9cd6d0873d panfrost: Remove experimental v7-only indirect draw path
There are too many problems with indirect draws on v7 that we never got this
code path to the finish line, and none of us have a good plan (or reason) to fix
this. Proper indirect draws are only possible since v10 on Mali.

There was interest in using this path to implement indexed draws in PanVK, that
MR is stalled and it's not clear how much sense it makes to do Vulkan on
anything older than v9 or v10 at this point. This code isn't *gone*, it'll still
be in git history, but I don't see a lot of reason in keeping it in tree if it's
unused and complicating e.g. the sysval upload path of the driver.

Indirect dispatch remains supported on v7, as that path *is* working and flipped
on for end users. Indirect dispatch on v7 is considerably less complicated than
indirect draws.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20420>
2022-12-23 16:27:16 +00:00
Alyssa Rosenzweig
976405907e pan/mdg: Emulate 8-bit with the 16-bit pipe
We don't care to support i8vec16, we just need a bit of 8-bit support to
implement format packing/unpacking in blend shaders. We're already doing
this by using the 16-bit pipe, we just need to commit to it all the way
-- reporting the correct sizes in max_bitsize_for_alu so the mask
packing logic works as intended -- and dropping the imov-specific hack
that was introduced to workaround a similar class of bugs.

With the previous patch, fixes:

   dEQP-GLES31.functional.draw_buffers_indexed.random.max_required_draw_buffers.1

Fixes: 39e4b7279d ("pan/midg: Fix swizzling on 8-bit sources")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19763>
2022-12-01 00:52:53 +00:00
Martin Roukala (né Peres)
0cee008fee Revert "glx: Fix drawable refcounting for naked Windows"
This reverts commit 768238fdc0 which
is not only leading to memory leaks, but also reportedly breaks KDE
pretty badly.

Fixes: #7674, #7435
Acked-by: Michel Dänzer <mdaenzer@redhat.com>
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Acked-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19972>
2022-11-25 20:08:45 +00:00
David Heidelberg
17aea35c44 ci/panfrost: drop glmark2 traces, useless
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19838>
2022-11-18 14:42:32 +00:00
Benjamin Tissoires
67cee534a8 CI: convert to use the new S3 server instead of the legacy minio
We don't need to login anymore, but we can't use plain minio commands
now. `ci-fairy` got a helper as `s3cp` to keep an almost identical
API.

Signed-off-by: Benjamin Tissoires <benjamin.tissoires@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19076>
2022-11-04 11:41:42 +00:00
Alyssa Rosenzweig
d0281fc16a pan/mdg: Use bifrost_nir_lower_store_component
Move the pass from the Bifrost compiler to the Midgard/Bifrost common code
directory, and take advantage of it on Midgard, where it fixes the same
tests as it fixed originally on Bifrost.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19363>
2022-11-02 16:52:11 +00:00
Alyssa Rosenzweig
3a9cdd780d panfrost/ci: Disable trace-based testing
Trace-based testing has not worked for Panfrost. It was a neat
experiment, and I'm glad we tried it, but the results have been mostly
negative for the driver. Disable the trace-based tests.

For testing that specific API features work correctly, we run the
conformance tests (dEQP), which are thorough for OpenGL ES. For big GL
features, we run Piglit, and if there are big GL features that we are
not testing adequately, we should extend Piglit for these. For
fine-grained driver correctness, we are already covered.

Where trace-based testing can fit in is as a smoke test, ensuring that
the overall rendering of complex scenes does not regress. In principle,
that's a lovely idea, but the current implementation has not worked out
for Panfrost thus far. The crux of the issue is that the trace based
tests are based on checksums, not fuzzy-compared reference images. That
requires updating checksums any time rendering changes. However, a
rendering change to a trace is NOT a regression. The behaviour of OpenGL
is specified very loosely. For a given trace, there are many different
valid checksums. That means that correct changes to core code frequently
fail CI after running through the rest of CI, only because a checksum
changed in a still correct way. That's a pain to deal with, exacerbated
by rebase pains, and provides negative value to the project. Some recent
examples of this I've hit in the past two weeks alone:

   panfrost: Enable rendering to 16-bit and 32-bit
   4b49241f7d ("panfrost: Use proper formats for pntc varying")
   ac2964dfbd ("nir: Be smarter fusing ffma")

The last example were virgl traces, but were especially bad: due to a
rebase fail, I had to update traces /twice/, wasting two full runs of
pre-merge CI across *all* hardware. This was extremely wasteful.

The value of trace-based testing is as a smoke test to check that traces
still render correctly. That is useful, but it turns out that checksums
are the wrong way to go about it. A better implementation would be
storing only a single reference image from a software rasterizer per
trace. No driver-specific references would be stored. That reference
image must never change, provided the trace never changes. CI would then
check rendered results against that image with tolerant fuzzy
comparisons. That tolerance matches with the fuzzy comparison that the
human eye would do when investigating a checksum change anyway. Yes, the
image comparison JavaScript will now report that
0 pixels changed within the tolerance, but there's nothing a human eye
can do with that information other than an error prone copypaste of new
checksums back in the yaml file and kicking it back to CI, itself a
waste of time.

Finally, in the time we've had trace-based testing alongside the
conformance tests, I cannot remember a single actual regression in one
of my commits the trace jobs have identified that the conformance tests
have not also identified. By contrast, the conformance test coverage has
prevented the merge of a number of actual regressions, with very few
flakes or xfail changes, and I am grateful we have that coverage. That
means the value added from the trace jobs is close to zero, while the
above checksum issues means that the cost is tremendous, even ignoring
the physical cost of the extra CI jobs.

If you work on trace-based testing and would like to understand how it
could adapted to be useful for Panfrost, see my recommendations above.
If you work on CI in general and would like to improve Panfrost's CI
coverage, what we need right now is not trace-based testing, it's
GLES3.1 conformance runs on MediaTek MT8192 or MT8195. That hardware is
already in the Collabora LAVA lab, but it's not being used for Mesa CI
as the required kernel patches haven't made their way to mainline yet
and nobody has cherry-picked them to the gfx-ci kernel. If you are a
Collaboran and interested in improving Panfrost CI, please ping
AngeloGioacchino for information on which specific patches need to be
backported or cherry-picked to our gfx-ci kernel. Thank you.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Acked-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19358>
2022-10-29 18:23:55 +00:00
Alyssa Rosenzweig
4b49241f7d panfrost: Use proper formats for pntc varying
The formats of special attributes are supposed to match their architectural
definitions, and point coordinates are architecturally defined as RGBA32F. In
practice this doesn't seem to fix anything.

Cc: mesa-stable
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19237>
2022-10-26 01:56:08 +00:00
David Heidelberg
2b750cacd7 ci/panfrost: re-enable traces on t760
Also make a note, why we don't run gles2 piglit.

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19211>
2022-10-24 21:24:46 +00:00
David Heidelberg
c6f575f663 ci/panfrost: Humus Portal trace got fixed, update checksum
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19211>
2022-10-24 21:24:46 +00:00
David Heidelberg
9ba7164d2f ci/panfrost: enable piglit-gl on g52 again and deparalelize
The job fits into 15 minutes of runtime, so deparalelize.

Stress-tested.

Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19211>
2022-10-24 21:24:46 +00:00
David Heidelberg
b970e25890 ci/panfrost: deduplicate gitlab-ci.yml
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19211>
2022-10-24 21:24:46 +00:00
Alyssa Rosenzweig
2c446b6636 pan/mdg: Limit work registers for large workgroups
When more than 8 registers are used, Midgard can only fit 64 threads in a
thread group. For barriers to work properly, a threadgroup must fit an entire
work group. The GL driver configures the hardware to have threadgroups the size
of work groups. That means if more than 64 threads are used in a workgroup, and
more than 8 registers are used, the hardware will fault spawning threads.

To workaround this hardware limitation, we need to limit the number of work
registers used depending on the size of the workgroup. Typically, the work group
size is known at compile-time so that determination can usually be made without
variants. To avoid variants, we make a pessimistic estimate in the case when
it's not known at compile-time.

shader-db shows 6 shaders affected. I expect that all of these would fault with
DATA_INVALID_FAULT if they tried to execute before this patch, due to the
oversize local size, and faulting is even slower than spilling ;-)

Fixes dEQP-GLES31.functional.synchronization.* on Mali-T860.

instructions HURT:   shaders/android/gfxbench/carchase/6.shader_test MESA_SHADER_COMPUTE: 121 -> 157 (29.75%)
instructions HURT:   shaders/android/gfxbench/carchase/386.shader_test MESA_SHADER_COMPUTE: 121 -> 157 (29.75%)
instructions HURT:   shaders/android/gfxbench/carchase/374.shader_test MESA_SHADER_COMPUTE: 141 -> 184 (30.50%)
instructions HURT:   shaders/android/gfxbench/carchase/4-1.shader_test MESA_SHADER_COMPUTE: 141 -> 184 (30.50%)
instructions HURT:   shaders/android/com.miHoYo.GenshinImpact/18.shader_test MESA_SHADER_COMPUTE: 513 -> 933 (81.87%)
instructions HURT:   shaders/android/com.miHoYo.GenshinImpact/16.shader_test MESA_SHADER_COMPUTE: 505 -> 1002 (98.42%)

bundles HURT:   shaders/android/gfxbench/carchase/374.shader_test MESA_SHADER_COMPUTE: 73 -> 116 (58.90%)
bundles HURT:   shaders/android/gfxbench/carchase/4-1.shader_test MESA_SHADER_COMPUTE: 73 -> 116 (58.90%)
bundles HURT:   shaders/android/gfxbench/carchase/6.shader_test MESA_SHADER_COMPUTE: 61 -> 97 (59.02%)
bundles HURT:   shaders/android/gfxbench/carchase/386.shader_test MESA_SHADER_COMPUTE: 61 -> 97 (59.02%)
bundles HURT:   shaders/android/com.miHoYo.GenshinImpact/18.shader_test MESA_SHADER_COMPUTE: 281 -> 701 (149.47%)
bundles HURT:   shaders/android/com.miHoYo.GenshinImpact/16.shader_test MESA_SHADER_COMPUTE: 278 -> 775 (178.78%)

registers helped:   shaders/android/gfxbench/carchase/374.shader_test MESA_SHADER_COMPUTE: 11 -> 8 (-27.27%)
registers helped:   shaders/android/gfxbench/carchase/4-1.shader_test MESA_SHADER_COMPUTE: 11 -> 8 (-27.27%)
registers helped:   shaders/android/gfxbench/carchase/6.shader_test MESA_SHADER_COMPUTE: 14 -> 8 (-42.86%)
registers helped:   shaders/android/gfxbench/carchase/386.shader_test MESA_SHADER_COMPUTE: 14 -> 8 (-42.86%)
registers helped:   shaders/android/com.miHoYo.GenshinImpact/16.shader_test MESA_SHADER_COMPUTE: 16 -> 8 (-50.00%)
registers helped:   shaders/android/com.miHoYo.GenshinImpact/18.shader_test MESA_SHADER_COMPUTE: 16 -> 8 (-50.00%)

threads helped:   shaders/android/gfxbench/carchase/6.shader_test MESA_SHADER_COMPUTE: 1 -> 2 (100.00%)
threads helped:   shaders/android/gfxbench/carchase/386.shader_test MESA_SHADER_COMPUTE: 1 -> 2 (100.00%)
threads helped:   shaders/android/gfxbench/carchase/374.shader_test MESA_SHADER_COMPUTE: 1 -> 2 (100.00%)
threads helped:   shaders/android/gfxbench/carchase/4-1.shader_test MESA_SHADER_COMPUTE: 1 -> 2 (100.00%)
threads helped:   shaders/android/com.miHoYo.GenshinImpact/16.shader_test MESA_SHADER_COMPUTE: 1 -> 2 (100.00%)
threads helped:   shaders/android/com.miHoYo.GenshinImpact/18.shader_test MESA_SHADER_COMPUTE: 1 -> 2 (100.00%)

spills HURT:   shaders/android/gfxbench/carchase/374.shader_test MESA_SHADER_COMPUTE: 0 -> 5
spills HURT:   shaders/android/gfxbench/carchase/4-1.shader_test MESA_SHADER_COMPUTE: 0 -> 5
spills HURT:   shaders/android/gfxbench/carchase/6.shader_test MESA_SHADER_COMPUTE: 0 -> 8
spills HURT:   shaders/android/gfxbench/carchase/386.shader_test MESA_SHADER_COMPUTE: 0 -> 8
spills HURT:   shaders/android/com.miHoYo.GenshinImpact/18.shader_test MESA_SHADER_COMPUTE: 0 -> 112
spills HURT:   shaders/android/com.miHoYo.GenshinImpact/16.shader_test MESA_SHADER_COMPUTE: 0 -> 146

fills HURT:   shaders/android/gfxbench/carchase/6.shader_test MESA_SHADER_COMPUTE: 0 -> 26
fills HURT:   shaders/android/gfxbench/carchase/386.shader_test MESA_SHADER_COMPUTE: 0 -> 26
fills HURT:   shaders/android/gfxbench/carchase/374.shader_test MESA_SHADER_COMPUTE: 0 -> 33
fills HURT:   shaders/android/gfxbench/carchase/4-1.shader_test MESA_SHADER_COMPUTE: 0 -> 33
fills HURT:   shaders/android/com.miHoYo.GenshinImpact/18.shader_test MESA_SHADER_COMPUTE: 0 -> 209
fills HURT:   shaders/android/com.miHoYo.GenshinImpact/16.shader_test MESA_SHADER_COMPUTE: 0 -> 234

total instructions in shared programs: 1521691 -> 1522766 (0.07%)
instructions in affected programs: 1542 -> 2617 (69.71%)
helped: 0
HURT: 6
HURT stats (abs)   min: 36.0 max: 497.0 x̄: 179.17 x̃: 43
HURT stats (rel)   min: 29.75% max: 98.42% x̄: 50.13% x̃: 30.50%
95% mean confidence interval for instructions value: -49.36 407.69
95% mean confidence interval for instructions %-change: 17.14% 83.12%
Inconclusive result (value mean confidence interval includes 0).

total bundles in shared programs: 649296 -> 650371 (0.17%)
bundles in affected programs: 827 -> 1902 (129.99%)
helped: 0
HURT: 6
HURT stats (abs)   min: 36.0 max: 497.0 x̄: 179.17 x̃: 43
HURT stats (rel)   min: 58.90% max: 178.78% x̄: 94.01% x̃: 59.02%
95% mean confidence interval for bundles value: -49.36 407.69
95% mean confidence interval for bundles %-change: 36.20% 151.83%
Inconclusive result (value mean confidence interval includes 0).

total registers in shared programs: 90681 -> 90647 (-0.04%)
registers in affected programs: 82 -> 48 (-41.46%)
helped: 6
HURT: 0
helped stats (abs) min: 3.0 max: 8.0 x̄: 5.67 x̃: 6
helped stats (rel) min: 27.27% max: 50.00% x̄: 40.04% x̃: 42.86%
95% mean confidence interval for registers value: -8.03 -3.30
95% mean confidence interval for registers %-change: -50.95% -29.13%
Registers are helped.

total threads in shared programs: 55717 -> 55723 (0.01%)
threads in affected programs: 6 -> 12 (100.00%)
helped: 6
HURT: 0
helped stats (abs) min: 1.0 max: 1.0 x̄: 1.00 x̃: 1
helped stats (rel) min: 100.00% max: 100.00% x̄: 100.00% x̃: 100.00%
95% mean confidence interval for threads value: 1.00 1.00
95% mean confidence interval for threads %-change: 100.00% 100.00%
Threads are helped.

total spills in shared programs: 1108 -> 1392 (25.63%)
spills in affected programs: 0 -> 284
helped: 0
HURT: 6

total fills in shared programs: 4721 -> 5282 (11.88%)
fills in affected programs: 0 -> 561
helped: 0
HURT: 6

Cc: mesa-stable
Closes: #7228
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19092>
2022-10-17 18:56:13 +00:00
Alyssa Rosenzweig
5c95be85ab panfrost/ci: Remove stale fail
Due to fractional run. This whole section passes.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19092>
2022-10-17 18:56:13 +00:00
Daniel Stone
2e774180c6 Revert "panfrost/ci: Disable t720 jobs"
This reverts commit b3a69d1c31.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19113>
2022-10-17 12:13:47 +01:00
Alyssa Rosenzweig
b3a69d1c31 panfrost/ci: Disable t720 jobs
They're dead, Jim!

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Suggested-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19084>
2022-10-15 00:53:22 +00:00
Mike Blumenkrantz
03d7273292 ci: add a panfrost flake
https://gitlab.freedesktop.org/mesa/mesa/-/jobs/28669388

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18714>
2022-09-20 21:18:39 +00:00
David Heidelberg
ce05ed1866 ci/panfrost: drop glmark2 terrain trace
See: https://gitlab.freedesktop.org/gfx-ci/tracie/traces-db/-/merge_requests/50

Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18633>
2022-09-18 18:51:14 +00:00
Boris Brezillon
e2eb1d083c ci/panvk: Skip dEQP-VK.api.object_management.max_concurrent.query_pool
This test times out occasionally. Let's disable it for now.

Reported-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18578>
2022-09-14 18:01:06 +00:00
David Heidelberg
1777510390 ci/panfrost: convert traces to new YAML format
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18329>
2022-09-13 09:16:19 +00:00
Alyssa Rosenzweig
7d9df64b07 panfrost/ci: Update G72 xflakes list
I can't reproduce this locally on Mali-G52 and don't have Mali-G72 hardware.
Unless someone wants to investigate the flakes here in #7149, add a bigger
wildcard to the gathers xflakes list so we don't fail pipelines.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7149
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Acked-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18348>
2022-09-01 13:48:17 +00:00
Alyssa Rosenzweig
5bc830cbf2 pan/mdg: Reexpress umul_high packing
There are a bunch of subtle details of how 32-bit sources are
zero-extended to 64-bit, how their swizzles work, how 64-bit
destinations are shrunk to 32-bit, and how those two interact. This
fixes the interactions... mostly.

Fixes umul_high, all such tests should be passing now. Unblocks idiv
lowering that depends on umul_high.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17860>
2022-08-24 19:54:23 +00:00
Emma Anholt
cbbd9f3402 ci: Upgrade deqp-runner to 0.15.0.
This includes the new timeout fixes so that tests that throw lots of debug
don't delay the timeout triggering, and the fraction vs shuffling behavior
change so that "--fraction 2" doesn't just skip every other test as it
appears in the caselist (every vertex shader variant, for example).

The fraction vs shuffling change does mean we see some different fails on
some drivers now.

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17876>
2022-08-07 02:11:46 +00:00
Adam Jackson
768238fdc0 glx: Fix drawable refcounting for naked Windows
driFetchDrawable is only ever called from the MakeCurrent path, which
means it has to handle the case of pre-GLX-1.3 Windows being named as
the drawable. When it finds the drawable in the hash, it increments its
refcount before returning it, so for a GLXWindow it would be 2 on first
return, one from glXCreateWindow and one from glXMakeCurrent. But when
it does not find the drawable and creates one for the naked Window, the
reference count on first return would only be 1. As a result, if this
context was then ever bound to a different drawable, the old Window's
DRI drawable state (like the back buffer) would be destroyed.

Fixes piglit's glx-multi-window-single-context and glx-make-current for
a variety of drivers.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6713
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17479>
2022-07-13 12:25:30 -04:00
Alyssa Rosenzweig
e0e2294f47 panfrost/ci: Disable T760 jobs
These keep timing out due to abusive jobs.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17433>
2022-07-08 21:33:19 +00:00
Alyssa Rosenzweig
35a80418a1 panfrost/ci: Disable 0ad trace on T860
The last few frames of the trace are expensive (in terms of GPU time) and are
close to hitting the timeout. With the next commit, they do hit the timeout due
to using a larger batch. Nevertheless the next commit should be an overall perf
improvement on average, so this remove to unblock CI.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Suggested-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17112>
2022-07-08 01:50:03 +00:00
David Heidelberg
6c4cc0abc6 ci: traces: switch to brotli compressed traces
virgl: Also drop old pre-trim glxgears trace (cached).

Acked-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Acked-by: Emma Anholt <emma@anholt.net>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17280>
2022-06-29 00:58:28 +00:00
David Heidelberg
96f0944a69 ci/panfrost: add Blender, Warzone2100, Freedoom and Unvanquished traces
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16909>
2022-06-14 11:52:45 +00:00
Emma Anholt
464b32c030 glsl: Drop the div-to-mul-rcp lowering for floats.
NIR has fdiv, and all the NIR backends have to have lower_fdiv set
appropriately already since various passes (format conversions,
tgsi_to_nir, nir_fast_normalize(), etc.) might generate one.

This causes softpipe and llvmpipe to now do actual divides, since
lower_fdiv is not set there.  Note that llvmpipe's rcp implementation is a
divide of 1.0 by x, so now we're going to be just doing div(x, y) instead
of mul(x, div(1.0, y)).

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16823>
2022-06-07 02:38:42 +00:00
Alyssa Rosenzweig
ed4bd8738d panfrost/ci: Mark draw_buffers_indexed.* as flakes
These keep flaking. Icecream95 observes the issue relates to AFBC in the
discussion of the flake in issue 6604. Until the root cause can be identified
and fixed, mark the tests as known flakes for CI.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16855>
2022-06-03 21:05:22 +00:00
Alyssa Rosenzweig
9e4b457958 pan/mdg: Scalarize with 64-bit sources
Otherwise, we can get vec3 with u2u32 with 64-bit sources which we need lowered.
Since our current approach is "scalarize all 64-bit ops", we need to check for
conversions too.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16798>
2022-06-01 14:24:05 -04:00
Emma Anholt
7472bb4bad glsl,nir: Move i/umulExtended lowering to NIR.
NIR already has the necessary lowering, and the GLSL lowering violates
GLSL IR validation rules.  Once quadop lowering was turned off, the IR
validation at the end of the compile path on DEBUG builds caught the
problem.

In order to move the lowering to NIR, though, we need to make sure that
drivers supporting these functions actually have the lowering flag set.

xfails added for t860, where apparently this tickles a variety of existing
64-bit bugs in the backend.

Fixes: #6461
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Mykhailo Skorokhodov <mykhailo.skorokhodov@globallogic.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16437>
2022-06-01 10:56:35 +00:00
Juan A. Suarez Romero
836ce97f5e ci: bump VK-GL-CTS to 1.3.2.0
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa@collabora.com>
Acked-by: Alejandro Piñeiro <apinheiro@igalia.com>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16689>
2022-05-31 15:02:08 +00:00
David Heidelberg
c9f0a511e0 ci/panfrost: add RoR and Nheko traces
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16633>
2022-05-27 06:51:38 +00:00
Tomeu Vizoso
9e031426be panvk/ci: Disable CI for a while
We have been hitting OOM conditions quite often and this is making ti
hard to get stuff merged.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16554>
2022-05-17 09:16:21 +00:00
Jason Ekstrand
9e22e2ac88 panvk: Lower blending after lower_var_copies
nir_lower_blend needs store_deref as does
io_arrays_to_elements_no_indirects.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16483>
2022-05-16 21:43:47 +00:00
Jason Ekstrand
4050697a8f panvk: So more nir_lower_tex before descriptor lowering
Some texture lowering generates more txs which means it needs to happen
before we lower descriptors because descriptor lowering is where txs is
actually handled in panvk.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16483>
2022-05-16 21:43:47 +00:00
Timothy Arceri
7647023f3b glsl: enable the use of the nir based varying linker
Here as well as calling the pass we need to switch the order of
some of the information gathering and optimisation calls. We also
need to create a custom callback for the dead variables removal
pass to clean up dead builtin varying in SSO programs without
causing piglit regressions.

shader-db results IRIS (BDW):

total instructions in shared programs: 17487900 -> 17477072 (-0.06%)
instructions in affected programs: 128682 -> 117854 (-8.41%)
helped: 587
HURT: 82
helped stats (abs) min: 1 max: 145 x̄: 18.82 x̃: 20
helped stats (rel) min: 0.21% max: 77.78% x̄: 17.41% x̃: 8.85%
HURT stats (abs)   min: 1 max: 6 x̄: 2.68 x̃: 2
HURT stats (rel)   min: 0.25% max: 9.76% x̄: 2.94% x̃: 2.16%
95% mean confidence interval for instructions value: -17.71 -14.66
95% mean confidence interval for instructions %-change: -16.40% -13.42%
Instructions are helped.

total cycles in shared programs: 857442520 -> 857170199 (-0.03%)
cycles in affected programs: 112252720 -> 111980399 (-0.24%)
helped: 13733
HURT: 13349
helped stats (abs) min: 1 max: 7293 x̄: 81.44 x̃: 10
helped stats (rel) min: <.01% max: 90.32% x̄: 3.30% x̃: 0.62%
HURT stats (abs)   min: 1 max: 7424 x̄: 63.38 x̃: 8
HURT stats (rel)   min: <.01% max: 192.23% x̄: 3.28% x̃: 0.54%
95% mean confidence interval for cycles value: -14.01 -6.10
95% mean confidence interval for cycles %-change: -0.17% 0.06%
Inconclusive result (%-change mean confidence interval includes 0).

total sends in shared programs: 971443 -> 970010 (-0.15%)
sends in affected programs: 4596 -> 3163 (-31.18%)
helped: 446
HURT: 39
helped stats (abs) min: 1 max: 6 x̄: 3.40 x̃: 4
helped stats (rel) min: 3.03% max: 85.71% x̄: 46.48% x̃: 50.00%
HURT stats (abs)   min: 1 max: 3 x̄: 2.15 x̃: 2
HURT stats (rel)   min: 6.67% max: 25.00% x̄: 15.16% x̃: 10.53%
95% mean confidence interval for sends value: -3.13 -2.78
95% mean confidence interval for sends %-change: -44.16% -38.88%
Sends are helped.

LOST:   235
GAINED: 262

Shader-db results radeonsi (RX580):

169505 shaders in 102144 tests
Totals:
SGPRS: 7698832 -> 7696552 (-0.03 %)
VGPRS: 5547296 -> 5545280 (-0.04 %)
Spilled SGPRs: 14795 -> 14773 (-0.15 %)
Spilled VGPRs: 3782 -> 3782 (0.00 %)
Private memory VGPRs: 1152 -> 1152 (0.00 %)
Scratch size: 3872 -> 3872 (0.00 %) dwords per thread
Code Size: 162946528 -> 162895264 (-0.03 %) bytes
Max Waves: 2449334 -> 2449736 (0.02 %)

Totals from affected shaders:
SGPRS: 215024 -> 212744 (-1.06 %)
VGPRS: 151976 -> 149960 (-1.33 %)
Spilled SGPRs: 162 -> 140 (-13.58 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Private memory VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 5249916 -> 5198652 (-0.98 %) bytes
Max Waves: 54588 -> 54990 (0.74 %)

Panfrost trace checksum is updated as per discussion in:
https://gitlab.freedesktop.org/mesa/mesa/-/issues/6343

Some virpipe tess shader piglit tests are added as failures to CI
these failures are not a regression but an uncovered existing bug
exposed due to the linker no longer sorting internally facing
shader interfaces in alphabetical order. See details in:
https://gitlab.freedesktop.org/mesa/mesa/-/issues/6481

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15731>
2022-05-16 03:33:18 +00:00
Jason Ekstrand
5ef9bd5ff2 panvk: Round FillBuffer sizes down to a multiple of 4
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
2022-05-12 10:53:16 +00:00
Jason Ekstrand
d783f8949e panvk: Implement descriptor copies properly
All we were doing was copying panvk_descriptor structs around which
don't actually contain data that's used by anything interesting.  We
need to copy the actual data arround.  Annoyingly, that means we need a
descriptor copy function per descriptor type.  Woo!

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
2022-05-12 10:53:16 +00:00
Jason Ekstrand
38a0742f6a panvk: Implement texture/image queries
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
2022-05-12 10:53:16 +00:00
Jason Ekstrand
6621ab8bf9 panvk: Advertise VK_KHR_variable_pointers
Now that our SSBO descriptor handling code no longer craws deref chains
back to the variable, we should be handling variable pointers properly.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
2022-05-12 10:53:16 +00:00