Commit graph

10573 commits

Author SHA1 Message Date
Yonggang Luo
58e55a9e45 radv: Fixes warning C5287: operands are different enum types 'VkShaderStageFlagBits' and '<unnamed-enum-RADV_GRAPHICS_STAGE_BITS>'; use an explicit cast
../src/amd/vulkan/radv_pipeline.c(148): error C2220: the following warning is treated as an error
../src/amd/vulkan/radv_pipeline.c(148): warning C5287: operands are different enum types 'VkShaderStageFlagBits' and '<unnamed-enum-RADV_GRAPHICS_STAGE_BITS>'; use an explicit cast
to silence this warning
../src/amd/vulkan/radv_pipeline.c(148): note: to simplify migration, consider the temporary use of /Wv:18 flag with the version of the compiler with which you used to build without
warnings
../src/amd/vulkan/radv_pipeline.c(150): warning C5287: operands are different enum types 'VkShaderStageFlagBits' and '<unnamed-enum-RADV_GRAPHICS_STAGE_BITS>'; use an explicit cast
to silence this warning
../src/amd/vulkan/radv_pipeline.c(150): note: to simplify migration, consider the temporary use of /Wv:18 flag with the version of the compiler with which you used to build without
warnings

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36862>
2025-08-20 11:39:19 +00:00
Yonggang Luo
1430798eac radv: Fixes warning implicit conversion from enum type
../src/amd/vulkan/radv_pipeline_rt.c(142): error C2220: the following warning is treated as an error
../src/amd/vulkan/radv_pipeline_rt.c(142): warning C5286: implicit conversion from enum type 'VkShaderGroupShaderKHR' to enum type 'VkRayTracingShaderGroupTypeKHR'; use an explicit cast to silence this warning
../src/amd/vulkan/radv_pipeline_rt.c(142): note: to simplify migration, consider the temporary use of /Wv:18 flag with the version of the compiler with which you used to build without warnings

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36862>
2025-08-20 11:39:19 +00:00
David Rosca
f4808ea46f radv/video: Add support for VK_KHR_video_encode_intra_refresh
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36718>
2025-08-20 10:58:00 +00:00
David Rosca
638fa01203 radv/video: Enable AV1 decode workaround for gfx1153
Cc: mesa-stable
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36725>
2025-08-20 09:51:32 +00:00
Natalie Vock
4de3a5cce3 radv: Only expose indirect raytracing on gfx7+
It relies on unaligned indirect dispatches which are broken on gfx6.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30811>
2025-08-19 18:34:41 +00:00
Samuel Pitoiset
baaf5d643a radv: emit inlined push constants with buffered SH regs on GFX12
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36570>
2025-08-19 18:01:23 +00:00
Samuel Pitoiset
c710eaa443 radv: emit descriptor pointers with buffered SH regs on GFX12
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36570>
2025-08-19 18:01:22 +00:00
Samuel Pitoiset
95d2f009a9 radv: emit compute pipeline with buffered SH regs on GFX12
This also includes RT, task shaders and DGC IES for compute.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36570>
2025-08-19 18:01:21 +00:00
Samuel Pitoiset
bbf8338443 radv: rework the helper to emit buffered regs on GFX12
Also reserve enough space if needed.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36570>
2025-08-19 18:01:21 +00:00
Samuel Pitoiset
1f26f93aa7 radv: emit relocation for task shaders at the same place as other stages
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36570>
2025-08-19 18:01:21 +00:00
Daniel Schürmann
e504c2543a radv: unconditionally call ac_nir_lower_mem_access_bit_sizes()
radv_nir_lower_io_to_mem() might also create unaligned memory accesses.

Totals from 1339 (1.68% of 79839) affected shaders: (Navi48)

MaxWaves: 35424 -> 35408 (-0.05%); split: +0.07%, -0.12%
Instrs: 1080783 -> 1047739 (-3.06%)
CodeSize: 5559464 -> 5311520 (-4.46%)
VGPRs: 78900 -> 78852 (-0.06%); split: -0.17%, +0.11%
Latency: 2802027 -> 2769668 (-1.15%); split: -1.16%, +0.01%
InvThroughput: 439935 -> 439313 (-0.14%); split: -0.23%, +0.09%
SClause: 15188 -> 15187 (-0.01%)
Copies: 63302 -> 62585 (-1.13%); split: -1.35%, +0.22%
PreVGPRs: 64891 -> 64901 (+0.02%)
VALU: 604979 -> 605116 (+0.02%); split: -0.04%, +0.06%
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36133>
2025-08-19 14:28:15 +00:00
Daniel Schürmann
7c15f86a22 radv: only vectorize shared2 instructions during late optimizations
Totals from 7 (0.01% of 79839) affected shaders: (Navi48)

Instrs: 6475 -> 6511 (+0.56%)
CodeSize: 37088 -> 37244 (+0.42%)
Latency: 17297 -> 17587 (+1.68%)
InvThroughput: 5428 -> 5420 (-0.15%)
Copies: 278 -> 276 (-0.72%)
PreVGPRs: 487 -> 483 (-0.82%)
VALU: 4491 -> 4486 (-0.11%)
SALU: 267 -> 269 (+0.75%)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36133>
2025-08-19 14:28:14 +00:00
Samuel Pitoiset
2c26c5deb7 radv: merge two similar loops in lookup_ps_epilog()
Cleanup.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36778>
2025-08-19 11:20:52 +00:00
Samuel Pitoiset
45c91edd18 radv: fix color attachment remapping with fast-GPL/ESO
If vkCmdSetRenderingAttachmentLocations() isn't setting all color
attachment locations (ie. MAX_RTS), the remapping might be wrong
because MESA_VK_ATTACHMENT_UNUSED is used to trim the unused locations

Found by inspection while implementing a new extension.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36778>
2025-08-19 11:20:52 +00:00
Samuel Pitoiset
9e0991eff5 radv: stop using the pipeline layout completely for DGC
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Uses the push constant size computed from shaders.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36793>
2025-08-18 10:28:09 +02:00
Samuel Pitoiset
f229e9cb51 radv: gather push constant size from shaders for DGC
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36793>
2025-08-18 10:28:09 +02:00
Samuel Pitoiset
01c72a2539 radv: add a function to get push constant layout info for DGC
Instead of duplicating the same code.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36793>
2025-08-18 10:28:09 +02:00
Samuel Pitoiset
d9281f1fb1 radv: determine the push constant size from the shader itself
To stop relying on the pipeline layout when possible.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36793>
2025-08-18 10:28:09 +02:00
Samuel Pitoiset
ce83800262 radv: remove unused forwarded declarations of pipeline layout
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36792>
2025-08-18 07:25:34 +00:00
Samuel Pitoiset
282186d4aa radv: add a function that uploads push constants
Similar to indirect descriptor sets logic.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36792>
2025-08-18 07:25:34 +00:00
Samuel Pitoiset
4e8728c4f6 radv: rework emitting push constants for less CPU overhead
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36792>
2025-08-18 07:25:34 +00:00
Samuel Pitoiset
81ec36edb8 radv: determine if push constants need to be uploaded earlier
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36792>
2025-08-18 07:25:34 +00:00
Samuel Pitoiset
47fd1803b2 radv: use radv_shader_need_indirect_descriptor_sets() more
While we are at it, move it to the appropriate header file.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36792>
2025-08-18 07:25:33 +00:00
Samuel Pitoiset
8f0ff009c0 radv: do not emit inlined SGPRs twice for merged shaders
This is wasteful.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36792>
2025-08-18 07:25:33 +00:00
Samuel Pitoiset
4bd0bf7e19 radv: invalidating push constants for compute<->rt during dispatches
It's similar but a bit cleaner.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36792>
2025-08-18 07:25:32 +00:00
Samuel Pitoiset
104510aeb6 radv: slightly optimize indirect descriptor sets upload size
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36792>
2025-08-18 07:25:32 +00:00
Samuel Pitoiset
fd5925868f radv: tidy up radv_flush_descriptors()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36792>
2025-08-18 07:25:31 +00:00
Konstantin Seurer
cc0dc4b566 radv: Store parent node IDs inside nodes on GFX12
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Saves some space.

Reviewed-by: Natalie Vock <natalie.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36691>
2025-08-15 13:00:32 +00:00
Konstantin Seurer
0d73aeea27 radv: Add RADV_DEBUG=validatevas for address validation in nir
The option creates a buffer where each bit stores whether the
corresponding 4096 byte memory section has been allocated. The helper
radv_build_is_valid_va allows for querying the validity of addresses
inside a nir shader which can be useful for debugging.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34392>
2025-08-15 10:32:35 +00:00
Konstantin Seurer
be4be884e1 radv: Rename radv_printf files to radv_debug_nir
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34392>
2025-08-15 10:32:34 +00:00
Samuel Pitoiset
eb1a093965 radv: stop using the pipeline layout for uploading push constants with DGC
Pass the push constant size as a parameter instead.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36777>
2025-08-15 07:45:00 +00:00
Samuel Pitoiset
b527a4f23e radv: split uploading push constants with DGC in two parts
The first part is for copying "normal" push constant values to the
upload space in the preprocess buffer. The second part is only for
updating the push constants set for DGC.

This will allow us to remove using the pipeline layout in the DGC
shader.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36777>
2025-08-15 07:45:00 +00:00
Samuel Pitoiset
3e0d4a1df1 radv: stop using the pipeline layout for inlined push constants with DGC
This only updates the inlined push constants set for DGC and doesn't
need the pipeline layout if the index is computed differently.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36777>
2025-08-15 07:45:00 +00:00
Samuel Pitoiset
95e387d283 radv: remove useless inline push constant emission with DGC IES
This is actually not needed because the base pipeline/shader is
required to be bind before preprocess()/execute() are called. Also,
the push constant layout must be similar between all pipelines/shaders
in the same IES.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36777>
2025-08-15 07:45:00 +00:00
Samuel Pitoiset
0ac7f1888f radv: reduce the combined image/sampler desc size on GFX11+
From 96 to 64 due to the 32 bytes descriptor alignment.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36762>
2025-08-14 06:47:30 +00:00
Samuel Pitoiset
897201d710 radv: only write 32 bytes for combined image/sampler on GFX11+
It should be slightly more optimal.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36762>
2025-08-14 06:47:30 +00:00
Samuel Pitoiset
b6d093c4f5 radv: do not hardcode the combined image/sampler offset in the db path
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36762>
2025-08-14 06:47:30 +00:00
Samuel Pitoiset
f2b5446cc4 radv: use radv_write_sampler_descriptor() for combined image/sampler
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36762>
2025-08-14 06:47:29 +00:00
Samuel Pitoiset
3fb33aada6 radv: optimize the preprocess buffer size for DGC IES compute
Using the precomputed information.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36753>
2025-08-14 06:25:49 +00:00
Samuel Pitoiset
e527d2d801 radv: pre-compute more information when updating DGC IES
These information need to consider that pipelines/shaders in the same
IES struct might slightly differ. They will be used to determine the
preprocess buffer size in a better way.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36753>
2025-08-14 06:25:49 +00:00
Samuel Pitoiset
0db165ebda radv: pass the IES struct when computing the DGC sequence size
I completely missed that it's required for the application to pass the
IES struct in vkGetGeneratedCommandsMemoryRequirementsEXT. Also any
changes to the IES struct requires to call it again.

This will allow us to do more optimizations.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36753>
2025-08-14 06:25:49 +00:00
Samuel Pitoiset
771d4b55e8 radv: remove redundant push constant size alignment for DGC
It's already aligned to 16 bytes when the pipeline layout is created.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36753>
2025-08-14 06:25:48 +00:00
Samuel Pitoiset
3359386145 radv: fix reserving space for emitting push constants with DGC IES
layout->push_constant_mask is only the DGC push constant mask (ie. the
tokens that are specified), but with IES all push constants are emitted
from the DGC shader. So it should be the total range of push constant.

This used to work by luck due to the preprocess buffer alignment.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36753>
2025-08-14 06:25:48 +00:00
Emma Anholt
9e61e72e9f vk/runtime: Set GPU_MULTI_WAIT on the drm syncobj type.
DRM syncobjs always let you wait repeatedly on them, so we can set the
flag in the core instead of having each driver override it once they try
to enable the emulated timeline semaphores.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36563>
2025-08-13 18:57:42 +00:00
Sagar Ghuge
7b634ebb63 vulkan/runtime: Add VK_SHADER_CREATE_UNALIGNED_DISPATCH_BIT_MESA flag
Drivers that doesn't support direct unaligned dispatches, they can use
the shader creation flag to lower unaligned dispatches.

Suggested-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36245>
2025-08-12 23:17:02 +00:00
Samuel Pitoiset
0d4d73a780 radv: implement an alternative workaround for HiZ on GFX12
This disables HiZ on-demand when both depth/stencil are enabled and
depth writes are enabled to prevent potential issues.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36739>
2025-08-12 13:48:10 +00:00
Samuel Pitoiset
b6a9ed48c9 radv: validate dynamic states earlier
This will be needed to emit the GFX12 alternative HIZ wa.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36739>
2025-08-12 13:48:10 +00:00
Samuel Pitoiset
3de108da66 radv/meta: update HiZ metadata after depth/stencil image clears
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36739>
2025-08-12 13:48:10 +00:00
Samuel Pitoiset
e6c485afb0 radv: initialize HiZ metadata during image layout transitions
This will allow us to enable HiZ for all levels of the image.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36739>
2025-08-12 13:48:10 +00:00
Samuel Pitoiset
297cf6f1aa radv/meta: add a pass to clear HiZ surfaces
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36739>
2025-08-12 13:48:09 +00:00