Fix defect reported by Coverity Scan.
Dereference before null check (REVERSE_INULL)
check_after_deref: Null-checking desc suggests that it may be
null, but it has already been dereferenced on all paths leading to
the check.
Fixes: 2f83dce059 ("radeonsi: don't report R64_*INT as a sampler format because it doesn't work")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16380>
This uses the common helper code to implement the tess ring sizing.
One question is if radeonsi should be using tess_offchip_ring_offset
in some places it's using tess_factor_ring_size?
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16415>
This was updated in
4e49a05e37 ("radeonsi: increase the tesselation factor ring size")
and
9fecac091f ("radeonsi/gfx11: scattered register deltas")
This will apply this to radv.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16415>
exporting all resources breaks suballocation, so instead just use the
existing heuristics and then forcibly rebind resources as needed
for this functionality
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16252>
Some glcts tests have failed due to incorrect processing of `ir_quadop_vector` in
`ir_validation`. e.g:
`GLES31.functional.shaders.builtin_functions.integer.imulextended.int_highp_geometry`
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6461
Fixes: 23cde71b ("glsl: Stop lowering ir_quadop_vector.")
Reviewed-by: Emma Anholt <emma@anholt.net>
Signed-off-by: Mykhailo Skorokhodov <mykhailo.skorokhodov@globallogic.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16420>
If the secondary command buffer executed used push constants on a
different set of stages than the primary is using, we may end up not
reallocating them for the primary, getting misrender artifacts at best,
or a nice GPU hang at worst.
Fixes the tests from a CTS from the future:
dEQP-VK.dynamic_rendering.random.*
Cc: mesa-stable
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16439>
Which is just moving the struct definition for __DRIconfigRec into
dri_util.h.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16377>
drisw is the only consumer so rename things to make it a bit more
obvious.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16377>
There is no translation support for dfloor, mod, and pow
in svga_tgsi_vgpu10, just enable the lowering passes in the
nir compile option.
Reviewed-by: Neha Bhende <bhenden@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16412>
this wasn't taking into account the format swizzle, returning broken
alpha values in most cases
Fixes: 0b6554ba6f ("gallivm,llvmpipe: handle TXF (texelFetch) instruction, including offsets")
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16137>
the first case in gallivm did no checking, so this was always going to be
broken, so instead just copy the now-correct ssbo logic
cc: mesa-stable
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16137>
this is a cmdbuf function, which means it gets enqueued, which means
the template can't be destroyed until the cmdbuf has finished using it
cc: mesa-stable
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16137>
this was checking (offset < size) when really it needs to be
(offset < size && extent < size && offset >= 0)
Fixes: 591899eedd ("gallivm/nir: Add a short circuit uniform-offset mode for load_ssbo/load_shared.")
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16137>
