This simplifies things a bit. Note that in some cases, the arguments are
swapped, because multiplications are commutative, and nir_fmul_imm only
allows the second operand to be an immediate.
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23179>
arb_pipeline_statistics_query-frag is passing now. VRS flat shading
was the culprit and since smooth lines, it's disabled because
gl_SampleMaskIn is read. Incredible.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23212>
We make the compiler assume the worst possible case (it's not great
because we have to burn 32 GRFs of potential input data) and then we
push the actual value through push constants.
This enables VK_EXT_gpl usage on zink, which causes two traces to change
their results. Raven is an imperceptible change, blender has missing
original pngs but looks plausible.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22378>
nir_registers are only supposed to be used temporarily. They may be created by a
producer, but then must be immediately lowered prior to optimizing the produced
shader. They may be created internally by an optimization pass that doesn't want
to deal with phis, but that pass needs to lower them back to phis immediately.
Finally they may be created when going out-of-SSA if a backend chooses, but that
has to happen late.
Regardless, there should be no case where a backend sees a shader that comes in
with nir_registers needing to be lowered. The two frontend producers of
registers (tgsi_to_nir and mesa/st) both call nir_lower_regs_to_ssa to clean up
as they should. Some backend (like intel) already depend on this behaviour.
There's no need for other backends to call nir_lower_regs_to_ssa too.
Drop the pointless calls as a baby step towards replacing nir_register.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23181>
All platforms supported by Iris will have aperture_bytes set as 4Gb.
Also this value is not the actual aperture in i915, it actualy is the
GGTT size.
So here replacing it by the sram size, something that will vary
depending in the amount of RAM available.
This fix some tests with Xe KMD, as it is not setting aperture_bytes.
And will not do that as there is no UAPI to fetch this information
and it is not planned to it to Xe UAPI.
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Ack-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22969>
Ideally we would like to trigger a compilation error like we do on
v3dv (VK_ERROR_UNKNOWN). But with v3d we can't really do that, as this
could happen on a draw call. Let's at least assert so debug builds
stops at this point.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23203>
Avoid keeping a mismatching type between the sampler declaration and its
use.
In the case of virgl, we were hitting sanity checks when running the
spec@arb_fragment_program_shadow@tex-shadow2dnotdepth piglit test.
Fixes: 0843d4cbc3
Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23183>
This WA impacts skus with multiple CCS, e.g. ATS-M. According to
description, we need to add a pipe control before following NP state
commands:
STATE_BASE_ADDRESS
3DSTATE_BTD
CHROMA_KEY
STATE_SIP
STATE_COMPUTE_MODE
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20784>
We already do _most_ of the tracking of rsc associated with a batch at
the batch level. If we manually add the handful of BOs that aren't part
of the resource tracking, we can drop the duplicate drm level tracking.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23149>
There are a bunch of extra steps for draws that involve GS and/or tess
stages. But we can use template specialization to skip all that when
there is no GS/tess shader stage bound.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23149>
Convert various run-time conditionals into a single draw type
determination, and use template specialization to generate unique
optimized code paths for each. This also lets us fold the WFM needed
in some cases into normal barrier flushes.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23149>
reason:
decoder uses the target buffer address in record
to indentify the reference frames. When target
buffer has changed outside of decoding process,
it has to be updated back to decoder, otherwise
the outdated reference will cause image corruption.
Cc: mesa-stable
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Reviewed-by: Sil Vilerino <sivileri@microsoft.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23061>
To add mesh/task later we have to loop over more stages the other side
of compute. So explicitly skip compute for now.
This has a couple of subtle bits to it, and I think there might be a bug
in pre rast
Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23065>
The query result resource will be written to by the host, so we have to
declare it as dirty if we want to see the change.
Fixes: 9279a28f0 (virgl: ARB_query_buffer_object support)
v2: Update expectations in CI
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23121>
