NVIDIA moved the nSight Graphics docs and this was showing with
linkcheck on sphinx-build.
Signed-off-by: Mary Guillemard <mary@mary.zone>
Reviewed-by: Lorenzo Rossi <lorenzo.rossi@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40340>
Code-motion should not move back upconversions without any other
instruction, that would only increase memory pressure without any
significant performance benefit (conversions are usually cheap).
This should also help lowering mediump varyings early by not reversing
their work.
Signed-off-by: Lorenzo Rossi <lorenzo.rossi@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40273>
When running "./deqp-vk -n dEQP-VK.memory.binding.maintenance6*", we
get tons of:
MESA-INTEL: debug: anv_bind_image_memory: ignored VkStructureType
VK_STRUCTURE_TYPE_BIND_MEMORY_STATUS(1000545002)
The function does not ignore VK_STRUCTURE_TYPE_BIND_MEMORY_STATUS: it
looks for it before the main pNext loop. The pNext loop we have there
calls vk_debug_ignored_stype(), which complains about the fact that
we, allegedly, ignore VK_STRUCTURE_TYPE_BIND_MEMORY_STATUS. Move the
code where we find bind_status to the loop so it doesn't complain
anymore.
Reviewed-by: Iván Briano <ivan.briano@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40351>
Add a way to generate the table of gpu-ids that nvtop uses, to simplify
syncing nvtop with mesa when new gpu-ids are added. For example:
python3 src/freedreno/common/freedreno_devices.py -p ./$builddir/src/freedreno/registers/adreno/ --nvtop
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40283>
Fixes new CTS tests.
Similar to a previous change : 5bf3546cc6 ("anv: Use companion cmd
buffer for CCS and MCS image barriers")
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40332>
On SM86+, we can use a 16-bit unsigned offset along side the register
for it.
This adds a new base indice that will be used for it, integration with
nir_opt_offsets and a lowering pass to get ride of the base on
unsupported generations.
Signed-off-by: Mary Guillemard <mary@mary.zone>
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39716>
ISBERD/ISBEWR allow raw manipulation of the various ISBE spaces
where attributes are stored.
This extends the implementation of ISBERD to support the additional
elements added in its intrinsic and implement ISBEWR intrinsic while
extending the ISBE space sharing detection pass.
Signed-off-by: Mary Guillemard <mary@mary.zone>
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39716>
Adds a new intrinsic allowing to do raw write in the various ISBE spaces
where attributes are stored.
This also adapt isberd_nv to map to what we have since SM70+.
This will be used to support mesh shaders.
Signed-off-by: Mary Guillemard <mary@mary.zone>
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39716>
This keeps old packets that were removed from newer HW, packets that set
registers, and packets using non-trivial custom code.
It preserves address checking that was done in print_addr.
Packet names still used the old generator.
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40183>
"explicit sw" means llvmpipe, which cannot be a real drm device. this requires also
returning only a single device so as to avoid leaking non-sw drivers
should fix LIBGL_ALWAYS_SOFTWARE=1 eglinfo
Fixes: 8a339cdebc ("egl: fix sw fallback rejection in non-sw EGL_PLATFORM=device")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40069>
VK_EXT_mutable_descriptor_type is exposed on panvk/v9+ and the same applies
to VK_VALVE_mutable_descriptor_type.
Fixes: 266160fe4e ("panvk: Advertise VK_VALVE_mutable_descriptor_type")
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40316>
When copying data between two surfaces, independently increase the size
of each surface's format (bits-per-pixel) as alignment constraints
allow. Adjust the other surface parameters and blorp_copy() parameters
accordingly.
This fixes copies between the 16bpp YCRCB formats and 32bpp formats:
dEQP-VK.ycbcr.single_plane_copy.linear.linear.r8g8b8a8_to_g8b8g8r8_422
This new test failure was reported by Iván Briano.
More generally, this increases the efficiency of our copies. As shown in
the configuration pages of the PRMs, our sampler is able to fetch texels
at a fixed rate of texels / clock regardless of the texel size
(presumably our rendering hardware has similar behavior). By using the
largest texel size possible, we can transfer more bits / clock.
Improves the performance of a number of traces in the performance CI for
BMG:
* TotalWarWarhammer3 +2.24%
* Payday3 +1.87%
* BaldursGate3 +1.34%
* Control +1.25%
* TotalWarPharaoh +1.22%
Four additional traces are helped between +0.44% and +0.96%.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39974>
