Commit graph

31705 commits

Author SHA1 Message Date
Neha Bhende
31fe1d10b2 svga: loop over box.depth for ReadBack_image on each slice
piglit test ext_texture_array-gen-mipmap is fixed with this patch.

Tested with mtt piglit, glretrace, viewperf and conform. No regression.

Reviewed-by: Brian Paul <brianp@vmware.com>
2017-06-30 08:24:27 -06:00
Charmaine Lee
203d88460c svga: add mksstats for context creation
Reviewed-by: Brian Paul <brianp@vmware.com>
2017-06-30 08:24:27 -06:00
Charmaine Lee
dbb5d2a790 svga: re-validate sampler view at draw time if needed
This patch validates those sampler views with backing copy
of texture whose original copy has been updated since the
view is last validated.
This is done here at draw time because the texture binding might not
have modified, hence validation is not triggered at state update time,
and yet the texture might have been updated in another context, so
we need to re-validate the sampler view in order to update the backing
copy of the updated texture.

This fixes a rendering flickering issue with Photoshop running in
Linux VM with HWversion 11. The problem is Photoshop renders to texture A
in context X, and then bind texture A to context Y. The first time
when texture A is bound to context Y, cso calls pipe->set_sampler_views().
Validation of sampler views is done, rendering is fine.
But when texture A is rendered to again in context X, and rebound in
context Y, cso skips pipe->set_sampler_views() because texture A is already
bound in context Y. SVGA driver is not given a chance to re-validate
the texture binding, the backing copy of the texture is not updated,
and hence causes black image.

Tested with Photoshop, MTT glretrace, piglit.
Fixes VMware bug 1769103.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2017-06-30 08:24:27 -06:00
Rob Herring
cceb2d5c41 gallium: os_process fixes for Android
The function getprogname() is available on Android, since it reuses
various BSD solutions C runtime.

Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2017-06-30 08:44:19 +01:00
Tomeu Vizoso
2ecdedb8d4 etnaviv: Add unreachable statement to etna_amode to fix compilation warnings
Signed-off-by: Robert Foss <robert.foss@collabora.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2017-06-30 08:44:16 +01:00
Bruce Cherniak
277621bbb7 swr: Remove need to allocate vertex buffer scratch space all in one go
Deferred deletion (via "fence_work") has obsoleted the need to allocate
all client vertex buffer scratch space in a single chunk.  Scratch
allocations are now valid until the referenced fence is complete.

Reviewed-by: Tim Rowley <timothy.o.rowley@intel.com>
2017-06-29 13:23:33 -05:00
Bruce Cherniak
2b27dcd075 swr: conditionally validate vertex buffer state
Vertex buffer state doesn't need to be validated on every call,
only on dirty _NEW_VERTEX or indexed draws.

Unconditional validation was introduced as part of patch 330d0607ed,
"remove pipe_index_buffer and set_index_buffer", with the expectation
we'd optimize later.

Reviewed-by: Tim Rowley <timothy.o.rowley@intel.com>
2017-06-29 13:23:33 -05:00
Tim Rowley
867e111769 swr: set dynamic vertex size
Reduces the memory footprint of the frontend processing by packing
vertices.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-06-29 13:23:33 -05:00
Marek Olšák
ccfac28835 radeonsi: set COMPUTE_DISPATCH_INITIATOR.ORDER_MODE = 1
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-06-29 16:19:35 +02:00
Marek Olšák
af52e61935 radeonsi: use the DISPATCH packets to force COMPUTE_START_X/Y/Z = 0
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-06-29 16:19:35 +02:00
Rob Herring
a3d98ca62f Android: use symlinks for driver loading
Instead of having special driver loading logic for Android, create
symlinks to gallium_dri.so so we can use the standard loading logic.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Rob Herring <robh@kernel.org>
2017-06-29 09:09:49 -05:00
Lucas Stach
4fb9f97047 etnaviv: fix memory leak when BO allocation fails
The resource struct is already allocated at this point and should be
freed properly.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Wladimir J. van der Laan <laanwj@gmail.com>
2017-06-29 11:34:50 +02:00
Lucas Stach
b2a87ce34f etnaviv: fill in layer_stride for imported resources
The layer stride information is used in various parts of the driver,
so it needs to be present regardless if the driver allocated the
buffer itself or merely imported it from an external source.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Wladimir J. van der Laan <laanwj@gmail.com>
2017-06-29 11:34:24 +02:00
Lucas Stach
ec43605189 etnaviv: fix shader miscompilation with more than 16 labels
The labels array may change its virtual address on a reallocation, so
it is invalid to cache pointers into the array. Rather than using the
pointer directly, remember the array index.

Fixes miscompilation of shaders in glmark2 ideas, leading to GPU hangs.

Fixes: c9e8b49b (etnaviv: gallium driver for Vivante GPUs)
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2017-06-28 22:04:30 +02:00
Marek Olšák
4a10d6154e radeonsi: move instance divisors into a constant buffer
Shader key size: 107 -> 47

Divisors of 0 and 1 are encoded in the shader key. Greater instance divisors
are loaded from a constant buffer.

The shader code doing the division is huge. Is it something we need to
worry about? Does any app use instance divisors >= 2?

VS prolog disassembly:
    s_load_dwordx4 s[12:15], s[0:1], 0x80  ; C00A0300 00000080
    s_nop 0                                ; BF800000
    s_waitcnt lgkmcnt(0)                   ; BF8C007F
    s_buffer_load_dword s14, s[12:15], 0x4 ; C0220386 00000004
    s_waitcnt lgkmcnt(0)                   ; BF8C007F
    v_cvt_f32_u32_e32 v4, s14              ; 7E080C0E
    v_rcp_iflag_f32_e32 v4, v4             ; 7E084704
    v_mul_f32_e32 v4, 0x4f800000, v4       ; 0A0808FF 4F800000
    v_cvt_u32_f32_e32 v4, v4               ; 7E080F04
    v_mul_hi_u32 v5, v4, s14               ; D2860005 00001D04
    v_mul_lo_i32 v6, v4, s14               ; D2850006 00001D04
    v_cmp_eq_u32_e64 s[12:13], 0, v5       ; D0CA000C 00020A80
    v_sub_i32_e32 v5, vcc, 0, v6           ; 340A0C80
    v_cndmask_b32_e64 v5, v6, v5, s[12:13] ; D1000005 00320B06
    v_mul_hi_u32 v5, v5, v4                ; D2860005 00020905
    v_add_i32_e32 v6, vcc, v5, v4          ; 320C0905
    v_subrev_i32_e32 v4, vcc, v5, v4       ; 36080905
    v_cndmask_b32_e64 v4, v4, v6, s[12:13] ; D1000004 00320D04
    v_mul_hi_u32 v5, v4, v1                ; D2860005 00020304
    v_add_i32_e32 v4, vcc, s8, v0          ; 32080008
    v_mul_lo_i32 v6, v5, s14               ; D2850006 00001D05
    v_add_i32_e32 v7, vcc, 1, v5           ; 320E0A81
    v_cmp_ge_u32_e64 s[12:13], v1, v6      ; D0CE000C 00020D01
    v_sub_i32_e32 v6, vcc, v1, v6          ; 340C0D01
    v_cmp_le_u32_e32 vcc, s14, v6          ; 7D960C0E
    v_cndmask_b32_e64 v8, 0, -1, s[12:13]  ; D1000008 00318280
    v_cndmask_b32_e64 v6, 0, -1, vcc       ; D1000006 01A98280
    v_and_b32_e32 v6, v8, v6               ; 260C0D08
    v_cmp_eq_u32_e32 vcc, 0, v6            ; 7D940C80
    v_cndmask_b32_e32 v6, v7, v5, vcc      ; 000C0B07
    v_add_i32_e32 v5, vcc, -1, v5          ; 320A0AC1
    v_cmp_eq_u32_e32 vcc, 0, v8            ; 7D941080
    v_cndmask_b32_e32 v5, v6, v5, vcc      ; 000A0B06
    v_add_i32_e32 v5, vcc, s9, v5          ; 320A0A09

v2: set prefer_mono for fetched instance divisors

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-06-27 19:55:09 +02:00
Marek Olšák
aef998fe4b radeonsi: check nr_cbufs in other places before flushing CB
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-06-27 18:46:12 +02:00
Marek Olšák
f9a7e7fe14 radeonsi: use #pragma pack to pack si_shader_key
sizeof(struct si_shader_key):
  Before reverting the 2 commits: 120 bytes
  After reverting the 2 commits: 128 bytes
  With #pragma pack: 107 bytes

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-06-27 18:45:07 +02:00
Marek Olšák
77d2a98353 Revert "radeonsi: use uint32_t to declare si_shader_key.opt.kill_outputs"
This reverts commit 7b2240ac9c.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-06-27 18:45:07 +02:00
Marek Olšák
dbe45e1180 Revert "radeonsi: remove 8 bytes from si_shader_key with uint32_t ff_tcs_inputs_to_copy"
This reverts commit 6b6fed3a3c.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-06-27 18:45:07 +02:00
Leo Liu
fad0b47219 radeon/vcn: enable h264 decode entension support
It's enabled through message buffer for UVD

Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
2017-06-27 10:59:44 -04:00
Charmaine Lee
b2e78e79d7 svga: clean up format_cap_table
Per Jose's suggestion, this patch cleans up format_cap_table to remove
the unnecessary default cap value for vgpu10 formats since those devcap values
can be retrieved from the device.

Tested with MTT conform, glretrace, piglit in HWv13 and HWv8.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2017-06-27 07:49:03 -06:00
Charmaine Lee
122ca27a48 svga: fix the default devcap for SVGA3D_Z_D24S8_INT
The default devcap for format SVGA3D_Z_D24S8_INT in HWv8 when its devcap is
not explicitly advertised should be set to zero to match the default value
in the device.

Tested with MTT piglit in HW version 8.

Reviewed-by: Neha Bhende <bhenden@vmware.com>
2017-06-27 07:49:02 -06:00
Charmaine Lee
eea6223184 svga: create buffer surfaces for incompatible bind flags
In cases where certain bind flags cannot be enabled together,
such as CONSTANT_BUFFER cannot be combined with any other flags,
a separate host surface will be created.
For example, if a stream output buffer is reused as a constant buffer,
two host surfaces will be created, one for stream output,
and another one for constant buffer. Data will be copied from the
stream output surface to the constant buffer surface.

Fixes piglit test ext_transform_feedback-immediate-reuse-index-buffer,
                  ext_transform_feedback-immediate-reuse-uniform-buffer

Tested with MTT piglit, MTT glretrace, Nature, NobelClinician Viewer, Tropics.

v2: Fix bind flags compatibility check as suggested by Brian.
v3: Use the list utility to maintain the buffer surface list.
v4: Use the SAFE rev of LIST_FOR_EACH_ENTRY

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2017-06-27 07:49:02 -06:00
Charmaine Lee
7abfb0b0d5 svga: do not unconditionally enable streamout bind flag
Currently we unconditionally enable streamout bind flag at
buffer resource creation time. This is not necessary if the buffer
is never used as a streamout buffer. With this patch, we enable
streamout bind flag as indicated by the state tracker. If the buffer
is later bound to streamout and does not already has streamout bind
flag enabled, we will recreate the buffer with
the new set of bind flags. Buffer content will be copied
from the old buffer to the new one.

Tested with MTT piglit, Nature, Tropics, Lightsmark.

v2: Fix bind flags check as suggested by Brian.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2017-06-27 07:49:02 -06:00
Charmaine Lee
b549f5e6b1 svga: pass tobind_flags to svga_buffer_handle
This is to prepare for more bind_flags optimization
in subsequent patches.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2017-06-27 07:49:02 -06:00
Charmaine Lee
4a79b508a4 svga: pass bind_flags to surface create functions
This is to prepare for other bind_flags optimization
in subsequent patches.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2017-06-27 07:49:02 -06:00
Brian Paul
ce608784d0 pipe_loader_sw: fix compilation warning
Add the new 'flags' parameter to pipe_loader_sw_create_screen().

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-06-27 07:49:02 -06:00
Lionel Landwerlin
3c50ebce25 i915: use different CFLAGS/LIBS variables than i965/anv
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2017-06-27 14:10:29 +03:00
Ilia Mirkin
4a79f2be33 nv50/ir: fix combineLd/St to update existing records as necessary
Previously the logic would decide that the record is kept, which
translates into keep = false in the caller, which meant that these
passes did not run.

While it's right that keep = false which means that a new record does
not need to be added, we do still have to perform the usual list
maintenance. It's easiest to do this pre-merge rather than post.

The lowering that clip/cull distance passes produce triggers this bug in
TCS (since reading outputs is done differently in other stages), but it
should be possible to achieve it with the right sequence of regular
reads/writes.

Fixes: KHR-GL45.cull_distance.functional
Fixes: generated_tests/spec/arb_tessellation_shader/execution/tes-input/tes-input-gl_ClipDistance.shader_test
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
2017-06-26 20:24:19 -04:00
Ilia Mirkin
7d56ae5eb2 nv50/ir: adjust overlapping logic to take fileIndex-relative offsets
If the fileIndex is different, that means they are in logically
different spaces. However if there's also a relative offset, then they
could end up pointing at the same spot again.

Also add a note about potential for multiple buffers to overlap even if
they're at different file indexes. However that's potentially lowered
away by the point that this logic hits.

Not known to fix any specific application or test.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2017-06-26 20:24:19 -04:00
Ilia Mirkin
55a8c11705 nv50/ir: VFETCH is also considered a load for MemoryOpt
This has no effect since in practice this will only play for
memory-backed files, for which VFETCH will never happen.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2017-06-26 20:24:19 -04:00
Ilia Mirkin
c12f8305a8 nv50,nvc0: remove IDX from bufctx immediately, to avoid conflicts with clear
The idxbuf could linger, and when a clear happened, which also uses the
3d bufctx, we could get an error trying to access it.

This fixes spurious crashes/errors in CTS tests.

Fixes: 61d8f3387d ("nv50,nvc0: clear index buffer bufctx bin unconditionally")
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
2017-06-26 20:23:04 -04:00
Ilia Mirkin
8c02ee4a8b nv50/ir: fetch indirect sources BEFORE the op that uses them
All the BuildUtil helpers just insert the operation into the current BB.
So we have to take care that any fetchSrc() operations happen before the
operation whose setIndirect() it goes into.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
2017-06-26 20:22:46 -04:00
Rob Herring
c4291a3283 Android: add renderonly files to libmesa_gallium
vc4 now depends on renderonly functions, but these weren't added to the
Android build resulting in the following errors:

src/gallium/drivers/vc4/vc4_resource.c:380: error: undefined reference to 'renderonly_scanout_destroy'
src/gallium/drivers/vc4/vc4_resource.c:681: error: undefined reference to 'renderonly_create_gpu_import_for_resource'
src/gallium/drivers/vc4/vc4_screen.c:625: error: undefined reference to 'renderonly_dup'
src/gallium/winsys/pl111/drm/pl111_drm_winsys.c:37: error: undefined reference to 'renderonly_create_gpu_import_for_resource'
src/gallium/winsys/pl111/drm/pl111_drm_winsys.c:37: error: undefined reference to 'renderonly_create_gpu_import_for_resource'

Fixes: 7029ec05e2 ("gallium: Add renderonly-based support for pl111+vc4.")
Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2017-06-26 16:10:42 -07:00
Marek Olšák
ccf963ed29 radeonsi: don't flush and wait for CB after depth-only rendering
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-06-26 23:35:19 +02:00
Lucas Stach
28550c7875 etnaviv: only flush resource to self if no scanout buffer exists
Currently a resource flush may trigger a self resolve, even if a scanout buffer
exists, but is up to date. If a scanout buffer exists we only ever want to
flush the resource to the scanout buffer. This fixes a performance regression.

Fixes: dda956340c (etnaviv: resolve tile status when flushing resource)
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2017-06-26 20:06:01 +02:00
Christian Gmeiner
d8b2ccdb88 etnaviv: add support for snorm textures
Based on a patch from Wladimir J. van der Laan and untested due
to lack of hardware. Binary blob emits those formats if GPU supports
HALTI1 (faked with ibvivhook).

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Wladimir J. van der Laan <laanwj@gmail.com>
2017-06-26 19:59:42 +02:00
Christian Gmeiner
3bbf8dcfe4 etnaviv: add R8G8 texture support
Passes texwrap GL_ARB_texture_rg piglit (with faked full texture rg support).

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Wladimir J. van der Laan <laanwj@gmail.com>
2017-06-26 19:56:59 +02:00
Christian Gmeiner
751ae6afbe etnaviv: add support for swizzled texture formats
Passes all ext_texture_swizzle piglits.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-By: Wladimir J. van der Laan <laanwj@gmail.com>
2017-06-26 19:56:39 +02:00
Christian Gmeiner
0ddcccac4f etnaviv: add support for extended texture formats
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Wladimir J. van der Laan <laanwj@gmail.com>
2017-06-26 19:49:30 +02:00
Bruce Cherniak
6fafba0e67 swr: set an explicit clear_rect if scissor is not enabled.
Fix regression of "no rendering" on simple apps like glxgears by
setting an explicit full surface clear_rect when scissor is not
enabled.

This regressed with commit 00173d91 "st/mesa: don't set 16
scissors and 16 viewports if they're unused" due to an assumption
that a default scissor rect is always set, which was the case prior
to this optimization.

Reviewed-by: Tim Rowley <timothy.o.rowley@intel.com>
2017-06-26 11:30:08 -05:00
Tim Rowley
0e1e5a2b14 swr/rast: adjust std::string usage to fix build
Some combinations of c++ compilers and standard libraries had problems
with the string::replace code we were using previously.

This should fix the travis-ci system.

Tested-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-06-26 11:29:27 -05:00
Nicolai Hähnle
f17d78becc radeonsi: support indirect indexing in INTERP_* opcodes
The hardware doesn't support it, so we just interpolate all array elements
and then use indirect indexing on the resulting vector.

Clearly, this is not very efficient. There is an argument to be had for
adding if/else, or perhaps even pulling the data out of LDS directly.
Both don't really seem worth the effort, considering that it seems nobody
actually uses this feature.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-06-26 14:02:06 +02:00
Constantine Charlamov
abc7b110b6 r600g: fix crash when file in R600_TRACE doesn't exist
…and print error in such case. Which probably is not a rare event btw
because fopen doesn't expand ~ to $HOME.

Also get rid of unused "bool ret" variable.

Signed-off-by: Constantine Kharlamov <Hi-Angel@yandex.ru>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-06-26 17:39:54 +10:00
Constantine Charlamov
3d466f3e9f r600g: take into account offset to system inputs at tgsi_interp_egcm()
Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=100785

v2: I was too much twiddling whether to initialize nsys_inputs at the beginning of shader initialization or for allocation of system values, and by the time I decided to go with the first one, I forgot to change it back.

Signed-off-by: Constantine Kharlamov <Hi-Angel@yandex.ru>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-06-26 16:32:36 +10:00
Constantine Charlamov
469e2ed473 r600g: get rid of trailing whitespace
Signed-off-by: Constantine Kharlamov <Hi-Angel@yandex.ru>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-06-26 16:30:10 +10:00
Dave Airlie
27380d6b3e r600/asm: add support for other GDS operations.
This adds support for the GDS operations needed to do atomic
counters.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-06-26 16:27:51 +10:00
Dave Airlie
ccab3f7e1b r600: don't merge GDS into VTX
We don't want vtx/tex instructions ending up in GDS sections.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-06-26 16:23:21 +10:00
Dave Airlie
043f16eba1 r600: for memory instructions dump index gpr for read indirects also.
This just makes sure we can see the index gpr in the asm dumps.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-06-26 16:23:21 +10:00
Dave Airlie
ac8fb9800a r600: add support for vertex fetches via texture cache
On evergreen we can route vertex fetches via the texture cache,
and this is required for some images support. So add support
to the asm builder for it.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-06-26 16:23:20 +10:00