Commit graph

2585 commits

Author SHA1 Message Date
Marek Olšák
c5c6e0187f ac/surface: fix MSAA corruption on Vega due to FMASK tile swizzle
a needle in the haystack?

Cc: 18.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-07-31 22:56:40 -04:00
Marek Olšák
20dd75a926 radeonsi: use storage_samples instead of color_samples in most places
and use pipe_resource::nr_storage_samples instead of
r600_texture::num_color_samples.

Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
2018-07-31 18:28:41 -04:00
Mauro Rossi
0ca153f869 android: radv: enable build of vulkan.radv HAL module
src/amd/Android.mk requires to include src/amd/vulkan/Android.mk
to enable the build of vulkan.radv module

Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Reviewed-by: Robert Foss <robert.foss@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2018-07-28 12:40:14 +02:00
Mauro Rossi
212af3c9ea android: radv: add Android.mk for vulkan.radv HAL module
radv implements the Android Vulkan HAL interface, this patch adds
Android.mk building rules by porting of radv automake rules.
vendor HAL module is installed as /vendor/lib/hw/vulkan.radv.so

Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2018-07-28 12:40:07 +02:00
Mauro Rossi
1eb65c51ad radv: generate entrypoints for VK_ANDROID_native_buffer
Patch changes radv entrypoints generator to not skip this extension even
though it is set as disabled in the vk.xml

Reference: 63525ba730 ("android: enable VK_ANDROID_native_buffer")
Fixes: 69f447553c ("vulkan: Drop vk_android_native_buffer.xml")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Robert Foss <robert.foss@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2018-07-28 12:39:57 +02:00
Mauro Rossi
c67b36c8a1 radv: move vk_format_table.c to generated sources
Android build system will try to compile vk_format_table.c
as a shipped source, but at compile time it will be missing,
we move it to generated source, where it belongs

Fixes: f4e499ec79 ("radv: add initial non-conformant radv vulkan driver")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Robert Foss <robert.foss@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2018-07-28 12:39:49 +02:00
Timothy Arceri
77207e5380 ac: pass write param to get_sampler_desc() from get_image_descriptor()
Looks like a mistake from when the deref stuff landed.

Fixes: 506a07e4e3 ("ac/nir: Add deref support to image intrinsics.")
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-07-28 08:57:03 +10:00
Dave Airlie
5040319331 radv: fix cdw check vs tracing emit
If we have tracing enabled we could do all the tracing emits
and overflow the precalculated cdw_max.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2018-07-28 06:20:27 +10:00
Dave Airlie
b88468f15c radv: return binary code_size not variant code size to cache
The code sizes return here get passed to the cache shader insert function,
which then memcpy from the code ptr, and causes all sorts of valgrind
errors like:
==6755== Invalid read of size 8
==6755==    at 0x4C32FEE: memcpy@GLIBC_2.2.5 (vg_replace_strmem.c:1021)
==6755==    by 0x2305D4C7: radv_pipeline_cache_insert_shaders (radv_pipeline_cache.c:416)
==6755==    by 0x2305791D: radv_create_shaders (radv_pipeline.c:2158)
==6755==    by 0x2305C523: radv_pipeline_init (radv_pipeline.c:3404)
==6755==    by 0x2305C890: radv_graphics_pipeline_create (radv_pipeline.c:3515)
==6755==    by 0x230188AB: radv_device_init_meta_blit_color (radv_meta_blit.c:871)
==6755==    by 0x2301D50E: radv_device_init_meta_blit_state (radv_meta_blit.c:1278)
==6755==    by 0x23011893: radv_device_init_meta (radv_meta.c:352)
==6755==    by 0x2300744B: radv_CreateDevice (radv_device.c:1576)
==6755==    by 0x5187D0F: ??? (in /usr/lib64/libvulkan.so.1.1.77)
==6755==    by 0x518F6A3: ??? (in /usr/lib64/libvulkan.so.1.1.77)
==6755==    by 0x5192A42: vkCreateDevice (in /usr/lib64/libvulkan.so.1.1.77)
==6755==  Address 0x22a58548 is 4 bytes after a block of size 116 alloc'd
==6755==    at 0x4C2EBAB: malloc (vg_replace_malloc.c:299)
==6755==    by 0x23089DC4: ac_elf_read (ac_binary.c:144)
==6755==    by 0x23090A60: ac_compile_module_to_binary (ac_llvm_helper.cpp:162)
==6755==    by 0x23053F06: compile_to_memory_buffer (radv_llvm_helper.cpp:58)
==6755==    by 0x23053F06: radv_compile_to_binary (radv_llvm_helper.cpp:98)
==6755==    by 0x23052769: ac_llvm_compile (radv_nir_to_llvm.c:3394)
==6755==    by 0x23052823: ac_compile_llvm_module (radv_nir_to_llvm.c:3418)
==6755==    by 0x23053C05: radv_compile_nir_shader (radv_nir_to_llvm.c:3542)
==6755==    by 0x23061B4E: shader_variant_create (radv_shader.c:580)
==6755==    by 0x23061CFD: radv_shader_variant_create (radv_shader.c:634)
==6755==    by 0x23057765: radv_create_shaders (radv_pipeline.c:2123)
==6755==    by 0x2305C523: radv_pipeline_init (radv_pipeline.c:3404)
==6755==    by 0x2305C890: radv_graphics_pipeline_create (radv_pipeline.c:3515)

Since we are just inserting the code into the cache, we can avoid these
bad reads and data in the cache by just using the binary code size here.

Fixes: 939e5a382 (radv: add padding for the UMR disassembler)
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2018-07-28 06:20:20 +10:00
Samuel Pitoiset
df679b1643 radv: allocate enough space in radv_cmd_buffer_after_draw()
The driver might emit up to 4 dwords when RADV_TRACE_FILE is
used.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-07-27 14:31:29 +02:00
Samuel Pitoiset
c08ae911d9 radv: check CS space in radv_emit_write_data_packet()
This wasn't wrong but it looks better to me like this. It's
only used for debugging purposes (ie. RADV_TRACE_FILE).

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-07-27 14:31:27 +02:00
Samuel Pitoiset
434630f57c radv: do not emit pipeline stats flushes on compute queue
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-07-27 14:31:26 +02:00
Samuel Pitoiset
c118c8938c radv: reduce CB/DB meta flushes in radv_dst_access_flush()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-07-27 14:31:24 +02:00
Kenneth Graunke
0c4e0471f5 radv: Fix build
I renamed this pass and forgot to update radv.

Fixes: 488972222c ("i965: Combine both gl_PatchVerticesIn lowering passes.")
2018-07-26 23:57:13 -07:00
Bas Nieuwenhuizen
3665f66ef2 radv: Add support for ETC2 textures.
Was surprised that is even supported by Vega.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2018-07-27 01:31:32 +02:00
Samuel Pitoiset
ff0d553818 radv: fix adjusting vertex fetches since 16bit support
Move the integer conversion after the fixup.

This fixes some regressions with
dEQP-VK.pipeline.vertex_input.single_attribute.mat4.as_a2r10g10b10*

Fixes: b722b29f10 ("radv: add support for 16bit input/output")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-07-26 08:57:43 +02:00
Marek Olšák
ce8e6b970b ac: fix typo DSL_SEL -> DST_SEL 2018-07-26 01:45:47 -04:00
Karol Herbst
7f95564a22 nir: rename f2f16_undef to f2f16
we need rounding modes on other conversions involving floats and it is easier
to rename f2f16_undef than renaming all the other ones.

v2: rebased on master

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Karol Herbst <kherbst@redhat.com>
2018-07-24 20:40:05 +02:00
Mathieu Bridon
9ebd8372b9 python: Use range() instead of xrange()
Python 2 has a range() function which returns a list, and an xrange()
one which returns an iterator.

Python 3 lost the function returning a list, and renamed the function
returning an iterator as range().

As a result, using range() makes the scripts compatible with both Python
versions 2 and 3.

Signed-off-by: Mathieu Bridon <bochecha@daitauha.fr>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2018-07-24 11:07:04 -07:00
Mathieu Bridon
5530cb1296 python: Better iterate over dictionaries
In Python 2, dictionaries have 2 sets of methods to iterate over their
keys and values: keys()/values()/items() and iterkeys()/itervalues()/iteritems().

The former return lists while the latter return iterators.

Python 3 dropped the method which return lists, and renamed the methods
returning iterators to keys()/values()/items().

Using those names makes the scripts compatible with both Python 2 and 3.

Signed-off-by: Mathieu Bridon <bochecha@daitauha.fr>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
2018-07-24 11:07:04 -07:00
Bas Nieuwenhuizen
28b8c18d84 radv: Still enable inmemory & API level caching if disk cache is not enabled.
That we don't have a background disk cache does not mean we should
prevent the app caching anything.

CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2018-07-24 18:06:41 +02:00
Tom Stellard
0866edede0 radeonsi: Add debug option to enable LLVM GlobalISel (v2)
R600_DEBUG=gisel will tell LLVM to use GlobalISel rather than
SelectionDAG for instruction selection.

v2: mareko: move the helper to src/amd/common

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Tom Stellard <tstellar@redhat.com>
2018-07-23 20:23:48 -04:00
Daniel Schürmann
62024fa775 radv: enable VK_KHR_16bit_storage extension / 16bit storage features
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-07-23 23:16:26 +02:00
Daniel Schürmann
4d0b02bb5a ac: add support for 16bit load_push_constant
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-07-23 23:16:25 +02:00
Daniel Schürmann
b722b29f10 radv: add support for 16bit input/output
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-07-23 23:16:25 +02:00
Daniel Schürmann
7e7ee82698 ac: add support for 16bit buffer loads
v2: Fixed dvec3 loads (bas)

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-07-23 23:16:25 +02:00
Daniel Schürmann
a6a21e651d ac: add support for 16bit UBO loads
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-07-23 23:16:25 +02:00
Daniel Schürmann
3109c5257b ac: add support for 16bit ssbo stores
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-07-23 23:16:25 +02:00
Daniel Schürmann
f582367d49 ac: add 16bit conversion operations
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-07-23 23:16:25 +02:00
Samuel Pitoiset
6c58bc8d9c radv: print a big warning when RADV_TRACE_FILE is set
Users shouldn't use this debugging option except when we
ask them to do!

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-07-23 11:34:42 +02:00
Samuel Pitoiset
6e32d9e7b0 radv: fix a memleak for merged shaders on GFX9
modules[i] can be NULL for merged shaders but we have to
free the NIR code. radv_can_dump_shader_stats() already handles
if modules[i] is NULL, no need to check it twice.

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-07-23 11:34:39 +02:00
Samuel Pitoiset
1efc9094e0 radv: don't flush DB before subpass FS resolves
That shouldn't be needed because the DB state is invalid.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-07-20 17:30:13 +02:00
Samuel Pitoiset
ce454d02cc radv: simplify a condition in radv_src_access_flush()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-07-20 10:17:17 +02:00
Samuel Pitoiset
1ff25c4e6b radv: save current state just before resolving with FS
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-07-20 10:17:15 +02:00
Samuel Pitoiset
c3d5f124c6 radv: don't check if a subpass has resolve attachments twice
We already check that in radv_cmd_buffer_resolve_subpass().

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-07-20 10:17:13 +02:00
Samuel Pitoiset
0a8127bbfb radv: make use of radv_subpass_barrier() when resolving subpasses
The goal is to use radv_barrier()/radv_subpass_barrier() as
much as possible for further optimizations.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-07-20 10:17:11 +02:00
Samuel Pitoiset
3d41757788 ac/nir: add a workaround for bitfield_extract when count is 0
LLVM 7 returns incorrect results when count is 0, something
has been broken since LLVM 6. Of course, the best solution is
to fix LLVM but this workaround works as expected for now.

Original workaround by Philippe Rebohle.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107276
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-07-19 20:41:10 +02:00
Danylo Piliaiev
494a206229 radv: Fix incorrect assumption about ternary operator precedence
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2018-07-19 10:04:27 +02:00
Marek Olšák
9b82d128c9 ac: run LLVM optimization passes only on the final function after inlining 2018-07-19 00:58:49 -04:00
Bas Nieuwenhuizen
17b5a59b4e radv: Enable binning and dfsm by default on Raven.
Seems like it increases performance by 2-3% for some demos and games.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2018-07-19 02:38:21 +02:00
Bas Nieuwenhuizen
978570769d radv: Always set disable zpass increment bit when possible.
When no occlusion queries are active even if out of order is enabled.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2018-07-19 02:38:10 +02:00
Bas Nieuwenhuizen
82664af6cf radv: Select correct entries for binning.
Overshot it by one every time.

CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2018-07-19 02:38:01 +02:00
Bas Nieuwenhuizen
760211b77c radv: Fix number of samples used for binning.
Used the wrong register ...

CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2018-07-19 02:37:54 +02:00
Bas Nieuwenhuizen
c0144e915a radv: Disable disabled color buffers in rbplus opts.
CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2018-07-19 02:37:47 +02:00
Andres Rodriguez
d3d9513556 radv: fix wmaybe-uninitialized in radv_meta_fast_clear.c
Assignment and usage of this variable both happen inside an
if(rad_image_has_dcc()) {} blocks. It seems gcc plays it safe and
assumes that both function calls could have different return values.

But in this case we should be safe.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2018-07-18 15:32:51 -04:00
Samuel Pitoiset
e45ba51ea4 radv: add support for VK_EXT_conditional_rendering
Inherited commands buffers are not supported.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-07-18 13:44:09 +02:00
Samuel Pitoiset
946cf3f39f radv: add support for non-inverted conditional rendering
By default, our internal rendering commands are discarded
only if the predicate is non-zero (ie. DRAW_VISIBLE). But
VK_EXT_conditional_rendering also allows to discard commands
when the predicate is zero, which means we have to use a
different flag.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-07-18 13:44:06 +02:00
Samuel Pitoiset
4d99caf590 radv: set the predicate for indirect/indexed draw commands
VK_EXT_conditional_rendering allows to discard draw commands
(not only normal draws).

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-07-18 13:44:04 +02:00
Samuel Pitoiset
1e83f65673 radv: set the predicate for dispatch commands
VK_EXT_conditional_rendering allows to discard dispatch commands.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-07-18 13:44:01 +02:00
Samuel Pitoiset
1376f2824f radv: remove unused variable in radv_CreateRenderPass2KHR()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2018-07-18 10:54:42 +02:00