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4 commits

Author SHA1 Message Date
Jordan Justen
7a03fb9ccb genxml: Add L3 Cache Control register definitions 
Based on intel_reg.h (5912da45a6)

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
 2016-03-24 23:49:53 -07:00
Jason Ekstrand
e941fd8470 genxml: Make the border color pointer consistent across gens 2016-03-01 14:43:05 -08:00
Jason Ekstrand
82d2db80bb genxml: Add MOCS fields to RENDER_SURFACE_STATE 
This allows us to set MOCS as a single uint32_t on all platforms.
 2016-02-27 10:26:13 -08:00
Jason Ekstrand
f6d9587688 vulkan: Move XML and generator into src/intel/genxml 2016-02-18 10:30:29 -08:00
Renamed from src/vulkan/gen9.xml (Browse further)