pandecode_cs() does both the decoding and the interpretation.
Rename the function to avoid the confusion.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32284>
Everything else is prefixed cs, not ceu, so let's drop the remaining
ceu occurrences.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32284>
Despite the name, disassemble_ceu_instr() does more than disassembling
the instruction, it also partially interpret it.
Add a print_cs_instr() helper that does just the disassembling/printing
part, and move the remaining of disassemble_ceu_instr() to
interpret_ceu_instr().
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32284>
Will be useful when we start allocating exception handlers from a
memory pool that grows over time without having to fix a maximum
handler size.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32353>
Useful to reserve only what we need for spilling regs.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32353>
This commit provides a block-like macro to to define exception handlers
instead of requiring the user to call the start/end helpers.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31941>
Make the register dump address dynamic instead of passing it at handler
creation time. This is needed for PanVK if we want to re-use the same
handlers for different VkQueues, since the dump buffer needs to be per
VkQueue.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31941>
Align exception handlers to cache lines to allow having multiple
exception handlers in the same BO.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31941>
This allows us to modify the exception handler start arguments without
having to modify the function declaration.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31941>
Add support for masks to reg_perm in order to not erroneously hit
asserts for restricted registers that are parts of tuples but are not
read/written to due to register mask.
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31941>
Update panfrost to add support for NV16 and for the 10 bit
NV15 and NV20 formats.
Signed-off-by: Eric R. Smith <eric.smith@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31854>
Some MTK display controller drivers support only this AFBC modifier.
Give it a chance to use AFBC for scanout resources.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Reviewed-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31948>
When dealing with AFBC render targets using wide blocks, the GPU needs to
keep rendering tiles that are a multiple of 16x16. This is described
as AFBC render block size, and adds extra constraints:
- render target buffers need to be aligned on 16 pixels in the vertical
direction, even if the AFBC super block size is 4 or 8 pixels.
- if the effective tile size is smaller than the render block size, we
should force a clean write and discard+ignore the CRC
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Reviewed-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31948>
On all previous GPUs, the effective tile size was limited to 16x16, but
it got increased on v10. Add an helper to query this maximum effective
tile size.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Reviewed-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31948>
This allows using the tile size to make decisions not related to the
framebuffer descriptor. Mainly, for the near future, to decide
whether some tiling hierarchy levels should be disabled.
The color buffer allocation size is also calculated at the same time
as it's using common data underneath.
Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31948>
AFBC body is required to be aligned on 128 bytes on v6+ hardware.
Cc: mesa-stable
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Reviewed-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31948>
On modern Mali GPUs, we can have 16 bits for the X and Y sizes, already
overflowing 32-bit barrier even with a single layer of byte-sized
formats.
So let's make sure we have enough bits to avoid overflows here.
Fixes: d5ed77800e ("panvk: Fix GetPhysicalDeviceProperties2() to report accurate info")
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32221>
In case of nested if/else, the current block will not be the loop block.
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.cim>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31843>
Panfrost currently doesn't support priorities, assumes default priority as
medium to properly support global priorities on Vulkan.
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31961>
Commit 0e6aaab00a ("pan/cs: add block to handle registers backup in
exception handler") broke the lazy allocation case by checking the
current chunk capacity too early.
Fixes: 0e6aaab00a ("pan/cs: add block to handle registers backup in exception handler")
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Tested-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Reviewed-by: Rebecca Mckeever <rebecca.mckeever@collabora.com>
Tested-by: Rebecca Mckeever <rebecca.mckeever@collabora.com>
Reviewed-by: Benjamin Lee <benjamin.lee@collabora.com>
Tested-by: Benjamin Re <benjamin.lee@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31884>
This code isn't really wrong, but it makes some assumptions that are a
bit hard to grok. Let's thread a bit more carefully, by adding an assert
that hopefully clears things up a tad.
We area after all choosing in the range of RAW8 to RAW128.
CID: 1605056
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31767>
CRCs don't become valid if the GPU omits pushing clean tiles to memory.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31771>
CRC values are prefetched in 32x32 regions so we need to round up
the framebuffer size to account for that.
Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31771>
For now, the flag enables these checks for CSF-based GPUs:
- registers are not used as a source after being loaded without a
WAIT() in the middle
- registers are not reused (used as a destination) after they
served as a STORE() source without a WAIT() in the middle
Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31174>
It's gonna be used to save and restore registers content when an
exception handler is executed as to not interfere with normal
operation.
Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31174>
It is only needed for pending `if` block as it's the only block
we don't end normally and where instructions are only flushed when
we are certain that no `else` branch is gonna be added.
It also collide with scenarios where we want to add a preamble
before inserting a block.
Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31174>
Move pan_blitter.{c,h} to the gallium driver and rename it
pan_fb_preload to reflect the fact it's not a generic blitter framework.
While at it, get rid of the remaining generic blitting bits and pick
better names for objects related to the preload stuff in
panfrost_{device,screen}.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31441>
This has several advantages over using pan_blitter for that:
- we can catch allocation failures and flag the command buffer invalid
- we can re-use the vk_meta_device object list to keep track of our
preload shaders
- we can re-use surface descriptors instead of re-emitting them every
time a preload is done
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Acked-by: Eric R. Smith <eric.smith@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31441>
To avoid increasing memory usage, make sure we pack this together with
the hw format.
This will be used in the next commit.
Fixes: 0c1fde956b ("panfrost: Add Valhall compressed formats")
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31419>
This reduces some duplication, and we're going to start needing the
texfeat format on valhall anyway...
Fixes: 0c1fde956b ("panfrost: Add Valhall compressed formats")
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31419>
panthor_kmod_vm_bind() is usually called with a single op and at most
one sync, so let's optimize the low-number-of-ops-or-syncs case to
avoid transient heap allocation.
This also fixes some dEQP-VK.api.object_management.alloc_callback_fail.*
crashes where panthor_kmod_vm_bind(UNBIND) is called and not expected
to fail.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31382>
While a resource entry indeed has an alignment requirement of 16 byte,
the resource table itself needs to be aligned on 64-byte. Given the
alignment is only used for allocation, make it 64 byte in the XML (as
done in v10.xml).
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31440>
Surface descriptors need to be aligned on 16-byte.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31440>
Those don't exist on Bifrost.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31440>
When alpha_to_coverage is enabled, the zs_update_operation field
must be set to force_late, according to (some of) the documentation.
Actually the docs are ambiguous; the main thrust is that late coverage
updates are only required when Z or S is written, or when occlusion
queries are enabled. But there is a side note in a table that indicates
force_late should be used for coverage updates even if Z or S is not
written.
Logically this shouldn't be necessary and the note is probably
just lazily written. But it turns out that we do seem to need the
force_late setting on valhall. It's currently unclear whether
there's a hardware issue on valhall, or some other issue.
Fixes piglit ext_framebuffer_multisample-*alpha-to-coverage* tests
on valhall.
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Acked-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31181>
This adds support for the new DEV_QUERY_GROUP_PRIORITIES_INFO query from
panthor to report and will be used to report appropriate priority mask
in the Gallium driver.
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30991>
When SAMPLE_ALPHA_TO_ONE is enabled we need to use a blend shader, as
the BlendDescriptor.alpha_to_one bit is deprecated (does not work)
on bifrost and valhall.
In order to generate the appopriate blend shader code, we must put the
alpha_to_one status into pan_blend_state.
Signed-off-by: Eric R. Smith <eric.smith@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31194>
If A8_UNORM isn't specified in the format table, then it is emulated
in the state tracker by RGBA8. This is suboptimal, both because it requires
more memory, and because the blit gets more complicated (and in fact there's
a bug currently in the blit code where we don't mask properly for GL_ALPHA).
Fix this by adding an explicit A8_UNORM format entry.
Fixes piglit test ext_framebuffer_multisample-blit-mismatched-formats.
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31322>
In traces produced with PAN_MESA_DEBUG, print swizzles in human readable
form (like BGRA) as well as the raw decimal format we were printing
before. This is purely a convenience feature for developers.
Reviewed-by: Boris Brezilllon <boris.brezillon@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31242>
The layer offset is a 9-bit signed integer, not an 8-bit unsigned.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Tested-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31227>
Compared to Bifrost, Valhall slightly improved layered rendering in
that you no longer need one IDVS job per layer. But they didn't quite
unleash things, because tiler descriptors still have a limited amount
of layers they can deal with, forcing us to emit more than one IDVS/tiler
descriptor per draw call if the number of layer exceeds this limit.
In order to specify where the starting point, a
{layer_offset,internal_layer_index} field has been added, so we need to
extend pan_tiler_context to pass this information and let the common
logic adjust the framebuffer internal_layer_index accordingly.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Tested-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31227>
