12 commits

Author	SHA1	Message	Date
Jason Ekstrand	f374765ce6	anv/cmd_buffer: Mask stencil reference values	2016-03-04 12:22:32 -08:00
Jason Ekstrand	ec18fef88d	anv/pipeline: Set StencilBufferWriteEnable from the pipeline ... The hardware docs say that StencilBufferWriteEnable should only be set if StencilTestEnable is set. It seems reasonable to set them together.	2016-03-04 12:03:00 -08:00
Jason Ekstrand	fa8539dd6b	anv/pipeline: Respect pRasterizationState->depthBiasEnable	2016-03-04 12:03:00 -08:00
Jason Ekstrand	6e20c1e058	anv/cmd_buffer: Look at both sides for stencil enable ... Now it's all consistent with gen9	2016-03-01 11:03:29 -08:00
Jason Ekstrand	4cfdd16500	anv/cmd_buffer: Clean up stencil state setup on gen7	2016-03-01 11:02:21 -08:00
Jason Ekstrand	097564bb8e	anv/cmd_buffer: Dirty push constants when changing pipelines.	2016-02-29 14:36:24 -08:00
Jason Ekstrand	d29fd1c7cb	anv/cmd_buffer: Re-emit push constants packets for all stages	2016-02-29 14:36:24 -08:00
Jordan Justen	1af5dacd76	anv/gen7: Enable SLM in L3 cache control register ... Port 1983003 to gen7. Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>	2016-02-28 11:54:49 -08:00
Jason Ekstrand	ad50896c87	anv/gen7: Only try to get the depth format the surface has depth	2016-02-27 11:23:18 -08:00
Jason Ekstrand	1f1cf6fcb0	anv: Get rid of GENX_FUNC ... It was a bad idea.	2016-02-20 09:12:38 -08:00
Jason Ekstrand	371b4a5b33	anv: Switch over to the macros in genxml	2016-02-20 09:09:28 -08:00
Jason Ekstrand	9851c8285f	Move the intel vulkan driver to src/intel/vulkan	2016-02-18 10:37:59 -08:00

Renamed from src/vulkan/gen7_cmd_buffer.c (Browse further)