Commit graph

144 commits

Author SHA1 Message Date
Michael Cheng
24aa7715cb intel/ds: Label selected draw events with vertex count
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Format draw and draw_indexed Perfetto events with their vertex count.
For draw_indirect and draw_indexed_indirect, include the draw count
when indirect tracing is enabled (MESA_GPU_TRACES=indirects), otherwise
fall back to the static name.

Signed-off-by: Michael Cheng <michael.cheng@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41374>
2026-05-08 19:51:48 +00:00
Michael Cheng
e8b6f61a50 intel/ds: Label compute events with dispatch dimensions in Perfetto
Format compute events as compute(x,y,z) using the end-payload group
dimensions. Trailing dimensions that equal 1 are omitted to keep labels
concise — e.g. compute(128,1,1) becomes compute(128).

For compute_indirect, the dispatch dimensions are not known at command
record time since they live in GPU memory as a VkDispatchIndirectCommand.
The u_trace framework reads them back at trace flush time via the
is_indirect mechanism: the GPU address is recorded alongside the
tracepoint, and u_trace copies the pointed-to struct into indirect_data
once the GPU has finished. The same trailing-1 trimming is applied when
indirect tracing is enabled (MESA_GPU_TRACES=indirects); otherwise the
event falls back to the static "compute_indirect" name.

Signed-off-by: Michael Cheng <michael.cheng@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41374>
2026-05-08 19:51:48 +00:00
Michael Cheng
ecbc6625cf intel/ds: Add end_event_dyn() and CREATE_DUAL_EVENT_CALLBACK_DYN macro
Add a separate end_event_dyn() that takes a std::string by value for
dynamic event names. The [=] lambda capture deep-copies the string into
the closure, avoiding a dangling pointer when the Trace() continuation
runs after the caller's stack frame is gone.

The existing end_event() with const char* remains for string literals
and long-lived pointers (e.g. payload->str), where no copy is needed.

CREATE_DUAL_EVENT_CALLBACK_DYN formats the event name via snprintf and
passes the result as a std::string to end_event_dyn(). Follow-up patches
will use this macro to label events with runtime dimensions.

Signed-off-by: Michael Cheng <michael.cheng@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41374>
2026-05-08 19:51:48 +00:00
Lionel Landwerlin
e69062f8c9 anv: track generated commands work with perfetto
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31384>
2026-05-06 09:49:50 +00:00
Michael Cheng
06c9c08c48 intel/ds: report when OA metrics are unavailable
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Promote DBG() failure paths in enumerate_sysfs_metrics() to mesa_logw()
so users see why OA metrics are unavailable without needing INTEL_DEBUG.
Also log in PPS when no OA queries are available after initialization.

Signed-off-by: Michael Cheng <michael.cheng@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40898>
2026-04-13 21:31:51 +00:00
Michael Cheng
16c17d6698 intel/ds: report when OA metric access is blocked by kernel policy
When observation_paranoid (xe) or perf_stream_paranoid (i915) prevents
unprivileged access to OA metrics, the existing code silently returns no
OA queries. PPS then fails with just a segfault.

This patch adds INTEL_PERF_FEATURE_OA_BLOCKED_BY_POLICY to
intel_perf_features, set by both KMD backends when the paranoid sysctl
exists but lacks sufficent privilage. PPS checks this flag immediately
after initialising intel_perf and returns an error before  attempting
metric-set selection.

Signed-off-by: Michael Cheng <michael.cheng@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40898>
2026-04-13 21:31:51 +00:00
Casey Bowman
007be58ade intel/ds: Modify rejection threshold to scale with requested sample period
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Previously, we only checked if the hardware duration was greater
than the requested sample period by 1000 ns. This can lead the
hardware duration to be rejected and use the next cycle, which
is double the size of the current duration.

At larger requested sample size, this can mean getting a hardware
duration of 1.7 ms for a requested sample period of 1 ms.

To fix this, we'll scale the check so that it uses 67% of the
requested sample period as the reject threshold. This way, if the
hardware duration is below 67%, it's guaranteed to be within
100%-133% of the requested sample period on the next hardware interval.

Signed-off-by: Casey Bowman <casey.g.bowman@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40735>
2026-04-02 18:56:16 +00:00
Renato Pereyra
63a5d3b6c4 intel: Include available counter descriptions in the perfetto counter spec
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Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40233>
2026-03-06 08:47:16 +00:00
Renato Pereyra
d9929a03e8 intel: Add pid and tid to Vulkan QueueSubmit events
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40233>
2026-03-06 08:47:16 +00:00
Lionel Landwerlin
8a5ac96a67 anv: predicate BTP emissions
The previous commit enable different command buffers to program the
same 3DSTATE_BINDING_TABLE_POOL_ALLOC instruction even though they
allocated different chunks of binding tables.

Now we can just predicate this programming and skip the stalling,
flushing & invalidation.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39527>
2026-02-25 00:17:03 +00:00
Lionel Landwerlin
15174b185b anv: instrument resource barriers instruction in u_trace
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38707>
2025-12-15 08:25:42 +00:00
Lionel Landwerlin
85a117bc37 anv: track descriptor mode in SBA tracepoint
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38479>
2025-11-17 15:06:55 +00:00
Lionel Landwerlin
cff047280a anv: avoid invalid timestamp generation due to skipped commands
We skip the stall emission for STATE_BASE_ADDRESS since this one can
be skipped on Gfx12.5+ and instead add a new sba tracepoint that has
valid timestamps.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 0147908a89 ("anv: predicate emission of STATE_BASE_ADDRESS")
Reviewed-by: Casey Bowman <casey.g.bowman@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38256>
2025-11-05 22:27:06 +00:00
Felix DeGrood
faddb5d497 anv/pps: remove assert for double init
pps initializes perf counter multiple times, once from
GpuDataSource::register_data_source and once from
GpuDataSource::OnSetup. This is fine, except we should replace
failing assert with skip on second call.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38224>
2025-11-04 20:54:34 +00:00
Felix DeGrood
cbcfaca647 intel/ds: reduce min sampling period of pps-producer to 5us
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37991>
2025-10-23 18:22:20 +00:00
Lionel Landwerlin
bb5eb9a096 intel/ds: disable draw/blorp tracepoints by default on android
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Tim Van Patten <timvp@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37740>
2025-10-08 16:00:50 +00:00
Lionel Landwerlin
c4061b96f0 intel/ds: lump all the draw under the same toggle
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Tim Van Patten <timvp@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37740>
2025-10-08 16:00:50 +00:00
Tim Van Patten
f90e0f0797 intel: Convert getenv() to os_get_option()
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os_get_option() is a wrapper for getenv() that checks properties in
Android. It should be a no-op for other OS but will allow full use of
env vars in Android.

The environment variable names are automatically renamed by
os_get_option() and the order of precedence thus becomes:

1. getenv (non-Android)
2. debug.mesa.* (Android)
3. vendor.mesa.* (Android)
4. mesa.* (Android, as a fallback for older versions)

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37587>
2025-09-25 17:01:18 -06:00
Yiwei Zhang
951767ce36 intel/ds: update GPU clock to be sequence-scoped when applicable
When CPU clock is the same with the authoritative trace clock (normally
default to CLOCK_BOOTTIME), perfetto drops the non-monotonic snapshots
to ensure validity of the global source clock in the resolution graph.
When they are different, the clocks are marked invalid and the rest of
the clock syncs will fail during trace processing.

There's no central daemon emitting consistent snapshots for
synchronization between CPU and GPU clocks on behalf of renderstages and
counters producers. The sequence-scoped clock (64 <= ID < 128) is unique
per producer + writer pair within the tracing session. So we can use
sequence-scoped clock for gpu clock whenever applicable, and fallback to
use global clock for dynamic minor allocated >= 192.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37425>
2025-09-18 17:23:42 +00:00
Yiwei Zhang
7a1e952279 intel/ds: minor code clean up
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37425>
2025-09-18 17:23:42 +00:00
Yiwei Zhang
7689aca21f intel/ds: simplify clock sync emit
In short, perfetto doesn't require the initial clock snapshot to be
earlier than the timestamp to be converted. So we don't have to do
complex handling for it.

With this change:
- renderstage event requires clock sync, so we'd only emit clock
  snapshots on the traceq thread that handles the callbacks
- drops redundant sync_timestamp calls as well as sync_gpu_ts tracking
- no need to reset next_clock_sync_ns when tracing is disabled, since a
  snapshot is always emitted right after the initial interned data emit
  upon tracing start

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37425>
2025-09-18 17:23:42 +00:00
Yiwei Zhang
7795669953 intel/ds: VulkanApiEvent doesn't rely on interning data
The object name is part of the VkDebugUtilsObjectName event messages.
When the trace buffer is full and the ring buffer fill policy is chosen,
the debug obj events can be overwritten (lost), which is why we need the
RefreshSetDebugUtilsObjectNameEXT.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37425>
2025-09-18 17:23:42 +00:00
Konstantin Seurer
850f339b89 vulkan: Add more detail to encode debug markers
Useful for radv because radv has quite a few different configurations.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36982>
2025-09-10 08:35:50 +00:00
Yonggang Luo
773a7f347a clang-format: Update the .clang-format files to conformance clang-format json-schema
The document is at
https://clang.llvm.org/docs/ClangFormatStyleOptions.html

The json-schema at
https://www.schemastore.org/clang-format.json

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37235>
2025-09-09 07:04:55 +00:00
Tim Van Patten
c585341552 intel/ds: Skip expensive timestamp query until necessary
The Xe ioctl DRM_XE_DEVICE_QUERY_ENGINE_CYCLES provides accurate
timestamps correlated between the CPU and GPU. However, it is slow and
impacts performance while collecting Perfetto traces.

Instead, use Perfetto's GetBootTimeNs() to track when to emit the
BUILTIN_CLOCK_BOOTTIME clock sync event so it only occurs every 1
second. This reduces the impact of recording gpu.renderstages from
-8% to -4%.

More concretely, FPS measurements when tracing Unity BoatAttack demo on
an Intel ADL device:

* gpu.renderstages disabled:            48.044293667
* gpu.renderstages enabled:             38.119778333 (-20.66%)
* gpu.renderstages enabeled + this fix: 42.641818333 (-11.24%)

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37095>
2025-08-29 21:34:43 +00:00
Olivia Lee
78d3b9cd0a perfetto: allow specifying clock domain for cpu timestamps
Everything is currently using CLOCK_BOOTTIME, which is perfetto's
default, and matches the previous behavior. On some hardware, different
clocks may be better synchronized with the gpu clock.

Signed-off-by: Olivia Lee <olivia.lee@collabora.com>
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34390>
2025-08-19 09:50:36 +00:00
Mike Blumenkrantz
c7045e3e63 perfetto: unify init
util_perfetto_init() was called in some places, util_cpu_trace_init()
was called in other places, and some places used tracing without ever
calling either of them

util_cpu_trace_init() is now guaranteed to be called:
* on gallium screen create
* on VK instance create

thus no driver/frontend/etc should ever need to call this manually

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36628>
2025-08-12 13:17:43 +00:00
Emma Anholt
7c130e5dcf intel/ds: Fix formatting of stage index.
draws had been bumped to stage #10, so they ended up appearing nested
between frame (#1) and cmdbuf (#2), instead of nested under them.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22350>
2025-05-08 01:21:25 +00:00
Emma Anholt
4cc66123ec anv/ds: Forward VkDebugUtilsObjectNameInfoEXT to perfetto.
This gets us names on zink/wsi command buffers in perfetto, but may also
be useful some day for getting app names onto framebuffers and non-dynamic
renderpasses.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22350>
2025-05-08 01:21:25 +00:00
Emma Anholt
55d788f434 anv/ds: Associate the VkCommandBuffer some anv-only renderstage events.
This means the perfetto UI will have a non-zero/NULL handle/name in the UI
on these renderstages.  Unfortunately, intel/ds is outside of vulkan so
unless we pull in anv headers, we can't just pass in the anv_cmd_buffer.
This also means it would be much more painful to pass the cmd buffer to
the rest of the events, so they'll still have unset command buffers.
Still, being able to see the name of the command buffer in at least one of
the events should be useful once that's glued together.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22350>
2025-05-08 01:21:25 +00:00
Emma Anholt
546a100f26 intel/ds: Move "have we already sent initial state?" into the helper.
I'm going to have to send initial state from another function too, shortly.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22350>
2025-05-08 01:21:25 +00:00
Emma Anholt
dd81420ef1 perfetto: Create a common MesaRenderpassIncrementalState.
... and explain what its role is.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22350>
2025-05-08 01:21:25 +00:00
Renato Pereyra
7190949927 perfetto/android: align datasource names with tooling expectations
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A few Android tools are based on/assume the datasource names
gpu.renderstages and gpu.counters. It is less effort to align with that
naming for Android builds than to chase down those tools and fix them,
not to mention account for new tools that may be created in the future.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34330>
2025-04-08 18:29:10 +00:00
Michael Cheng
169e7acee1 vulkan: add leaves and ir_leaves sizes to encode for utrace.
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Expose number of leaves and ir_leaves to the debug marker for encode.

Signed-off-by: Michael Cheng <michael.cheng@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34200>
2025-03-28 18:25:40 +00:00
Michael Cheng
014f376755 anv: Change as_build to show num tlas/blas
As_build now shows the number of tlas/blas that was built.

Signed-off-by: Michael Cheng <michael.cheng@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33720>
2025-03-05 14:19:56 +00:00
Lionel Landwerlin
e4f31b8744 intel/ds: rework RT tracepoints
That way we can identify single dispatch within each step.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Michael Cheng <michael.cheng@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33684>
2025-02-24 08:08:02 +00:00
Lionel Landwerlin
4f73689d9a anv: add source hashes for BVH building shaders
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Michael Cheng <michael.cheng@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33432>
2025-02-07 07:27:54 +00:00
Michael Cheng
c3c05ffb5f intel : Expose Shader hashes for utrace and Perfetto
This patch exposes shader hashes (computes and draws) to Perfetto and
utrace. By including these hashes in traces, developers can correlate
compute and draw calls with their assoicated ASM dumps when analyzing
the traces.

To achieve this, intel_tracepoint.py has been reworked to preprocess
tracepoint arguments dynamically. Any argument containing "hash" in its
variable name is now forrmated as hexadecimal before being passed to the
tracepoint definition.

Signed-off-by: Michael <michael.cheng@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32708>
2025-01-10 17:38:16 +00:00
Lionel Landwerlin
6281b207db anv: add tracepoints timestamp mode for empty dispatches
When the runtime is going to potentially emit no dispatch, we need to
have a way to capture a timestamp. Add a new flag for this to tell
whether we don't have a HW instruction to capture the timestamp and
rely on MI_STORE_REGISTER_MEM instead.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: de00fe3f66 ("anv: add BVH building tracking through u_trace")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12382
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32835>
2025-01-03 10:36:49 +00:00
Lionel Landwerlin
de00fe3f66 anv: add BVH building tracking through u_trace
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kevin Chuang <kaiwenjon23@gmail.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32483>
2024-12-09 14:45:00 +00:00
Tapani Pälli
03f762f90c intel/ds: add L3 fabric flush support
Cc: mesa-stable
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29764>
2024-10-08 08:45:40 +00:00
Danylo Piliaiev
e5d3eba096 u_trace: Fix trace_payload_as_extra_func desync between drivers
Buffer with indirect args wasn't passed to the function which
adds extra event args. Since function definition depends on the
common code, the definition is moved to a single place.

Fixes: 0a17035b5c
("u_trace: add support for indirect data")

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31090>
2024-10-03 20:25:48 +00:00
Lionel Landwerlin
78ae7ab856 anv/hasvk: add indirect tracepoint arguments
Gives visibility on some indirect parameter dispatches :
  - draw count
  - compute dispatch size

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29944>
2024-08-03 16:03:04 +03:00
Lionel Landwerlin
0a17035b5c u_trace: add support for indirect data
Allows a driver to declare indirect arguments for its tracepoints and
pass an address. u_trace will request a copy of the data which should
be implemented on the command processor.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Co-Authored-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Reviewed-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29944>
2024-08-03 16:03:00 +03:00
Lionel Landwerlin
4347ccbe57 u_trace: rework tracepoint argument declaration
We're about to add indirect arguments, having a better way to describe
arguments (as capture/storage) will be useful.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29944>
2024-08-03 16:02:53 +03:00
Michael Cheng
60c73e09c6 anv: Remove extra hdc_flush from Perfetto
Remove extra reporting of hdc_flush when viewing a Perfetto trace for
anv.

Signed-off-by: Michael Cheng <michael.cheng@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30312>
2024-07-23 01:57:59 +00:00
Lionel Landwerlin
b393ede8c8 intel/ds: remove duplicate arguments
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29997>
2024-07-03 21:10:13 +00:00
José Roberto de Souza
18775827bd intel/perf: Implement intel_perf_query_result_accumulate() for gfx 20+
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29529>
2024-07-03 17:15:05 +00:00
David Heidelberg
68215332a8 build: pass licensing information in SPDX form
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Dylan Baker <dylan.c.baker@intel.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: David Heidelberg <david@ixit.cz>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29972>
2024-06-29 12:42:49 -07:00
José Roberto de Souza
da63c54db5 intel/perf: Remove i915_drm.h includes from common code
Only place that still has i915_drm.h includes in common code is
intel_perf_query.c.

This are the last i915_drm.h includes in headers in common code \o/.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29312>
2024-06-29 01:17:37 +00:00