Commit graph

7521 commits

Author SHA1 Message Date
Lionel Landwerlin
2c875e6ad7 intel/dev: fix ppipe_mask computation
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: e86ce98c6a ("intel/devinfo: deal with i915 topology query change")
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14608>
2022-01-19 10:22:36 +00:00
Kenneth Graunke
d475e839da intel/fs: Reuse the same FS input slot for VUE header fields.
VARYING_SLOT_{VIEWPORT,LAYER,PSIZ} all live in the same VUE header slot,
and the FS is already set up to read the x/y/z/w component of that vec4.

However, we were setting up the SBE to pass each of those items as a
separate FS input, so hypothetically if a shader read all three, we
would burn 3 FS inputs with redundant data.  Not only was this passing
extra data to the FS, but it would count as extra input slots for the
"Do we have 16 or fewer attributes?" check for using SBE swizzling to
rearrange them in a convenient manner.

Now we make them share a single FS attribute and only count them once.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14210>
2022-01-19 01:31:47 +00:00
Jordan Justen
695ba644ab intel/gem: Return length from intel_i915_query_alloc
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13866>
2022-01-19 00:29:35 +00:00
Jordan Justen
83da7dc487 intel/dev: Recalculate max_cs_threads after applying hwconfig changes
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13866>
2022-01-19 00:29:35 +00:00
Jordan Justen
ab22fb488b intel/dev: Apply settings from hwconfig if devinfo::apply_hwconfig is set
During debug builds, if apply_hwconfig is not set, then the devinfo
value will be compared with the hwconfig value. If they don't match
then a warning message will be logged to stderr.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13866>
2022-01-19 00:29:35 +00:00
Jordan Justen
59f32c62c7 intel/dev: Set intel_device_info::apply_hwconfig for DG2
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13866>
2022-01-19 00:29:35 +00:00
Jordan Justen
a15f18c886 intel/dev: Add intel_device_info::apply_hwconfig
This will be used to conditionally use hwconfig values to update
intel_device_info at runtime.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13866>
2022-01-19 00:29:35 +00:00
Jordan Justen
0300351028 intel/dev: Print urb size with intel_dev_info
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13866>
2022-01-19 00:29:35 +00:00
Jordan Justen
2dd78b9a4f intel/dev: Add intel_print_hwconfig_table()
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13866>
2022-01-19 00:29:35 +00:00
Jordan Justen
3a119f0c6d intel/dev: Add intel_hwconfig_types.h from random post on the internet
There is no spec for any of this, but we'll need this to interpret a
blob that the kernel is giving us.

Ref: https://lists.freedesktop.org/archives/intel-gfx/2021-September/277488.html
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13866>
2022-01-19 00:29:35 +00:00
Jordan Justen
f0692365a2 anv,blorp,crocus,i965,iris: Use devinfo->max_threads_per_psd for gfx8+
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13866>
2022-01-19 00:29:35 +00:00
Jordan Justen
08a897fa38 intel/dev: Add max_threads_per_psd field to devinfo for gfx8+
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13866>
2022-01-19 00:29:35 +00:00
Dave Airlie
f9f7f326fa intel/compiler: add clamp_pointside to vs/tcs/tes keys.
This will be used by crocus and iris to clamp pointsizes only
on the last stage of the shader compile.

Fixes: 3077d96856 ("crocus: Clamp VS point sizes to the HW limits as required.")
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14359>
2022-01-18 22:53:45 +00:00
Nanley Chery
fe0a6b9606 anv: Don't fill lowered_storage_image_param on SKL+
The switch statement in anv_descriptor_data_for_type() shows that this
field isn't used on SKL+.

On XeHP, this avoids assert failures by preventing
isl_surf_fill_image_param() from being called. That function doesn't
expect Tile4 surfaces.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14546>
2022-01-14 21:47:48 +00:00
Lionel Landwerlin
2e3490dd0f iris: utrace/perfetto support
v2: Fixup gpu_id computation, use minor of /dev/dri/* % 128 since we
    don't know whether we get card0 or renderD128 for instance.
    (Lionel)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com> (v1)
Acked-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13996>
2022-01-14 20:17:44 +00:00
Lionel Landwerlin
e760c5b37b anv: add perfetto source
v2: Increase custom stall data (Felix)
    Fixup build (Felix)

v3: Add API enum (Rohan)
    Fixup old comment (Rohan)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Acked-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13996>
2022-01-14 20:17:44 +00:00
Lionel Landwerlin
cf9956a8c5 intel/ds: use a per GPU clock ID
Multi-GPU setups :)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Acked-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13996>
2022-01-14 20:17:44 +00:00
Lionel Landwerlin
61766f9f90 intel/ds: use the right i915_drm.h include location
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Acked-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13996>
2022-01-14 20:17:44 +00:00
Lionel Landwerlin
e35a65ae45 intel/ds: don't forget to reset upper dword timestamp read
This could lead to confusing if the 32bits roll over (every ~6mn or
so).

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 4ef6698a26 ("intel/ds: drop timestamp correlation code")
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Acked-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13996>
2022-01-14 20:17:44 +00:00
Lionel Landwerlin
6eb554a9c7 intel/ds: allow user to select metric set at start time
Rather than using always the same metric set, let the user choose when
starting the producer with :

  INTEL_PERFETTO_METRIC_SET=RasterizerAndPixelBackend ./build/src/tool/pps/pps-producer

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Acked-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13996>
2022-01-14 20:17:44 +00:00
Lionel Landwerlin
69df00b33b intel/ds: reuse intel_ioctl()
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Acked-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13996>
2022-01-14 20:17:44 +00:00
Lionel Landwerlin
cc5843a573 anv: implement u_trace support
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Acked-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13996>
2022-01-14 20:17:44 +00:00
Lionel Landwerlin
bb541d1159 intel/blorp: add measure_end entry point
Will be useful to figure out when blorp operations end.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Acked-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13996>
2022-01-14 20:17:44 +00:00
Lionel Landwerlin
d3724de894 intel/dev,perf: Use a single timescale function
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Acked-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13996>
2022-01-14 20:17:44 +00:00
Lionel Landwerlin
02a4d622ed anv: expose a couple of emit helper to build utrace buffer copies
We'll want to copy timestamp buffers when commands buffers are
resubmitted multiple times.

v2: Merge a couple of #if GFX_VER >= 8 (Rohan)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Acked-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13996>
2022-01-14 20:17:44 +00:00
Lionel Landwerlin
246e2c74d3 isl: add helpers to printout ops
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Acked-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13996>
2022-01-14 20:17:44 +00:00
Lionel Landwerlin
e8ea6a899f blorp: add description & helpers to printout ops
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Acked-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13996>
2022-01-14 20:17:44 +00:00
Lionel Landwerlin
30a8b8d2df intel/fs: disable VRS when omask is written
As indicated by
VkPhysicalDeviceFragmentShadingRatePropertiesKHR::fragmentShadingRateWithShaderSampleMask
our implementation will clamp to 1x1 when reading samplemask or
writing to samplemask.

This fixes vkd3d-proton tests test_sample_mask_dxbc & test_sample_mask_dxil

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: b6332fc4a8 ("intel/compiler: handle coarse pixel in render target writes descriptors")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14553>
2022-01-14 19:14:06 +00:00
Chia-I Wu
37fa59fa6c anv,lavapipe,v3dv: use wsi_common_get_image
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (anv)
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com> (v3dv)
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com> (lavapipe)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14544>
2022-01-14 17:41:42 +00:00
Jason Ekstrand
a1de102479 intel/fs: Use compare_func for wm_prog_key::alpha_test_func
Because 0 is no longer a recognizable value (it's NEVER, which isn't a
good default), we add an emit_alpha_test bool to tell the back-end when
to bother alpha testing.  This lets us only touch crocus with the
change.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14157>
2022-01-14 15:08:09 +00:00
Jason Ekstrand
460a953df5 intel/compiler: Stop using GLuint in brw_compiler.h
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14157>
2022-01-14 15:08:09 +00:00
Lionel Landwerlin
e86ce98c6a intel/devinfo: deal with i915 topology query change
i915 does not report slices accurately anymore on Gfx12.5+. Since this
is information we need to have for performance queries, we need to
rebuild it here.

v2: Remove invalid change to pixel pipes computations (Jordan)

v3: Fix index calculation (Curro)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14297>
2022-01-14 12:01:05 +00:00
Lionel Landwerlin
6d73426d2a intel/devinfo: split out l3/pixelpipes counting
v2: fix up subslice_total store (Lionel)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> (v1)
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14297>
2022-01-14 12:01:05 +00:00
Jordan Justen
7609e88d5f intel/devinfo: Adjust L3 banks for DG2
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Co-Authored-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14297>
2022-01-14 12:01:05 +00:00
Lionel Landwerlin
5f3b0327b7 intel/dev: extract slice/subslice total computation
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14297>
2022-01-14 12:01:05 +00:00
Jordan Justen
4f9141607f intel: Add device info for DG2
Reworks:
 * Lionel: simulator_id
 * Rafael: has_llc
 * Merged Lionel's "intel/devinfo: store the different kind of DG2"

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14524>
2022-01-13 09:48:51 +00:00
Lionel Landwerlin
1027b68418 anv: fix perf queries
We're not saving the first pool.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 36ea90a361 ("anv: Convert to the common sync and submit framework")
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14420>
2022-01-13 07:54:22 +00:00
Jianxun Zhang
14a4600b62 intel: add swizzle flag into driver uuid
Suggested by Lionel Landwerlin, we add has_bit6_swizzle as
another input when computing driver uuid.

Also fix miscalculation of the length of driver tag.

Signed-off-by: Jianxun Zhang <jianxun.zhang@linux.intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13936>
2022-01-13 03:09:36 +00:00
Jianxun Zhang
f43c7185e0 intel: remove chipset_id
The chipset_id should be named after i915 ioctl that's called
to get the device id. In user space this field holds pci device
id in reality. We now have a pci_device_id queried from drm
instead using the ioctl, so there is no much reason to keep
the chipset_id for the same purpose.

Signed-off-by: Jianxun Zhang <jianxun.zhang@linux.intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13936>
2022-01-13 03:09:36 +00:00
Jianxun Zhang
ddfa3924b3 intel: dump PCI info in intel_dev_info
Dump PCI bus and device info so that we can easily identify output
in a multi-gpu system.

Signed-off-by: Jianxun Zhang <jianxun.zhang@linux.intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13936>
2022-01-13 03:09:36 +00:00
Jianxun Zhang
3414ba9a81 anv: remove private pci fields
These fields are in the base device struct 'intel_device_info' now.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5489

Signed-off-by: Jianxun Zhang <jianxun.zhang@linux.intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13936>
2022-01-13 03:09:36 +00:00
Jianxun Zhang
d86989bf73 intel: use PCI info to compute device uuid
With the new input from PCI bus and device fields, we can compute
device uuids in a multi-gpu system.

Signed-off-by: Jianxun Zhang <jianxun.zhang@linux.intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13936>
2022-01-13 03:09:36 +00:00
Jianxun Zhang
db8405670a intel: provide pci bus and dev info in base device struct
Having PCI bus and dev info in the base struct
'intel_device_info' enables us to utilize the info across
multiple drivers for several purposes, such as computing
device uuids in a multi-gpu system.

Signed-off-by: Jianxun Zhang <jianxun.zhang@linux.intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13936>
2022-01-13 03:09:36 +00:00
Lionel Landwerlin
8ef9350ff0 intel/devinfo: drop num_eus_per_subslice field
This field is an average computation that is not actually useful for
any of our driver code.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14510>
2022-01-12 12:53:21 +00:00
Lionel Landwerlin
5d5a1b660b intel/devinfo: add a helper to check for slice availability
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14510>
2022-01-12 12:53:21 +00:00
Lionel Landwerlin
1c5b206366 intel/devinfo: printout devinfo struct size
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14510>
2022-01-12 12:53:21 +00:00
Lionel Landwerlin
574ba30fb4 intel/devinfo: printout pixel pipes in info printout
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14510>
2022-01-12 12:53:21 +00:00
Nanley Chery
912acbf963 anv,iris: Flush HDC before color fast clears
Needed for XeHP (see Bspec 47704).

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14024>
2022-01-12 01:30:34 +00:00
Nanley Chery
f3c629733f anv,iris: PSS Stall Sync around color fast clears
Needed for XeHP (see Bspec 47704).

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14024>
2022-01-12 01:30:34 +00:00
Nanley Chery
8ec8298ce4 intel: Rename the PSD bit in PIPE_CONTROL for XeHP
The name of the field now starts with PSS Stall instead of PSD.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14024>
2022-01-12 01:30:34 +00:00