6 commits

Author	SHA1	Message	Date
Lionel Landwerlin	515d8f8e3a	brw: fix sample mask flag emission ... It's also used for testing helper invocations. Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Fixes: e3328dfa2f ("brw: only initialize sample mask flag if needed") Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38699>	2025-11-27 15:59:35 +00:00
Alyssa Rosenzweig	e3328dfa2f	brw: only initialize sample mask flag if needed ... This is a refinement of 7c129d9365 ("intel/brw/xe2+: Keep PS sample mask in the f1.0 register whether or not kill is used."). Rather than always insert this move, do so only when we'll actually read the register: for memory writes and for discards. This deletes an instruction from piles of fragment shaders. shader-db on LNL: total instructions in shared programs: 17134031 -> 17042706 (-0.53%) instructions in affected programs: 9065743 -> 8974418 (-1.01%) helped: 65045 HURT: 0 helped stats (abs) min: 1.0 max: 3.0 x̄: 1.40 x̃: 1 helped stats (rel) min: <.01% max: 50.00% x̄: 3.06% x̃: 1.64% 95% mean confidence interval for instructions value: -1.41 -1.40 95% mean confidence interval for instructions %-change: -3.10% -3.03% Instructions are helped. total cycles in shared programs: 885172098 -> 884835306 (-0.04%) cycles in affected programs: 590294230 -> 589957438 (-0.06%) helped: 53636 HURT: 4500 helped stats (abs) min: 2.0 max: 1126.0 x̄: 8.02 x̃: 4 helped stats (rel) min: <.01% max: 50.00% x̄: 1.24% x̃: 0.24% HURT stats (abs) min: 2.0 max: 7706.0 x̄: 20.77 x̃: 6 HURT stats (rel) min: <.01% max: 82.06% x̄: 1.09% x̃: 0.54% 95% mean confidence interval for cycles value: -6.15 -5.43 95% mean confidence interval for cycles %-change: -1.10% -1.02% Cycles are helped. LOST: 385 GAINED: 47 Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38665>	2025-11-26 16:53:36 +00:00
Kenneth Graunke	792762617a	brw: Rename read_attribute_payload_intel to load_attribute_payload_intel ... We're going to change the intrinsic to a load(...) which puts "load" in the name. Also, it's just more consistent with our usual terminology. We also rename the corresponding backend opcode so they remain matched. Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38482>	2025-11-25 22:43:58 +00:00
Lionel Landwerlin	7e72d392d7	brw: switch to load_(pixel_coord|frag_coord_z|frag_coord_w) intrinsics ... Allows us to better determine if we need Z/W payload delivery. Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36392>	2025-11-25 15:50:48 +00:00
Yonggang Luo	ecb0ccf603	treewide: Replace calling to function ALIGN with align ... This is done by grep ALIGN( to align( docs,*.xml,blake3 is excluded Signed-off-by: Yonggang Luo <luoyonggang@gmail.com> Reviewed-by: Timur Kristóf <timur.kristof@gmail.com> Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38365>	2025-11-12 21:58:40 +00:00
Kenneth Graunke	73cbb35442	brw: Move into a new src/intel/compiler/brw subdirectory ... This keeps the directory structure a bit more organized: - brw specific code - elk specific code - common NIR passes that could be used in both places It also means that you can now 'git grep' in the brw directory without finding a bunch of elk code, or having to "grep thing b*". Reviewed-by: Dylan Baker <dylan.c.baker@intel.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37755>	2025-10-09 07:01:47 +00:00

Renamed from src/intel/compiler/brw_compile_fs.cpp (Browse further)