Commit graph

4429 commits

Author SHA1 Message Date
Emma Anholt
e9a6832a1b freedreno: Fix crashdec pre-a6xx.
We'd assert fail looking up the REM registers.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24358>
2023-08-08 18:51:59 +00:00
Emma Anholt
33f2726b97 ci/freedreno: Add a regression test for decoding a540 blob's compute shaders.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24358>
2023-08-08 18:51:59 +00:00
Eric Anholt
b10f4eda70 freedreno/cffdec: Fix decode on pixel 2 blob's COMPUTE_CHECKPOINT
dEQP-GLES31.functional.image_load_store.buffer.image_size.writeonly_7
produces:

t7		opcode: CP_COMPUTE_CHECKPOINT (6e) (8 dwords)
			{ ADDR_0_LO = 0x15000 }
			{ ADDR_0_HI = 0x5 }
			0x18
			{ ADDR_1_LEN = 3 }
			0xf
			{ ADDR_1_LO = 0x2e010 }
			{ ADDR_1_HI = 0x5 }

and it was asserting due to sizedwords==7.  Without the assert, we were
dereffing a len past the end of the packet.  This len value we were
loading is also suspiciously not the location of the ADDR_1_LEN field in
the packet's XML.  But then, the command stream at ADDR_1 was clearly 0xf
long, and that puts ADDR_1_LEN at the spot we would expect compared to
SET_RENDER_MODE's ADDR_1.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24358>
2023-08-08 18:51:59 +00:00
Emma Anholt
f7bd10ed38 freedreno/a5xx: Add private mem support.
A bunch of our piglit fails were due to failing to compile shaders due to
a lack of spilling support.  I used a simple shader with a large local
array with tunable size to determine the MEMSIZEPERITEM increment and the
location of HWSTACKOFFSET (matching a3xx locations).  Unfortunately
fibers_per_sp I had to guess by taking a big spilling shader and cranking
it up until it rendered correctly.  The value I found made HWSTACKOFFSET's
shift value match a6xx's, as a bit of confirmation.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24358>
2023-08-08 18:51:59 +00:00
Emma Anholt
c4874b4cee freedreno/a5xx: Set num_sp_cores and set PC/VFD_POWER_CNTL accordingly.
Based on libwrap tracing of the blob.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24358>
2023-08-08 18:51:59 +00:00
Emma Anholt
c361e1d0d9 freedreno/a3xx: Add the shift for MEMSIZEPERITEM according to db410c docs.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24358>
2023-08-08 18:51:59 +00:00
Emma Anholt
a4c89cc8a6 freedreno/devices: Set num_sp_cores explicitly for pre-gen6.
These are all 0 currently, but will change for a5xx shortly.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24358>
2023-08-08 18:51:58 +00:00
Emma Anholt
f6ea7c3a99 freedreno/devices: Move fibers_per_sp to the common info struct.
We'll need it for pvt mem on other GPUs.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24358>
2023-08-08 18:51:58 +00:00
Emma Anholt
b468286937 ci/freedreno: Add some more db820c xfails.
We do a fractional run so we didn't have them listed.  Adding these helps
me with local baseline testing, and future people doing uprevs or
rebalancing.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24358>
2023-08-08 18:51:58 +00:00
Emma Anholt
bdeadc366a ci/freedreno: Update comments for some a530 xfails.
That assert doesn't exist any more but the test still fails.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24358>
2023-08-08 18:51:58 +00:00
Emma Anholt
0918b90987 ci/freedreno: Sort another a530 xfail with its friends.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24358>
2023-08-08 18:51:58 +00:00
Emma Anholt
9cfa86202e ci/freedreno: Drop a bunch of stale a530 xfails.
These all pass fairly reliably on my a530 when run on their own.  We've
not noticed this because a530 has some very loose flakes regexes.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24358>
2023-08-08 18:51:58 +00:00
Emma Anholt
e3274e9e1b freedreno/ir3: Move pvtmem per-fiber size alignment to the compiler.
Instead of having tu and each fd backend do it.  This will help me make
some shared code on freedreno for pre-6xx pvtmem support.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24358>
2023-08-08 18:51:58 +00:00
Emma Anholt
a297624182 freedreno/a5xx: Skip emitting unused texture descriptors for images.
In that case, we'd emit it to DST_OFF=255+i, angering the hardware
mightily.  This was missed in the addition of a6xx image support.

Fixes: 2e0ea3f09c ("freedreno/ir3: add image/ssbo <-> ibo/tex mapping")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24358>
2023-08-08 18:51:58 +00:00
Emma Anholt
59e9909cc1 freedreno/a5xx: Fix border color structure size.
This now matches a6xx.  This major border color flakiness in deqp -- when
a prior test in the caselist bound a VS and it didn't get unbound at the
gallium level, our FS border colors would be up at offset 8 instead of 0,
and the wrong padding would make FS sampler 0 get a junk border color.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24358>
2023-08-08 18:51:58 +00:00
Rob Clark
f17c5297d7 tu: Add virtgpu support
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23533>
2023-08-08 00:20:48 +00:00
Rob Clark
006342be8b tu/drm: Split out helper for iova alloc
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23533>
2023-08-08 00:20:48 +00:00
Rob Clark
84524cfdfa tu/drm: Add missing error path cleanup
Fixes: bea6290ca0 ("turnip: device global bo list")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23533>
2023-08-08 00:20:48 +00:00
Rob Clark
811f332d81 tu/drm: Factor out shared helpers
Factor out a few things that we can re-use between virtio and msm
backends.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23533>
2023-08-08 00:20:48 +00:00
Rob Clark
c14a13d40d tu: close submitqueues before device_finish()
Otherwise we would have already closed the device.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23533>
2023-08-08 00:20:48 +00:00
Rob Clark
2196fdb2cf freedreno/drm/virtio: Use global_faults
Rather than doing a synchronous round trip to the host to query fault
count, use the shmem->global_faults field if available.  The kernel is
already only reporting faults associated with the same drm_file (which
in this case maps 1:1 to guest process), so the only thing we really
miss is, if the app is using multiple contexts, _which_ context the
fault was in.  But vulkan doesn't even use that, which sounds like a
good enough argument that per-submitqueue granularity isn't really
needed.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23533>
2023-08-08 00:20:48 +00:00
Rob Clark
0be8fab6c8 freedreno: Update virtgpu proto
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23533>
2023-08-08 00:20:48 +00:00
Rob Clark
5d701d4eba tu/knl: Remove some random const'ness
This gets in the way with virtio_gpu backend.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23533>
2023-08-08 00:20:48 +00:00
Rob Clark
3a3a658797 tu/msm: staticify a couple things
Stop leaking some private implementation details as global symbols.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23533>
2023-08-08 00:20:48 +00:00
Rob Clark
37834e3d7c freedreno/drm/virtio: Remove unused header
A remnant from a very early version, prior to refactoring out
fd_ringbuffer_sp to share more code btwn msm and virtgpu backends.
Somehow this never got removed.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23533>
2023-08-08 00:20:48 +00:00
Rob Clark
6ae6536ed9 freedreno: move virtgpu msm_proto.h to common
src/freedreno/virtgpu seems a bit overkill for a single header.. but
maybe there are some other bits we could share?

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23533>
2023-08-08 00:20:48 +00:00
antonino
6c25dc0909 freedreno: add ci flake
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24539>
2023-08-07 13:30:18 +00:00
David Heidelberg
8088d73fd1 ci/freedreno: document another flakes on Adreno 530
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24511>
2023-08-05 09:52:48 +00:00
Alyssa Rosenzweig
d550dea819 ir3: Drop write_mask handling
It's all scalar SSA.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24432>
2023-08-03 22:40:29 +00:00
Alyssa Rosenzweig
c3077d3ad4 ir3: Collapse is_ssa checks
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24432>
2023-08-03 22:40:29 +00:00
Alyssa Rosenzweig
579bc1e72e treewide: Drop some is_ssa if's
Via Coccinelle patch:

    @@
    expression x;
    @@

    -if (!x.is_ssa) {
    -...
    -}

and likewise with x->is_ssa, with invalid hunks manually filtered out.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24432>
2023-08-03 22:40:29 +00:00
Alyssa Rosenzweig
95e3df39c0 treewide: sed out more is_ssa
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24432>
2023-08-03 22:40:28 +00:00
Alyssa Rosenzweig
a8013644a1 nir: Drop nir_alu_src::{negate,abs}
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24432>
2023-08-03 22:40:28 +00:00
Alyssa Rosenzweig
ab0d878932 treewide: Remove more is_ssa asserts
Stuff Coccinelle missed.

   sed -i -e '/assert(.*\.is_ssa)/d' $(git grep -l is_ssa)
   sed -i -e '/ASSERT.*\.is_ssa)/d' $(git grep -l is_ssa)

+ a manual fixup to restore the assert for parallel copy lowering.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24432>
2023-08-03 22:40:28 +00:00
Alyssa Rosenzweig
5fead24365 treewide: Drop is_ssa asserts
We only see SSA now.

Via Coccinelle patch:

    @@
    expression x;
    @@

    -assert(x.is_ssa);

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24432>
2023-08-03 22:40:28 +00:00
Yonggang Luo
3b731d92d9 freedreno: decouple compiler and vulkan driver from gallium
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23438>
2023-08-03 07:29:36 +00:00
David Heidelberg
39ddc509e1 ci/freedreno: document another mapbuffer flake on a530
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24441>
2023-08-02 08:48:20 +00:00
Alyssa Rosenzweig
51db19f7a2 nir: Rename scoped_barrier -> barrier
sed + ninja clang-format + fix up spacing for common code.

If you are unhappy that I did not manually change the whitespace of your driver,
you need to enable clang-format for it so the formatting would happen
automatically.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24428>
2023-08-01 23:18:29 +00:00
Mike Blumenkrantz
b1cca11220 ir3: bump max xfb output to 128
this is the number of components supported for streamout

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24285>
2023-08-01 20:47:34 +00:00
Danylo Piliaiev
5fc5123f63 turnip: Use common nir_vk_is_not_xfb_output
On a7xx fixes:
 dEQP-VK.rasterization.provoking_vertex.transform_feedback.*

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24318>
2023-08-01 10:32:04 +02:00
Connor Abbott
e690d88d69 freedreno/afuc: Initial a7xx support
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23949>
2023-07-28 18:41:58 +00:00
Connor Abbott
6fd0007447 afuc: Fix writing $00
This is valid and should do nothing. Don't make the PC overlap $00 in
the reg file, so that we can print out "writes" to $00 but they're still
discarded.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23949>
2023-07-28 18:41:58 +00:00
Connor Abbott
7d7aa2251e afuc: Add setbit/clrbit
First introduced in a660_sqe.fw.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23949>
2023-07-28 18:41:58 +00:00
Connor Abbott
1046ebbb89 afuc: Convert to isaspec
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23949>
2023-07-28 18:41:58 +00:00
Connor Abbott
7376af0eef afuc: Fix xmov lexer typo
This happened to work by luck, but was caught with the isaspec encoding
assertions.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23949>
2023-07-28 18:41:58 +00:00
Connor Abbott
2faf344f03 isaspec: Rename isa_decode() to isa_disasm()
This actually disassembles the binary, and we will add a function that
actually decodes it to the same structure that the encoder uses.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23949>
2023-07-28 18:41:58 +00:00
Connor Abbott
26cce0a133 isaspec: Add callback after decoding an instruction
This will be used by afuc for printing register decodings in a comment.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23949>
2023-07-28 18:41:58 +00:00
Mike Blumenkrantz
e68e612826 nir: add a helper for calculating variable slots
this will maybe avoid future bugs, but probably not

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24163>
2023-07-28 13:14:35 +00:00
Mike Blumenkrantz
59396eefe6 nir: fix slot calculations for compact variables with location_frac
a variable with a component offset may span multiple slots, and this cannot
be inferred from its type alone (e.g., compacted clip+cull distances)

cc: mesa-stable

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24163>
2023-07-28 13:14:35 +00:00
Christian Gmeiner
86a5e942dd freedreno/regs: python does not need ';'
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24330>
2023-07-27 04:53:19 +00:00