Commit graph

223637 commits

Author SHA1 Message Date
Alyssa Rosenzweig
0adcaeced4 jay/to_binary: relax packed float restriction
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41872>
2026-06-03 15:23:19 +00:00
Alyssa Rosenzweig
61d65c8055 jay: limit stencil export to simd16
sigh.

fixes dEQP-VK.pipeline.monolithic.shader_stencil_export.s8_uint.op_replace

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41872>
2026-06-03 15:23:19 +00:00
Alyssa Rosenzweig
c9eb9ea52a jay/partition: pick better partitions
look at what the program actually does instead of hardcoding a worst-case.

SIMD16:
   Totals from 1965 (74.23% of 2647) affected shaders:
   Instrs: 2603230 -> 2539932 (-2.43%); split: -3.44%, +1.01%
   CodeSize: 38826160 -> 37811904 (-2.61%); split: -3.59%, +0.97%
   Number of spill instructions: 1206 -> 555 (-53.98%)
   Number of fill instructions: 1194 -> 551 (-53.85%)

SIMD32:
   Totals from 1974 (74.57% of 2647) affected shaders:
   Instrs: 3998126 -> 3033333 (-24.13%); split: -24.18%, +0.05%
   CodeSize: 59563952 -> 45580448 (-23.48%); split: -23.52%, +0.05%
   Number of spill instructions: 43534 -> 37471 (-13.93%); split: -13.97%, +0.04%
   Number of fill instructions: 43118 -> 36412 (-15.55%)

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41872>
2026-06-03 15:23:19 +00:00
Alyssa Rosenzweig
7221ef0230 jay/partition: validate we don't generate g127<2>
GPU hangs with a buggy version of the next patch. EU validate misses this :(

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41872>
2026-06-03 15:23:19 +00:00
Alyssa Rosenzweig
3905c7156d jay/register_allocate: drop #include
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41872>
2026-06-03 15:23:19 +00:00
Alyssa Rosenzweig
d8b2ba91e8 jay/register_allocate: split out jay_stride.c
These queries need to be used for partitioning too. And also this degunks the
core RA logic in jay_register_allocate.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41872>
2026-06-03 15:23:19 +00:00
Alyssa Rosenzweig
e900ac1750 jay/register_allocate: remove remnant of old partition code
We no longer delete from num_regs for spilling now.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41872>
2026-06-03 15:23:19 +00:00
Alyssa Rosenzweig
5cff4cca3a jay/register_allocate: do not treat reserved regs as free
would blow up with partition changes.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41872>
2026-06-03 15:23:19 +00:00
Alyssa Rosenzweig
712a19bef2 jay/validate_ra: validate against partition
this programatically catches a few more classes of errors.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41872>
2026-06-03 15:23:19 +00:00
squidbus
9631af9ce6 kk: Accurately declare supported samples in image format properties
Some checks are pending
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This was completed previously for device properties but not image.

Reviewed-by: Aitor Camacho <aitor@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41895>
2026-06-03 15:05:36 +00:00
Mike Blumenkrantz
01cbcdfe2e zink/clear: handle texture clears on current fb texture
need to ensure existing clears are flushed before applying these

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41967>
2026-06-03 14:43:49 +00:00
Mike Blumenkrantz
6accf9a576 zink/clear: fix full_clear condition in texture clear
cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41967>
2026-06-03 14:43:48 +00:00
gyeyoung
65596f7053 panvk: report DRM format modifiers through List2EXT
panvk previously reported DRM format modifiers only through
VkDrmFormatModifierPropertiesListEXT.

Report them through VkDrmFormatModifierPropertiesList2EXT as well.

Cc: mesa-stable
Signed-off-by: Gyeyoung Baek <gye976@gmail.com>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41772>
2026-06-03 14:21:00 +00:00
gyeyoung
ff6e4fc335 panvk: fix flags2-only bit leak in legacy format features
VkFormatProperties uses VkFormatFeatureFlags, whose valid bits are limited to
VK_ALL_FORMAT_FEATURE_FLAG_BITS (0x7fffffffu).

Without this mask, the last bit leaks out.

Use vk_format_features2_to_features() helper when filling VkFormatProperties so
flags2-only bits are not leaked through legacy feature fields.

Cc: mesa-stable
Signed-off-by: Gyeyoung Baek <gye976@gmail.com>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41772>
2026-06-03 14:21:00 +00:00
Mike Blumenkrantz
afad83afed zink: use maint11 for sso shader object compile
this cleans up some vvl errors

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41403>
2026-06-03 13:23:20 +00:00
Erik Faye-Lund
4cebf8af54 pan/ci: recognize flaking test
Some checks are pending
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This test has been marked as flaking on G925, but I've also seen it
flaking on G610 recently. Let's just move it to the common flake-file
instead. Also drop it from the fails-file on G925, as having it in both
isn't really needed.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40398>
2026-06-03 12:14:08 +00:00
Erik Faye-Lund
9d98d4dd2a pan/ci: move common flake to common flake-file
This test also flakes on G610, let's introduce a common flake-file and
add it there.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40398>
2026-06-03 12:14:08 +00:00
Erik Faye-Lund
18e18613c5 pan/ci: skip slow test
Acked-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40398>
2026-06-03 12:14:08 +00:00
Erik Faye-Lund
ecd9bf7969 pan/ci: move skip to flakes
This only fails sometimes, and it doesn't seem to take the whole system
down with it. Let's mark it as a flake instead of skipping it.

Acked-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40398>
2026-06-03 12:14:08 +00:00
Erik Faye-Lund
6425c6507e pan/ci: drop needless skips
Skips accumulate over time, but rarely gets reevaluated to see if
they're still relevant. To combat this problem, I've dropped all skips,
and added back those that actually serve a practical use.

The result might be a bit more instability in the short term. But
hopefully this pays off in the long term.

Acked-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40398>
2026-06-03 12:14:07 +00:00
Erik Faye-Lund
8484fb89d1 pan/ci: add back missing skip-list heading
We have these in most of the skip-lists, so let's add it to the ones
that are missing it as well.

Acked-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40398>
2026-06-03 12:14:07 +00:00
Erik Faye-Lund
269588fe1b pan/ci: add a few new g925 flakes
Acked-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40398>
2026-06-03 12:14:07 +00:00
Erik Faye-Lund
fbfd5be469 pan/ci: reenable passing tests
These tests pass, so let's remove their skips and xfails.

The immediate-reuse failures seems to actually be flaky.

Acked-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40398>
2026-06-03 12:14:06 +00:00
Erik Faye-Lund
d093caffcf pan/ci: stuff some breadcrumbs in the fails-list
Acked-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40398>
2026-06-03 12:14:06 +00:00
Erik Faye-Lund
06a05e58e0 pan/ci: move cts-bug-fails to skips
These are known fails due to CTS bugs. Patches are on the way. Let's
skip them, like we do with the other ones in the same category.

Acked-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40398>
2026-06-03 12:14:06 +00:00
Erik Faye-Lund
d4778fd610 pan/ci: use slow-skips to only skip slow tests for merge-requests
Slow tests are less of a problem on nightly runs, so let's switch to the
slow-skips.txt files here.

Acked-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40398>
2026-06-03 12:14:06 +00:00
Nick Hamilton
46853bff63 pvr: Fix load-op shader when loading from a 2d image view of a 3d image
When zink translates glCopySubImageData with a 2d image view of a 3d
image as the destination to a draw call the shader generated for the
load-op was not handling things correctly leading to the wrong
z-slice been loaded.

The fix is to mark which attachments within the load op are 2d image
views of a 3d image then when generating the load-op shader covert
the sample to 3d sample and update the coords to load the required
z-slice value from the tex meta data.

Fix for dEQP-GLES31.functional.copy_image.non_compressed.*_to_texture3d

Fixes: 7b28b6c43d ("pvr, pco: implement VK_EXT_image_2d_view_of_3d")

Signed-off-by: Nick Hamilton <nick.hamilton@imgtec.com>
Reviewed-by: Luigi Santivetti <luigi.santivetti@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41955>
2026-06-03 11:12:42 +00:00
Collabora's Gfx CI Team
b2eeef663b Uprev VVL to d2b091858d12802cc1c3722c81a9f3d865d833d4
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
315d28985e...d2b091858d

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41948>
2026-06-03 10:44:57 +00:00
Eric Engestrom
3808c7c60b docs: add sha sum for 26.1.2
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41989>
2026-06-03 10:39:06 +00:00
Eric Engestrom
31416000b0 docs: add release notes for 26.1.2
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41989>
2026-06-03 10:39:06 +00:00
Eric Engestrom
d32241f6c2 docs: update calendar for 26.1.2
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41989>
2026-06-03 10:39:06 +00:00
Thong Thai
90f505b763 radeonsi: Allow call to stub'd si_init_gfx_context to continue
With a decode-only build, the si_init_gfx_context is stubbed and returns
false, which causes si_create_context to fail when a decoder is created
(since si_dec_init_decode sets the PIPE_CONTEXT_COMPUTE_ONLY flag).

With this change, the stubbed si_init_gfx_context function returns true,
which allows si_create_context to continue, and a decoder to be
successfully created.

Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41973>
2026-06-03 09:56:20 +00:00
Thong Thai
6f184aae8a meson: Don't require libelf for radeonsi when with_gfx_compute is false
Since shader support is not built when with_gfx_compute is false, libelf
is not needed.

Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41973>
2026-06-03 09:56:19 +00:00
Marc Alcala Prieto
0998c81058 pan/csf: Fix incremental rendering on v14+
The fragment state is stored just before ZS_CRC_EXTENSION, so move the
pointer accordingly.

Fixes: af35fc44a7 ("pan/desc: Implement pan_emit_fbd for v14+")
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41643>
2026-06-03 08:47:42 +00:00
Marc Alcala Prieto
0359a756c4 panvk/csf: Implement incremental rendering on v14+
Implement the v14+ paths needed to copy IR framebuffer layer state and
re-emit it from the tiler OOM exception handler.

Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41643>
2026-06-03 08:47:42 +00:00
Marc Alcala Prieto
588e211fde panvk/csf: Emit fragment layer state just before RUN_FRAGMENT2
Postpone emitting the fragment layer state in the fragment job issue path
until just before RUN_FRAGMENT2 is emitted.

This state is loaded from FBD_POINTER which might change due to IR.
Therefore, postponing is required.

Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41643>
2026-06-03 08:47:42 +00:00
Marc Alcala Prieto
5a7159f869 panfrost: Remove duplicated flushes before RUN_FRAGMENT[2]
The cs_builder.h helper that records RUN_FRAGMENT[2] also records a flush,
so there's no need for flushing again before calling it.

Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41643>
2026-06-03 08:47:42 +00:00
Samuel Pitoiset
cdac2d65b3 radv: return VK_ERROR_INITIALIZATION_FAILED if VM_ALWAYS_VALID isn't supported
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Better than asserting.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41960>
2026-06-03 08:22:39 +00:00
Samuel Pitoiset
16153e3f69 radv: cleanup occurrences of radeon_info::has_vm_always_valid
It must be supported and there is already an assertion in
radv_CreateDevice().

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41960>
2026-06-03 08:22:39 +00:00
Samuel Pitoiset
52176d43c0 radv/amdgpu: allow RADV_PERFTEST=localbos with virtio
VM_ALWAYS_VALID should be supported now.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41960>
2026-06-03 08:22:39 +00:00
Valentine Burley
879dd9ca8c tu: Advertise VK_KHR_internally_synchronized_queues
Some checks are pending
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This is implemented in common code in d8ef386f98 ("vulkan: add support
for VK_KHR_internally_synchronized_queues").

Passes dEQP-VK.synchronization2.internally_synchronized_queues.*

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41926>
2026-06-03 06:21:30 +00:00
Olivia Lee
f1c30d65e1 pan/v13: implement CS udiv
Some checks are pending
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This will be used for CmdDrawByteCountIndirect on v13, which requires
dividing the byte count by the vertex stride to get the number of
vertices in the draw.

Signed-off-by: Olivia Lee <olivia.lee@collabora.com>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41655>
2026-06-03 01:12:23 +00:00
Olivia Lee
ab34d3af23 pan/v13: implement constant integer multiplication CS helper
All we really need for udiv32 is a 32x32->64 multiply, but the most
efficient way to implement that is to move the 32-bit reg into a 64-bit
reg anyway. So, I figured it simpler to just have the caller do that
than passing a scratch reg into the helper.

Signed-off-by: Olivia Lee <olivia.lee@collabora.com>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41655>
2026-06-03 01:12:23 +00:00
Olivia Lee
d505009ef0 pan/v13: add CS builder functions for shift instructions
Signed-off-by: Olivia Lee <olivia.lee@collabora.com>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41655>
2026-06-03 01:12:23 +00:00
Olivia Lee
9d90d33776 pan/v13: add CS builder functions for reg/reg add and sub instructions
Signed-off-by: Olivia Lee <olivia.lee@collabora.com>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41655>
2026-06-03 01:12:23 +00:00
Olivia Lee
b4ae8e548f pan/csf: rename immediate CS add builder functions
v13 adds some register add/sub instructions, and I'd like to use
cs_{add,sub}{32,64} for those to match the naming convention for other
reg/reg instructions. So the existing immediate functions are renamed to
cs_add_imm{32,64}, matching the name of the actual instruction.

Signed-off-by: Olivia Lee <olivia.lee@collabora.com>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41655>
2026-06-03 01:12:23 +00:00
Nanley Chery
2581ae572b anv: Allow partial depth fast clears on gfx12+
Not sure if any workload uses this. This mostly allows us to document
the functionality of HSD 22011236099 on gfx20+.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41712>
2026-06-03 00:51:29 +00:00
Nanley Chery
6f7baf4e7d anv: Skip some CCS performance warnings on gfx9-11
These platforms don't support CCS on MCS/HIZ/STC. There's nothing we can
do about this. So, stop warning about it.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41712>
2026-06-03 00:51:28 +00:00
Nanley Chery
888ea50760 anv: Dedent a closing curly brace
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41712>
2026-06-03 00:51:28 +00:00
Nanley Chery
ee40162321 intel/isl: Fix the initial state HiZ state for Xe2+
HSD 22011236099 actually states that there are no illegal values for HiZ
for partial clear operations. Other operations (e.g., copies) may still
result in corruption without a preceding ambiguate.

Fixes: a13aab1859 ("intel/isl: Update the initial HiZ state for Xe2+")
Related: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40987
Tested-by: Nataraj Deshpande <nataraj.deshpande@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41712>
2026-06-03 00:51:27 +00:00